linux/drivers/net/bna/bnad.h
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   1/*
   2 * Linux network driver for Brocade Converged Network Adapter.
   3 *
   4 * This program is free software; you can redistribute it and/or modify it
   5 * under the terms of the GNU General Public License (GPL) Version 2 as
   6 * published by the Free Software Foundation
   7 *
   8 * This program is distributed in the hope that it will be useful, but
   9 * WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11 * General Public License for more details.
  12 */
  13/*
  14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15 * All rights reserved
  16 * www.brocade.com
  17 */
  18#ifndef __BNAD_H__
  19#define __BNAD_H__
  20
  21#include <linux/rtnetlink.h>
  22#include <linux/workqueue.h>
  23#include <linux/ipv6.h>
  24#include <linux/etherdevice.h>
  25#include <linux/mutex.h>
  26#include <linux/firmware.h>
  27#include <linux/if_vlan.h>
  28
  29/* Fix for IA64 */
  30#include <asm/checksum.h>
  31#include <net/ip6_checksum.h>
  32
  33#include <net/ip.h>
  34#include <net/tcp.h>
  35
  36#include "bna.h"
  37
  38#define BNAD_TXQ_DEPTH          2048
  39#define BNAD_RXQ_DEPTH          2048
  40
  41#define BNAD_MAX_TXS            1
  42#define BNAD_MAX_TXQ_PER_TX     8       /* 8 priority queues */
  43#define BNAD_TXQ_NUM            1
  44
  45#define BNAD_MAX_RXS            1
  46#define BNAD_MAX_RXPS_PER_RX    16
  47
  48/*
  49 * Control structure pointed to ccb->ctrl, which
  50 * determines the NAPI / LRO behavior CCB
  51 * There is 1:1 corres. between ccb & ctrl
  52 */
  53struct bnad_rx_ctrl {
  54        struct bna_ccb *ccb;
  55        unsigned long  flags;
  56        struct napi_struct      napi;
  57};
  58
  59#define BNAD_RXMODE_PROMISC_DEFAULT     BNA_RXMODE_PROMISC
  60
  61#define BNAD_GET_TX_ID(_skb)    (0)
  62
  63/*
  64 * GLOBAL #defines (CONSTANTS)
  65 */
  66#define BNAD_NAME                       "bna"
  67#define BNAD_NAME_LEN                   64
  68
  69#define BNAD_VERSION                    "2.3.2.3"
  70
  71#define BNAD_MAILBOX_MSIX_INDEX         0
  72#define BNAD_MAILBOX_MSIX_VECTORS       1
  73#define BNAD_INTX_TX_IB_BITMASK         0x1
  74#define BNAD_INTX_RX_IB_BITMASK         0x2
  75
  76#define BNAD_STATS_TIMER_FREQ           1000    /* in msecs */
  77#define BNAD_DIM_TIMER_FREQ             1000    /* in msecs */
  78
  79#define BNAD_MAX_Q_DEPTH                0x10000
  80#define BNAD_MIN_Q_DEPTH                0x200
  81
  82#define BNAD_JUMBO_MTU                  9000
  83
  84#define BNAD_NETIF_WAKE_THRESHOLD       8
  85
  86#define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
  87
  88/* Bit positions for tcb->flags */
  89#define BNAD_TXQ_FREE_SENT              0
  90#define BNAD_TXQ_TX_STARTED             1
  91
  92/* Bit positions for rcb->flags */
  93#define BNAD_RXQ_REFILL                 0
  94#define BNAD_RXQ_STARTED                1
  95
  96/*
  97 * DATA STRUCTURES
  98 */
  99
 100/* enums */
 101enum bnad_intr_source {
 102        BNAD_INTR_TX            = 1,
 103        BNAD_INTR_RX            = 2
 104};
 105
 106enum bnad_link_state {
 107        BNAD_LS_DOWN            = 0,
 108        BNAD_LS_UP              = 1
 109};
 110
 111struct bnad_completion {
 112        struct completion       ioc_comp;
 113        struct completion       ucast_comp;
 114        struct completion       mcast_comp;
 115        struct completion       tx_comp;
 116        struct completion       rx_comp;
 117        struct completion       stats_comp;
 118        struct completion       port_comp;
 119
 120        u8                      ioc_comp_status;
 121        u8                      ucast_comp_status;
 122        u8                      mcast_comp_status;
 123        u8                      tx_comp_status;
 124        u8                      rx_comp_status;
 125        u8                      stats_comp_status;
 126        u8                      port_comp_status;
 127};
 128
 129/* Tx Rx Control Stats */
 130struct bnad_drv_stats {
 131        u64             netif_queue_stop;
 132        u64             netif_queue_wakeup;
 133        u64             netif_queue_stopped;
 134        u64             tso4;
 135        u64             tso6;
 136        u64             tso_err;
 137        u64             tcpcsum_offload;
 138        u64             udpcsum_offload;
 139        u64             csum_help;
 140        u64             csum_help_err;
 141
 142        u64             hw_stats_updates;
 143        u64             netif_rx_schedule;
 144        u64             netif_rx_complete;
 145        u64             netif_rx_dropped;
 146
 147        u64             link_toggle;
 148        u64             cee_up;
 149
 150        u64             rxp_info_alloc_failed;
 151        u64             mbox_intr_disabled;
 152        u64             mbox_intr_enabled;
 153        u64             tx_unmap_q_alloc_failed;
 154        u64             rx_unmap_q_alloc_failed;
 155
 156        u64             rxbuf_alloc_failed;
 157};
 158
 159/* Complete driver stats */
 160struct bnad_stats {
 161        struct bnad_drv_stats drv_stats;
 162        struct bna_stats *bna_stats;
 163};
 164
 165/* Tx / Rx Resources */
 166struct bnad_tx_res_info {
 167        struct bna_res_info res_info[BNA_TX_RES_T_MAX];
 168};
 169
 170struct bnad_rx_res_info {
 171        struct bna_res_info res_info[BNA_RX_RES_T_MAX];
 172};
 173
 174struct bnad_tx_info {
 175        struct bna_tx *tx; /* 1:1 between tx_info & tx */
 176        struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
 177} ____cacheline_aligned;
 178
 179struct bnad_rx_info {
 180        struct bna_rx *rx; /* 1:1 between rx_info & rx */
 181
 182        struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX];
 183} ____cacheline_aligned;
 184
 185/* Unmap queues for Tx / Rx cleanup */
 186struct bnad_skb_unmap {
 187        struct sk_buff          *skb;
 188        DEFINE_DMA_UNMAP_ADDR(dma_addr);
 189};
 190
 191struct bnad_unmap_q {
 192        u32             producer_index;
 193        u32             consumer_index;
 194        u32             q_depth;
 195        /* This should be the last one */
 196        struct bnad_skb_unmap unmap_array[1];
 197};
 198
 199/* Bit mask values for bnad->cfg_flags */
 200#define BNAD_CF_DIM_ENABLED             0x01    /* DIM */
 201#define BNAD_CF_PROMISC                 0x02
 202#define BNAD_CF_ALLMULTI                0x04
 203#define BNAD_CF_MSIX                    0x08    /* If in MSIx mode */
 204
 205/* Defines for run_flags bit-mask */
 206/* Set, tested & cleared using xxx_bit() functions */
 207/* Values indicated bit positions */
 208#define BNAD_RF_CEE_RUNNING             1
 209#define BNAD_RF_MBOX_IRQ_DISABLED       2
 210#define BNAD_RF_RX_STARTED              3
 211#define BNAD_RF_DIM_TIMER_RUNNING       4
 212#define BNAD_RF_STATS_TIMER_RUNNING     5
 213#define BNAD_RF_TX_SHUTDOWN_DELAYED     6
 214#define BNAD_RF_RX_SHUTDOWN_DELAYED     7
 215
 216struct bnad {
 217        struct net_device       *netdev;
 218
 219        /* Data path */
 220        struct bnad_tx_info tx_info[BNAD_MAX_TXS];
 221        struct bnad_rx_info rx_info[BNAD_MAX_RXS];
 222
 223        unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 224        /*
 225         * These q numbers are global only because
 226         * they are used to calculate MSIx vectors.
 227         * Actually the exact # of queues are per Tx/Rx
 228         * object.
 229         */
 230        u32             num_tx;
 231        u32             num_rx;
 232        u32             num_txq_per_tx;
 233        u32             num_rxp_per_rx;
 234
 235        u32             txq_depth;
 236        u32             rxq_depth;
 237
 238        u8                      tx_coalescing_timeo;
 239        u8                      rx_coalescing_timeo;
 240
 241        struct bna_rx_config rx_config[BNAD_MAX_RXS];
 242        struct bna_tx_config tx_config[BNAD_MAX_TXS];
 243
 244        void __iomem            *bar0;  /* BAR0 address */
 245
 246        struct bna bna;
 247
 248        u32             cfg_flags;
 249        unsigned long           run_flags;
 250
 251        struct pci_dev          *pcidev;
 252        u64             mmio_start;
 253        u64             mmio_len;
 254
 255        u32             msix_num;
 256        struct msix_entry       *msix_table;
 257
 258        struct mutex            conf_mutex;
 259        spinlock_t              bna_lock ____cacheline_aligned;
 260
 261        /* Timers */
 262        struct timer_list       ioc_timer;
 263        struct timer_list       dim_timer;
 264        struct timer_list       stats_timer;
 265
 266        /* Control path resources, memory & irq */
 267        struct bna_res_info res_info[BNA_RES_T_MAX];
 268        struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS];
 269        struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS];
 270
 271        struct bnad_completion bnad_completions;
 272
 273        /* Burnt in MAC address */
 274        mac_t                   perm_addr;
 275
 276        struct tasklet_struct   tx_free_tasklet;
 277
 278        /* Statistics */
 279        struct bnad_stats stats;
 280
 281        struct bnad_diag *diag;
 282
 283        char                    adapter_name[BNAD_NAME_LEN];
 284        char                    port_name[BNAD_NAME_LEN];
 285        char                    mbox_irq_name[BNAD_NAME_LEN];
 286};
 287
 288/*
 289 * EXTERN VARIABLES
 290 */
 291extern struct firmware *bfi_fw;
 292extern u32              bnad_rxqs_per_cq;
 293
 294/*
 295 * EXTERN PROTOTYPES
 296 */
 297extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
 298/* Netdev entry point prototypes */
 299extern void bnad_set_ethtool_ops(struct net_device *netdev);
 300
 301/* Configuration & setup */
 302extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
 303extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
 304
 305extern int bnad_setup_rx(struct bnad *bnad, uint rx_id);
 306extern int bnad_setup_tx(struct bnad *bnad, uint tx_id);
 307extern void bnad_cleanup_tx(struct bnad *bnad, uint tx_id);
 308extern void bnad_cleanup_rx(struct bnad *bnad, uint rx_id);
 309
 310/* Timer start/stop protos */
 311extern void bnad_dim_timer_start(struct bnad *bnad);
 312
 313/* Statistics */
 314extern void bnad_netdev_qstats_fill(struct bnad *bnad,
 315                struct rtnl_link_stats64 *stats);
 316extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
 317                struct rtnl_link_stats64 *stats);
 318
 319/**
 320 * MACROS
 321 */
 322/* To set & get the stats counters */
 323#define BNAD_UPDATE_CTR(_bnad, _ctr)                            \
 324                                (((_bnad)->stats.drv_stats._ctr)++)
 325
 326#define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
 327
 328#define bnad_enable_rx_irq_unsafe(_ccb)                 \
 329{                                                       \
 330        if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\
 331                bna_ib_coalescing_timer_set((_ccb)->i_dbell,    \
 332                        (_ccb)->rx_coalescing_timeo);           \
 333                bna_ib_ack((_ccb)->i_dbell, 0);                 \
 334        }                                                       \
 335}
 336
 337#define bnad_dim_timer_running(_bnad)                           \
 338        (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) &&          \
 339        (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags))))
 340
 341#endif /* __BNAD_H__ */
 342