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23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/interrupt.h>
26#include <linux/firmware.h>
27#include <linux/delay.h>
28#include <linux/irq.h>
29#include <linux/spi/spi.h>
30#include <linux/etherdevice.h>
31#include <linux/gpio.h>
32#include <linux/slab.h>
33
34#include "p54spi.h"
35#include "p54.h"
36
37#include "lmac.h"
38
39#ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
40#include "p54spi_eeprom.h"
41#endif
42
43MODULE_FIRMWARE("3826.arm");
44MODULE_ALIAS("stlc45xx");
45
46
47
48
49
50
51
52static int p54spi_gpio_power = 97;
53module_param(p54spi_gpio_power, int, 0444);
54MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
55
56static int p54spi_gpio_irq = 87;
57module_param(p54spi_gpio_irq, int, 0444);
58MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
59
60static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
61 void *buf, size_t len)
62{
63 struct spi_transfer t[2];
64 struct spi_message m;
65 __le16 addr;
66
67
68 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
69
70 spi_message_init(&m);
71 memset(t, 0, sizeof(t));
72
73 t[0].tx_buf = &addr;
74 t[0].len = sizeof(addr);
75 spi_message_add_tail(&t[0], &m);
76
77 t[1].rx_buf = buf;
78 t[1].len = len;
79 spi_message_add_tail(&t[1], &m);
80
81 spi_sync(priv->spi, &m);
82}
83
84
85static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
86 const void *buf, size_t len)
87{
88 struct spi_transfer t[3];
89 struct spi_message m;
90 __le16 addr;
91
92
93 addr = cpu_to_le16(address << 8);
94
95 spi_message_init(&m);
96 memset(t, 0, sizeof(t));
97
98 t[0].tx_buf = &addr;
99 t[0].len = sizeof(addr);
100 spi_message_add_tail(&t[0], &m);
101
102 t[1].tx_buf = buf;
103 t[1].len = len & ~1;
104 spi_message_add_tail(&t[1], &m);
105
106 if (len % 2) {
107 __le16 last_word;
108 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
109
110 t[2].tx_buf = &last_word;
111 t[2].len = sizeof(last_word);
112 spi_message_add_tail(&t[2], &m);
113 }
114
115 spi_sync(priv->spi, &m);
116}
117
118static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
119{
120 __le32 val;
121
122 p54spi_spi_read(priv, addr, &val, sizeof(val));
123
124 return le32_to_cpu(val);
125}
126
127static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
128{
129 p54spi_spi_write(priv, addr, &val, sizeof(val));
130}
131
132static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
133{
134 p54spi_spi_write(priv, addr, &val, sizeof(val));
135}
136
137static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
138{
139 int i;
140
141 for (i = 0; i < 2000; i++) {
142 u32 buffer = p54spi_read32(priv, reg);
143 if ((buffer & bits) == bits)
144 return 1;
145 }
146 return 0;
147}
148
149static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
150 const void *buf, size_t len)
151{
152 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
153 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
154 "to DMA write.\n");
155 return -EAGAIN;
156 }
157
158 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
159 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
160
161 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
162 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
163 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
164 return 0;
165}
166
167static int p54spi_request_firmware(struct ieee80211_hw *dev)
168{
169 struct p54s_priv *priv = dev->priv;
170 int ret;
171
172
173 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
174
175 if (ret < 0) {
176 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
177 return ret;
178 }
179
180 ret = p54_parse_firmware(dev, priv->firmware);
181 if (ret) {
182 release_firmware(priv->firmware);
183 return ret;
184 }
185
186 return 0;
187}
188
189static int p54spi_request_eeprom(struct ieee80211_hw *dev)
190{
191 struct p54s_priv *priv = dev->priv;
192 const struct firmware *eeprom;
193 int ret;
194
195
196
197
198
199 ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
200 if (ret < 0) {
201#ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
202 dev_info(&priv->spi->dev, "loading default eeprom...\n");
203 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
204 sizeof(p54spi_eeprom));
205#else
206 dev_err(&priv->spi->dev, "Failed to request user eeprom\n");
207#endif
208 } else {
209 dev_info(&priv->spi->dev, "loading user eeprom...\n");
210 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
211 (int)eeprom->size);
212 release_firmware(eeprom);
213 }
214 return ret;
215}
216
217static int p54spi_upload_firmware(struct ieee80211_hw *dev)
218{
219 struct p54s_priv *priv = dev->priv;
220 unsigned long fw_len, _fw_len;
221 unsigned int offset = 0;
222 int err = 0;
223 u8 *fw;
224
225 fw_len = priv->firmware->size;
226 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
227 if (!fw)
228 return -ENOMEM;
229
230
231 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
232 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
233 SPI_CTRL_STAT_START_HALTED));
234
235 msleep(TARGET_BOOT_SLEEP);
236
237 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
238 SPI_CTRL_STAT_HOST_OVERRIDE |
239 SPI_CTRL_STAT_START_HALTED));
240
241 msleep(TARGET_BOOT_SLEEP);
242
243 while (fw_len > 0) {
244 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
245
246 err = p54spi_spi_write_dma(priv, cpu_to_le32(
247 ISL38XX_DEV_FIRMWARE_ADDR + offset),
248 (fw + offset), _fw_len);
249 if (err < 0)
250 goto out;
251
252 fw_len -= _fw_len;
253 offset += _fw_len;
254 }
255
256 BUG_ON(fw_len != 0);
257
258
259 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
260 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
261
262
263 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
264 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
265 SPI_CTRL_STAT_RAM_BOOT));
266
267 msleep(TARGET_BOOT_SLEEP);
268
269 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
270 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
271 msleep(TARGET_BOOT_SLEEP);
272
273out:
274 kfree(fw);
275 return err;
276}
277
278static void p54spi_power_off(struct p54s_priv *priv)
279{
280 disable_irq(gpio_to_irq(p54spi_gpio_irq));
281 gpio_set_value(p54spi_gpio_power, 0);
282}
283
284static void p54spi_power_on(struct p54s_priv *priv)
285{
286 gpio_set_value(p54spi_gpio_power, 1);
287 enable_irq(gpio_to_irq(p54spi_gpio_irq));
288
289
290
291
292
293 msleep(10);
294}
295
296static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
297{
298 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
299}
300
301static int p54spi_wakeup(struct p54s_priv *priv)
302{
303
304 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
305 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
306
307
308 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
309 SPI_HOST_INT_READY)) {
310 dev_err(&priv->spi->dev, "INT_READY timeout\n");
311 return -EBUSY;
312 }
313
314 p54spi_int_ack(priv, SPI_HOST_INT_READY);
315 return 0;
316}
317
318static inline void p54spi_sleep(struct p54s_priv *priv)
319{
320 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
321 cpu_to_le32(SPI_TARGET_INT_SLEEP));
322}
323
324static void p54spi_int_ready(struct p54s_priv *priv)
325{
326 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
327 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
328
329 switch (priv->fw_state) {
330 case FW_STATE_BOOTING:
331 priv->fw_state = FW_STATE_READY;
332 complete(&priv->fw_comp);
333 break;
334 case FW_STATE_RESETTING:
335 priv->fw_state = FW_STATE_READY;
336
337 break;
338 default:
339 break;
340 }
341}
342
343static int p54spi_rx(struct p54s_priv *priv)
344{
345 struct sk_buff *skb;
346 u16 len;
347 u16 rx_head[2];
348#define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
349
350 if (p54spi_wakeup(priv) < 0)
351 return -EBUSY;
352
353
354
355
356
357 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
358 len = rx_head[0];
359
360 if (len == 0) {
361 p54spi_sleep(priv);
362 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
363 return 0;
364 }
365
366
367
368
369
370 skb = dev_alloc_skb(len + 4);
371 if (!skb) {
372 p54spi_sleep(priv);
373 dev_err(&priv->spi->dev, "could not alloc skb");
374 return -ENOMEM;
375 }
376
377 if (len <= READAHEAD_SZ) {
378 memcpy(skb_put(skb, len), rx_head + 1, len);
379 } else {
380 memcpy(skb_put(skb, READAHEAD_SZ), rx_head + 1, READAHEAD_SZ);
381 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
382 skb_put(skb, len - READAHEAD_SZ),
383 len - READAHEAD_SZ);
384 }
385 p54spi_sleep(priv);
386
387
388 skb_put(skb, 4);
389
390 if (p54_rx(priv->hw, skb) == 0)
391 dev_kfree_skb(skb);
392
393 return 0;
394}
395
396
397static irqreturn_t p54spi_interrupt(int irq, void *config)
398{
399 struct spi_device *spi = config;
400 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
401
402 ieee80211_queue_work(priv->hw, &priv->work);
403
404 return IRQ_HANDLED;
405}
406
407static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
408{
409 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
410 int ret = 0;
411
412 if (p54spi_wakeup(priv) < 0)
413 return -EBUSY;
414
415 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
416 if (ret < 0)
417 goto out;
418
419 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
420 SPI_HOST_INT_WR_READY)) {
421 dev_err(&priv->spi->dev, "WR_READY timeout\n");
422 ret = -EAGAIN;
423 goto out;
424 }
425
426 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
427
428 if (FREE_AFTER_TX(skb))
429 p54_free_skb(priv->hw, skb);
430out:
431 p54spi_sleep(priv);
432 return ret;
433}
434
435static int p54spi_wq_tx(struct p54s_priv *priv)
436{
437 struct p54s_tx_info *entry;
438 struct sk_buff *skb;
439 struct ieee80211_tx_info *info;
440 struct p54_tx_info *minfo;
441 struct p54s_tx_info *dinfo;
442 unsigned long flags;
443 int ret = 0;
444
445 spin_lock_irqsave(&priv->tx_lock, flags);
446
447 while (!list_empty(&priv->tx_pending)) {
448 entry = list_entry(priv->tx_pending.next,
449 struct p54s_tx_info, tx_list);
450
451 list_del_init(&entry->tx_list);
452
453 spin_unlock_irqrestore(&priv->tx_lock, flags);
454
455 dinfo = container_of((void *) entry, struct p54s_tx_info,
456 tx_list);
457 minfo = container_of((void *) dinfo, struct p54_tx_info,
458 data);
459 info = container_of((void *) minfo, struct ieee80211_tx_info,
460 rate_driver_data);
461 skb = container_of((void *) info, struct sk_buff, cb);
462
463 ret = p54spi_tx_frame(priv, skb);
464
465 if (ret < 0) {
466 p54_free_skb(priv->hw, skb);
467 return ret;
468 }
469
470 spin_lock_irqsave(&priv->tx_lock, flags);
471 }
472 spin_unlock_irqrestore(&priv->tx_lock, flags);
473 return ret;
474}
475
476static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
477{
478 struct p54s_priv *priv = dev->priv;
479 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
480 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
481 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
482 unsigned long flags;
483
484 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
485
486 spin_lock_irqsave(&priv->tx_lock, flags);
487 list_add_tail(&di->tx_list, &priv->tx_pending);
488 spin_unlock_irqrestore(&priv->tx_lock, flags);
489
490 ieee80211_queue_work(priv->hw, &priv->work);
491}
492
493static void p54spi_work(struct work_struct *work)
494{
495 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
496 u32 ints;
497 int ret;
498
499 mutex_lock(&priv->mutex);
500
501 if (priv->fw_state == FW_STATE_OFF)
502 goto out;
503
504 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
505
506 if (ints & SPI_HOST_INT_READY) {
507 p54spi_int_ready(priv);
508 p54spi_int_ack(priv, SPI_HOST_INT_READY);
509 }
510
511 if (priv->fw_state != FW_STATE_READY)
512 goto out;
513
514 if (ints & SPI_HOST_INT_UPDATE) {
515 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
516 ret = p54spi_rx(priv);
517 if (ret < 0)
518 goto out;
519 }
520 if (ints & SPI_HOST_INT_SW_UPDATE) {
521 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
522 ret = p54spi_rx(priv);
523 if (ret < 0)
524 goto out;
525 }
526
527 ret = p54spi_wq_tx(priv);
528out:
529 mutex_unlock(&priv->mutex);
530}
531
532static int p54spi_op_start(struct ieee80211_hw *dev)
533{
534 struct p54s_priv *priv = dev->priv;
535 unsigned long timeout;
536 int ret = 0;
537
538 if (mutex_lock_interruptible(&priv->mutex)) {
539 ret = -EINTR;
540 goto out;
541 }
542
543 priv->fw_state = FW_STATE_BOOTING;
544
545 p54spi_power_on(priv);
546
547 ret = p54spi_upload_firmware(dev);
548 if (ret < 0) {
549 p54spi_power_off(priv);
550 goto out_unlock;
551 }
552
553 mutex_unlock(&priv->mutex);
554
555 timeout = msecs_to_jiffies(2000);
556 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
557 timeout);
558 if (!timeout) {
559 dev_err(&priv->spi->dev, "firmware boot failed");
560 p54spi_power_off(priv);
561 ret = -1;
562 goto out;
563 }
564
565 if (mutex_lock_interruptible(&priv->mutex)) {
566 ret = -EINTR;
567 p54spi_power_off(priv);
568 goto out;
569 }
570
571 WARN_ON(priv->fw_state != FW_STATE_READY);
572
573out_unlock:
574 mutex_unlock(&priv->mutex);
575
576out:
577 return ret;
578}
579
580static void p54spi_op_stop(struct ieee80211_hw *dev)
581{
582 struct p54s_priv *priv = dev->priv;
583 unsigned long flags;
584
585 if (mutex_lock_interruptible(&priv->mutex)) {
586
587 return;
588 }
589
590 WARN_ON(priv->fw_state != FW_STATE_READY);
591
592 cancel_work_sync(&priv->work);
593
594 p54spi_power_off(priv);
595 spin_lock_irqsave(&priv->tx_lock, flags);
596 INIT_LIST_HEAD(&priv->tx_pending);
597 spin_unlock_irqrestore(&priv->tx_lock, flags);
598
599 priv->fw_state = FW_STATE_OFF;
600 mutex_unlock(&priv->mutex);
601}
602
603static int __devinit p54spi_probe(struct spi_device *spi)
604{
605 struct p54s_priv *priv = NULL;
606 struct ieee80211_hw *hw;
607 int ret = -EINVAL;
608
609 hw = p54_init_common(sizeof(*priv));
610 if (!hw) {
611 dev_err(&spi->dev, "could not alloc ieee80211_hw");
612 return -ENOMEM;
613 }
614
615 priv = hw->priv;
616 priv->hw = hw;
617 dev_set_drvdata(&spi->dev, priv);
618 priv->spi = spi;
619
620 spi->bits_per_word = 16;
621 spi->max_speed_hz = 24000000;
622
623 ret = spi_setup(spi);
624 if (ret < 0) {
625 dev_err(&priv->spi->dev, "spi_setup failed");
626 goto err_free_common;
627 }
628
629 ret = gpio_request(p54spi_gpio_power, "p54spi power");
630 if (ret < 0) {
631 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
632 goto err_free_common;
633 }
634
635 ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
636 if (ret < 0) {
637 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
638 goto err_free_common;
639 }
640
641 gpio_direction_output(p54spi_gpio_power, 0);
642 gpio_direction_input(p54spi_gpio_irq);
643
644 ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
645 p54spi_interrupt, IRQF_DISABLED, "p54spi",
646 priv->spi);
647 if (ret < 0) {
648 dev_err(&priv->spi->dev, "request_irq() failed");
649 goto err_free_common;
650 }
651
652 irq_set_irq_type(gpio_to_irq(p54spi_gpio_irq), IRQ_TYPE_EDGE_RISING);
653
654 disable_irq(gpio_to_irq(p54spi_gpio_irq));
655
656 INIT_WORK(&priv->work, p54spi_work);
657 init_completion(&priv->fw_comp);
658 INIT_LIST_HEAD(&priv->tx_pending);
659 mutex_init(&priv->mutex);
660 SET_IEEE80211_DEV(hw, &spi->dev);
661 priv->common.open = p54spi_op_start;
662 priv->common.stop = p54spi_op_stop;
663 priv->common.tx = p54spi_op_tx;
664
665 ret = p54spi_request_firmware(hw);
666 if (ret < 0)
667 goto err_free_common;
668
669 ret = p54spi_request_eeprom(hw);
670 if (ret)
671 goto err_free_common;
672
673 ret = p54_register_common(hw, &priv->spi->dev);
674 if (ret)
675 goto err_free_common;
676
677 return 0;
678
679err_free_common:
680 p54_free_common(priv->hw);
681 return ret;
682}
683
684static int __devexit p54spi_remove(struct spi_device *spi)
685{
686 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
687
688 p54_unregister_common(priv->hw);
689
690 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
691
692 gpio_free(p54spi_gpio_power);
693 gpio_free(p54spi_gpio_irq);
694 release_firmware(priv->firmware);
695
696 mutex_destroy(&priv->mutex);
697
698 p54_free_common(priv->hw);
699
700 return 0;
701}
702
703
704static struct spi_driver p54spi_driver = {
705 .driver = {
706 .name = "p54spi",
707 .bus = &spi_bus_type,
708 .owner = THIS_MODULE,
709 },
710
711 .probe = p54spi_probe,
712 .remove = __devexit_p(p54spi_remove),
713};
714
715static int __init p54spi_init(void)
716{
717 int ret;
718
719 ret = spi_register_driver(&p54spi_driver);
720 if (ret < 0) {
721 printk(KERN_ERR "failed to register SPI driver: %d", ret);
722 goto out;
723 }
724
725out:
726 return ret;
727}
728
729static void __exit p54spi_exit(void)
730{
731 spi_unregister_driver(&p54spi_driver);
732}
733
734module_init(p54spi_init);
735module_exit(p54spi_exit);
736
737MODULE_LICENSE("GPL");
738MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
739MODULE_ALIAS("spi:cx3110x");
740MODULE_ALIAS("spi:p54spi");
741
