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11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
23#include <linux/slab.h>
24
25#include <asm/ebcdic.h>
26#include <asm/io.h>
27#include <asm/sysinfo.h>
28
29#include "qeth_core.h"
30
31struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32
33
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40};
41EXPORT_SYMBOL_GPL(qeth_dbf);
42
43struct qeth_card_list_struct qeth_core_card_list;
44EXPORT_SYMBOL_GPL(qeth_core_card_list);
45struct kmem_cache *qeth_core_header_cache;
46EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47
48static struct device *qeth_core_root_dev;
49static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
50static struct lock_class_key qdio_out_skb_queue_key;
51
52static void qeth_send_control_data_cb(struct qeth_channel *,
53 struct qeth_cmd_buffer *);
54static int qeth_issue_next_read(struct qeth_card *);
55static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
56static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
57static void qeth_free_buffer_pool(struct qeth_card *);
58static int qeth_qdio_establish(struct qeth_card *);
59
60
61static inline const char *qeth_get_cardname(struct qeth_card *card)
62{
63 if (card->info.guestlan) {
64 switch (card->info.type) {
65 case QETH_CARD_TYPE_OSD:
66 return " Guest LAN QDIO";
67 case QETH_CARD_TYPE_IQD:
68 return " Guest LAN Hiper";
69 case QETH_CARD_TYPE_OSM:
70 return " Guest LAN QDIO - OSM";
71 case QETH_CARD_TYPE_OSX:
72 return " Guest LAN QDIO - OSX";
73 default:
74 return " unknown";
75 }
76 } else {
77 switch (card->info.type) {
78 case QETH_CARD_TYPE_OSD:
79 return " OSD Express";
80 case QETH_CARD_TYPE_IQD:
81 return " HiperSockets";
82 case QETH_CARD_TYPE_OSN:
83 return " OSN QDIO";
84 case QETH_CARD_TYPE_OSM:
85 return " OSM QDIO";
86 case QETH_CARD_TYPE_OSX:
87 return " OSX QDIO";
88 default:
89 return " unknown";
90 }
91 }
92 return " n/a";
93}
94
95
96const char *qeth_get_cardname_short(struct qeth_card *card)
97{
98 if (card->info.guestlan) {
99 switch (card->info.type) {
100 case QETH_CARD_TYPE_OSD:
101 return "GuestLAN QDIO";
102 case QETH_CARD_TYPE_IQD:
103 return "GuestLAN Hiper";
104 case QETH_CARD_TYPE_OSM:
105 return "GuestLAN OSM";
106 case QETH_CARD_TYPE_OSX:
107 return "GuestLAN OSX";
108 default:
109 return "unknown";
110 }
111 } else {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSD:
114 switch (card->info.link_type) {
115 case QETH_LINK_TYPE_FAST_ETH:
116 return "OSD_100";
117 case QETH_LINK_TYPE_HSTR:
118 return "HSTR";
119 case QETH_LINK_TYPE_GBIT_ETH:
120 return "OSD_1000";
121 case QETH_LINK_TYPE_10GBIT_ETH:
122 return "OSD_10GIG";
123 case QETH_LINK_TYPE_LANE_ETH100:
124 return "OSD_FE_LANE";
125 case QETH_LINK_TYPE_LANE_TR:
126 return "OSD_TR_LANE";
127 case QETH_LINK_TYPE_LANE_ETH1000:
128 return "OSD_GbE_LANE";
129 case QETH_LINK_TYPE_LANE:
130 return "OSD_ATM_LANE";
131 default:
132 return "OSD_Express";
133 }
134 case QETH_CARD_TYPE_IQD:
135 return "HiperSockets";
136 case QETH_CARD_TYPE_OSN:
137 return "OSN";
138 case QETH_CARD_TYPE_OSM:
139 return "OSM_1000";
140 case QETH_CARD_TYPE_OSX:
141 return "OSX_10GIG";
142 default:
143 return "unknown";
144 }
145 }
146 return "n/a";
147}
148
149void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
150 int clear_start_mask)
151{
152 unsigned long flags;
153
154 spin_lock_irqsave(&card->thread_mask_lock, flags);
155 card->thread_allowed_mask = threads;
156 if (clear_start_mask)
157 card->thread_start_mask &= threads;
158 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
159 wake_up(&card->wait_q);
160}
161EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
162
163int qeth_threads_running(struct qeth_card *card, unsigned long threads)
164{
165 unsigned long flags;
166 int rc = 0;
167
168 spin_lock_irqsave(&card->thread_mask_lock, flags);
169 rc = (card->thread_running_mask & threads);
170 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
171 return rc;
172}
173EXPORT_SYMBOL_GPL(qeth_threads_running);
174
175int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
176{
177 return wait_event_interruptible(card->wait_q,
178 qeth_threads_running(card, threads) == 0);
179}
180EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
181
182void qeth_clear_working_pool_list(struct qeth_card *card)
183{
184 struct qeth_buffer_pool_entry *pool_entry, *tmp;
185
186 QETH_CARD_TEXT(card, 5, "clwrklst");
187 list_for_each_entry_safe(pool_entry, tmp,
188 &card->qdio.in_buf_pool.entry_list, list){
189 list_del(&pool_entry->list);
190 }
191}
192EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
193
194static int qeth_alloc_buffer_pool(struct qeth_card *card)
195{
196 struct qeth_buffer_pool_entry *pool_entry;
197 void *ptr;
198 int i, j;
199
200 QETH_CARD_TEXT(card, 5, "alocpool");
201 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
202 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
203 if (!pool_entry) {
204 qeth_free_buffer_pool(card);
205 return -ENOMEM;
206 }
207 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
208 ptr = (void *) __get_free_page(GFP_KERNEL);
209 if (!ptr) {
210 while (j > 0)
211 free_page((unsigned long)
212 pool_entry->elements[--j]);
213 kfree(pool_entry);
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 pool_entry->elements[j] = ptr;
218 }
219 list_add(&pool_entry->init_list,
220 &card->qdio.init_pool.entry_list);
221 }
222 return 0;
223}
224
225int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
226{
227 QETH_CARD_TEXT(card, 2, "realcbp");
228
229 if ((card->state != CARD_STATE_DOWN) &&
230 (card->state != CARD_STATE_RECOVER))
231 return -EPERM;
232
233
234 qeth_clear_working_pool_list(card);
235 qeth_free_buffer_pool(card);
236 card->qdio.in_buf_pool.buf_count = bufcnt;
237 card->qdio.init_pool.buf_count = bufcnt;
238 return qeth_alloc_buffer_pool(card);
239}
240EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
241
242static int qeth_issue_next_read(struct qeth_card *card)
243{
244 int rc;
245 struct qeth_cmd_buffer *iob;
246
247 QETH_CARD_TEXT(card, 5, "issnxrd");
248 if (card->read.state != CH_STATE_UP)
249 return -EIO;
250 iob = qeth_get_buffer(&card->read);
251 if (!iob) {
252 dev_warn(&card->gdev->dev, "The qeth device driver "
253 "failed to recover an error on the device\n");
254 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
255 "available\n", dev_name(&card->gdev->dev));
256 return -ENOMEM;
257 }
258 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
259 QETH_CARD_TEXT(card, 6, "noirqpnd");
260 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
261 (addr_t) iob, 0, 0);
262 if (rc) {
263 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
264 "rc=%i\n", dev_name(&card->gdev->dev), rc);
265 atomic_set(&card->read.irq_pending, 0);
266 card->read_or_write_problem = 1;
267 qeth_schedule_recovery(card);
268 wake_up(&card->wait_q);
269 }
270 return rc;
271}
272
273static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
274{
275 struct qeth_reply *reply;
276
277 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
278 if (reply) {
279 atomic_set(&reply->refcnt, 1);
280 atomic_set(&reply->received, 0);
281 reply->card = card;
282 };
283 return reply;
284}
285
286static void qeth_get_reply(struct qeth_reply *reply)
287{
288 WARN_ON(atomic_read(&reply->refcnt) <= 0);
289 atomic_inc(&reply->refcnt);
290}
291
292static void qeth_put_reply(struct qeth_reply *reply)
293{
294 WARN_ON(atomic_read(&reply->refcnt) <= 0);
295 if (atomic_dec_and_test(&reply->refcnt))
296 kfree(reply);
297}
298
299static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
300 struct qeth_card *card)
301{
302 char *ipa_name;
303 int com = cmd->hdr.command;
304 ipa_name = qeth_get_ipa_cmd_name(com);
305 if (rc)
306 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
307 "x%X \"%s\"\n",
308 ipa_name, com, dev_name(&card->gdev->dev),
309 QETH_CARD_IFNAME(card), rc,
310 qeth_get_ipa_msg(rc));
311 else
312 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
313 ipa_name, com, dev_name(&card->gdev->dev),
314 QETH_CARD_IFNAME(card));
315}
316
317static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
318 struct qeth_cmd_buffer *iob)
319{
320 struct qeth_ipa_cmd *cmd = NULL;
321
322 QETH_CARD_TEXT(card, 5, "chkipad");
323 if (IS_IPA(iob->data)) {
324 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
325 if (IS_IPA_REPLY(cmd)) {
326 if (cmd->hdr.command != IPA_CMD_SETCCID &&
327 cmd->hdr.command != IPA_CMD_DELCCID &&
328 cmd->hdr.command != IPA_CMD_MODCCID &&
329 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
330 qeth_issue_ipa_msg(cmd,
331 cmd->hdr.return_code, card);
332 return cmd;
333 } else {
334 switch (cmd->hdr.command) {
335 case IPA_CMD_STOPLAN:
336 dev_warn(&card->gdev->dev,
337 "The link for interface %s on CHPID"
338 " 0x%X failed\n",
339 QETH_CARD_IFNAME(card),
340 card->info.chpid);
341 card->lan_online = 0;
342 if (card->dev && netif_carrier_ok(card->dev))
343 netif_carrier_off(card->dev);
344 return NULL;
345 case IPA_CMD_STARTLAN:
346 dev_info(&card->gdev->dev,
347 "The link for %s on CHPID 0x%X has"
348 " been restored\n",
349 QETH_CARD_IFNAME(card),
350 card->info.chpid);
351 netif_carrier_on(card->dev);
352 card->lan_online = 1;
353 if (card->info.hwtrap)
354 card->info.hwtrap = 2;
355 qeth_schedule_recovery(card);
356 return NULL;
357 case IPA_CMD_MODCCID:
358 return cmd;
359 case IPA_CMD_REGISTER_LOCAL_ADDR:
360 QETH_CARD_TEXT(card, 3, "irla");
361 break;
362 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
363 QETH_CARD_TEXT(card, 3, "urla");
364 break;
365 default:
366 QETH_DBF_MESSAGE(2, "Received data is IPA "
367 "but not a reply!\n");
368 break;
369 }
370 }
371 }
372 return cmd;
373}
374
375void qeth_clear_ipacmd_list(struct qeth_card *card)
376{
377 struct qeth_reply *reply, *r;
378 unsigned long flags;
379
380 QETH_CARD_TEXT(card, 4, "clipalst");
381
382 spin_lock_irqsave(&card->lock, flags);
383 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
384 qeth_get_reply(reply);
385 reply->rc = -EIO;
386 atomic_inc(&reply->received);
387 list_del_init(&reply->list);
388 wake_up(&reply->wait_q);
389 qeth_put_reply(reply);
390 }
391 spin_unlock_irqrestore(&card->lock, flags);
392 atomic_set(&card->write.irq_pending, 0);
393}
394EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
395
396static int qeth_check_idx_response(struct qeth_card *card,
397 unsigned char *buffer)
398{
399 if (!buffer)
400 return 0;
401
402 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
403 if ((buffer[2] & 0xc0) == 0xc0) {
404 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
405 "with cause code 0x%02x%s\n",
406 buffer[4],
407 ((buffer[4] == 0x22) ?
408 " -- try another portname" : ""));
409 QETH_CARD_TEXT(card, 2, "ckidxres");
410 QETH_CARD_TEXT(card, 2, " idxterm");
411 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
412 if (buffer[4] == 0xf6) {
413 dev_err(&card->gdev->dev,
414 "The qeth device is not configured "
415 "for the OSI layer required by z/VM\n");
416 return -EPERM;
417 }
418 return -EIO;
419 }
420 return 0;
421}
422
423static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
424 __u32 len)
425{
426 struct qeth_card *card;
427
428 card = CARD_FROM_CDEV(channel->ccwdev);
429 QETH_CARD_TEXT(card, 4, "setupccw");
430 if (channel == &card->read)
431 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
432 else
433 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
434 channel->ccw.count = len;
435 channel->ccw.cda = (__u32) __pa(iob);
436}
437
438static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
439{
440 __u8 index;
441
442 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
443 index = channel->io_buf_no;
444 do {
445 if (channel->iob[index].state == BUF_STATE_FREE) {
446 channel->iob[index].state = BUF_STATE_LOCKED;
447 channel->io_buf_no = (channel->io_buf_no + 1) %
448 QETH_CMD_BUFFER_NO;
449 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
450 return channel->iob + index;
451 }
452 index = (index + 1) % QETH_CMD_BUFFER_NO;
453 } while (index != channel->io_buf_no);
454
455 return NULL;
456}
457
458void qeth_release_buffer(struct qeth_channel *channel,
459 struct qeth_cmd_buffer *iob)
460{
461 unsigned long flags;
462
463 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
464 spin_lock_irqsave(&channel->iob_lock, flags);
465 memset(iob->data, 0, QETH_BUFSIZE);
466 iob->state = BUF_STATE_FREE;
467 iob->callback = qeth_send_control_data_cb;
468 iob->rc = 0;
469 spin_unlock_irqrestore(&channel->iob_lock, flags);
470}
471EXPORT_SYMBOL_GPL(qeth_release_buffer);
472
473static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
474{
475 struct qeth_cmd_buffer *buffer = NULL;
476 unsigned long flags;
477
478 spin_lock_irqsave(&channel->iob_lock, flags);
479 buffer = __qeth_get_buffer(channel);
480 spin_unlock_irqrestore(&channel->iob_lock, flags);
481 return buffer;
482}
483
484struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
485{
486 struct qeth_cmd_buffer *buffer;
487 wait_event(channel->wait_q,
488 ((buffer = qeth_get_buffer(channel)) != NULL));
489 return buffer;
490}
491EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
492
493void qeth_clear_cmd_buffers(struct qeth_channel *channel)
494{
495 int cnt;
496
497 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
498 qeth_release_buffer(channel, &channel->iob[cnt]);
499 channel->buf_no = 0;
500 channel->io_buf_no = 0;
501}
502EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
503
504static void qeth_send_control_data_cb(struct qeth_channel *channel,
505 struct qeth_cmd_buffer *iob)
506{
507 struct qeth_card *card;
508 struct qeth_reply *reply, *r;
509 struct qeth_ipa_cmd *cmd;
510 unsigned long flags;
511 int keep_reply;
512 int rc = 0;
513
514 card = CARD_FROM_CDEV(channel->ccwdev);
515 QETH_CARD_TEXT(card, 4, "sndctlcb");
516 rc = qeth_check_idx_response(card, iob->data);
517 switch (rc) {
518 case 0:
519 break;
520 case -EIO:
521 qeth_clear_ipacmd_list(card);
522 qeth_schedule_recovery(card);
523
524 default:
525 goto out;
526 }
527
528 cmd = qeth_check_ipa_data(card, iob);
529 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
530 goto out;
531
532 if (card->info.type == QETH_CARD_TYPE_OSN &&
533 cmd &&
534 cmd->hdr.command != IPA_CMD_STARTLAN &&
535 card->osn_info.assist_cb != NULL) {
536 card->osn_info.assist_cb(card->dev, cmd);
537 goto out;
538 }
539
540 spin_lock_irqsave(&card->lock, flags);
541 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
542 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
543 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
544 qeth_get_reply(reply);
545 list_del_init(&reply->list);
546 spin_unlock_irqrestore(&card->lock, flags);
547 keep_reply = 0;
548 if (reply->callback != NULL) {
549 if (cmd) {
550 reply->offset = (__u16)((char *)cmd -
551 (char *)iob->data);
552 keep_reply = reply->callback(card,
553 reply,
554 (unsigned long)cmd);
555 } else
556 keep_reply = reply->callback(card,
557 reply,
558 (unsigned long)iob);
559 }
560 if (cmd)
561 reply->rc = (u16) cmd->hdr.return_code;
562 else if (iob->rc)
563 reply->rc = iob->rc;
564 if (keep_reply) {
565 spin_lock_irqsave(&card->lock, flags);
566 list_add_tail(&reply->list,
567 &card->cmd_waiter_list);
568 spin_unlock_irqrestore(&card->lock, flags);
569 } else {
570 atomic_inc(&reply->received);
571 wake_up(&reply->wait_q);
572 }
573 qeth_put_reply(reply);
574 goto out;
575 }
576 }
577 spin_unlock_irqrestore(&card->lock, flags);
578out:
579 memcpy(&card->seqno.pdu_hdr_ack,
580 QETH_PDU_HEADER_SEQ_NO(iob->data),
581 QETH_SEQ_NO_LENGTH);
582 qeth_release_buffer(channel, iob);
583}
584
585static int qeth_setup_channel(struct qeth_channel *channel)
586{
587 int cnt;
588
589 QETH_DBF_TEXT(SETUP, 2, "setupch");
590 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
591 channel->iob[cnt].data =
592 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
593 if (channel->iob[cnt].data == NULL)
594 break;
595 channel->iob[cnt].state = BUF_STATE_FREE;
596 channel->iob[cnt].channel = channel;
597 channel->iob[cnt].callback = qeth_send_control_data_cb;
598 channel->iob[cnt].rc = 0;
599 }
600 if (cnt < QETH_CMD_BUFFER_NO) {
601 while (cnt-- > 0)
602 kfree(channel->iob[cnt].data);
603 return -ENOMEM;
604 }
605 channel->buf_no = 0;
606 channel->io_buf_no = 0;
607 atomic_set(&channel->irq_pending, 0);
608 spin_lock_init(&channel->iob_lock);
609
610 init_waitqueue_head(&channel->wait_q);
611 return 0;
612}
613
614static int qeth_set_thread_start_bit(struct qeth_card *card,
615 unsigned long thread)
616{
617 unsigned long flags;
618
619 spin_lock_irqsave(&card->thread_mask_lock, flags);
620 if (!(card->thread_allowed_mask & thread) ||
621 (card->thread_start_mask & thread)) {
622 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
623 return -EPERM;
624 }
625 card->thread_start_mask |= thread;
626 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
627 return 0;
628}
629
630void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
631{
632 unsigned long flags;
633
634 spin_lock_irqsave(&card->thread_mask_lock, flags);
635 card->thread_start_mask &= ~thread;
636 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
637 wake_up(&card->wait_q);
638}
639EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
640
641void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
642{
643 unsigned long flags;
644
645 spin_lock_irqsave(&card->thread_mask_lock, flags);
646 card->thread_running_mask &= ~thread;
647 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
648 wake_up(&card->wait_q);
649}
650EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
651
652static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
653{
654 unsigned long flags;
655 int rc = 0;
656
657 spin_lock_irqsave(&card->thread_mask_lock, flags);
658 if (card->thread_start_mask & thread) {
659 if ((card->thread_allowed_mask & thread) &&
660 !(card->thread_running_mask & thread)) {
661 rc = 1;
662 card->thread_start_mask &= ~thread;
663 card->thread_running_mask |= thread;
664 } else
665 rc = -EPERM;
666 }
667 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
668 return rc;
669}
670
671int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
672{
673 int rc = 0;
674
675 wait_event(card->wait_q,
676 (rc = __qeth_do_run_thread(card, thread)) >= 0);
677 return rc;
678}
679EXPORT_SYMBOL_GPL(qeth_do_run_thread);
680
681void qeth_schedule_recovery(struct qeth_card *card)
682{
683 QETH_CARD_TEXT(card, 2, "startrec");
684 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
685 schedule_work(&card->kernel_thread_starter);
686}
687EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
688
689static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
690{
691 int dstat, cstat;
692 char *sense;
693 struct qeth_card *card;
694
695 sense = (char *) irb->ecw;
696 cstat = irb->scsw.cmd.cstat;
697 dstat = irb->scsw.cmd.dstat;
698 card = CARD_FROM_CDEV(cdev);
699
700 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
701 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
702 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
703 QETH_CARD_TEXT(card, 2, "CGENCHK");
704 dev_warn(&cdev->dev, "The qeth device driver "
705 "failed to recover an error on the device\n");
706 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
707 dev_name(&cdev->dev), dstat, cstat);
708 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
709 16, 1, irb, 64, 1);
710 return 1;
711 }
712
713 if (dstat & DEV_STAT_UNIT_CHECK) {
714 if (sense[SENSE_RESETTING_EVENT_BYTE] &
715 SENSE_RESETTING_EVENT_FLAG) {
716 QETH_CARD_TEXT(card, 2, "REVIND");
717 return 1;
718 }
719 if (sense[SENSE_COMMAND_REJECT_BYTE] &
720 SENSE_COMMAND_REJECT_FLAG) {
721 QETH_CARD_TEXT(card, 2, "CMDREJi");
722 return 1;
723 }
724 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
725 QETH_CARD_TEXT(card, 2, "AFFE");
726 return 1;
727 }
728 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
729 QETH_CARD_TEXT(card, 2, "ZEROSEN");
730 return 0;
731 }
732 QETH_CARD_TEXT(card, 2, "DGENCHK");
733 return 1;
734 }
735 return 0;
736}
737
738static long __qeth_check_irb_error(struct ccw_device *cdev,
739 unsigned long intparm, struct irb *irb)
740{
741 struct qeth_card *card;
742
743 card = CARD_FROM_CDEV(cdev);
744
745 if (!IS_ERR(irb))
746 return 0;
747
748 switch (PTR_ERR(irb)) {
749 case -EIO:
750 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
751 dev_name(&cdev->dev));
752 QETH_CARD_TEXT(card, 2, "ckirberr");
753 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
754 break;
755 case -ETIMEDOUT:
756 dev_warn(&cdev->dev, "A hardware operation timed out"
757 " on the device\n");
758 QETH_CARD_TEXT(card, 2, "ckirberr");
759 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
760 if (intparm == QETH_RCD_PARM) {
761 if (card && (card->data.ccwdev == cdev)) {
762 card->data.state = CH_STATE_DOWN;
763 wake_up(&card->wait_q);
764 }
765 }
766 break;
767 default:
768 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
769 dev_name(&cdev->dev), PTR_ERR(irb));
770 QETH_CARD_TEXT(card, 2, "ckirberr");
771 QETH_CARD_TEXT(card, 2, " rc???");
772 }
773 return PTR_ERR(irb);
774}
775
776static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
777 struct irb *irb)
778{
779 int rc;
780 int cstat, dstat;
781 struct qeth_cmd_buffer *buffer;
782 struct qeth_channel *channel;
783 struct qeth_card *card;
784 struct qeth_cmd_buffer *iob;
785 __u8 index;
786
787 if (__qeth_check_irb_error(cdev, intparm, irb))
788 return;
789 cstat = irb->scsw.cmd.cstat;
790 dstat = irb->scsw.cmd.dstat;
791
792 card = CARD_FROM_CDEV(cdev);
793 if (!card)
794 return;
795
796 QETH_CARD_TEXT(card, 5, "irq");
797
798 if (card->read.ccwdev == cdev) {
799 channel = &card->read;
800 QETH_CARD_TEXT(card, 5, "read");
801 } else if (card->write.ccwdev == cdev) {
802 channel = &card->write;
803 QETH_CARD_TEXT(card, 5, "write");
804 } else {
805 channel = &card->data;
806 QETH_CARD_TEXT(card, 5, "data");
807 }
808 atomic_set(&channel->irq_pending, 0);
809
810 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
811 channel->state = CH_STATE_STOPPED;
812
813 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
814 channel->state = CH_STATE_HALTED;
815
816
817 if ((channel == &card->data) && (intparm != 0) &&
818 (intparm != QETH_RCD_PARM))
819 goto out;
820
821 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
822 QETH_CARD_TEXT(card, 6, "clrchpar");
823
824 intparm = 0;
825 }
826 if (intparm == QETH_HALT_CHANNEL_PARM) {
827 QETH_CARD_TEXT(card, 6, "hltchpar");
828
829 intparm = 0;
830 }
831 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
832 (dstat & DEV_STAT_UNIT_CHECK) ||
833 (cstat)) {
834 if (irb->esw.esw0.erw.cons) {
835 dev_warn(&channel->ccwdev->dev,
836 "The qeth device driver failed to recover "
837 "an error on the device\n");
838 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
839 "0x%X dstat 0x%X\n",
840 dev_name(&channel->ccwdev->dev), cstat, dstat);
841 print_hex_dump(KERN_WARNING, "qeth: irb ",
842 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
843 print_hex_dump(KERN_WARNING, "qeth: sense data ",
844 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
845 }
846 if (intparm == QETH_RCD_PARM) {
847 channel->state = CH_STATE_DOWN;
848 goto out;
849 }
850 rc = qeth_get_problem(cdev, irb);
851 if (rc) {
852 qeth_clear_ipacmd_list(card);
853 qeth_schedule_recovery(card);
854 goto out;
855 }
856 }
857
858 if (intparm == QETH_RCD_PARM) {
859 channel->state = CH_STATE_RCD_DONE;
860 goto out;
861 }
862 if (intparm) {
863 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
864 buffer->state = BUF_STATE_PROCESSED;
865 }
866 if (channel == &card->data)
867 return;
868 if (channel == &card->read &&
869 channel->state == CH_STATE_UP)
870 qeth_issue_next_read(card);
871
872 iob = channel->iob;
873 index = channel->buf_no;
874 while (iob[index].state == BUF_STATE_PROCESSED) {
875 if (iob[index].callback != NULL)
876 iob[index].callback(channel, iob + index);
877
878 index = (index + 1) % QETH_CMD_BUFFER_NO;
879 }
880 channel->buf_no = index;
881out:
882 wake_up(&card->wait_q);
883 return;
884}
885
886static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
887 struct qeth_qdio_out_buffer *buf)
888{
889 int i;
890 struct sk_buff *skb;
891
892
893 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
894 atomic_dec(&queue->set_pci_flags_count);
895
896 skb = skb_dequeue(&buf->skb_list);
897 while (skb) {
898 atomic_dec(&skb->users);
899 dev_kfree_skb_any(skb);
900 skb = skb_dequeue(&buf->skb_list);
901 }
902 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
903 if (buf->buffer->element[i].addr && buf->is_header[i])
904 kmem_cache_free(qeth_core_header_cache,
905 buf->buffer->element[i].addr);
906 buf->is_header[i] = 0;
907 buf->buffer->element[i].length = 0;
908 buf->buffer->element[i].addr = NULL;
909 buf->buffer->element[i].eflags = 0;
910 buf->buffer->element[i].sflags = 0;
911 }
912 buf->buffer->element[15].eflags = 0;
913 buf->buffer->element[15].sflags = 0;
914 buf->next_element_to_fill = 0;
915 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
916}
917
918void qeth_clear_qdio_buffers(struct qeth_card *card)
919{
920 int i, j;
921
922 QETH_CARD_TEXT(card, 2, "clearqdbf");
923
924 for (i = 0; i < card->qdio.no_out_queues; ++i)
925 if (card->qdio.out_qs[i]) {
926 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
927 qeth_clear_output_buffer(card->qdio.out_qs[i],
928 &card->qdio.out_qs[i]->bufs[j]);
929 }
930}
931EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
932
933static void qeth_free_buffer_pool(struct qeth_card *card)
934{
935 struct qeth_buffer_pool_entry *pool_entry, *tmp;
936 int i = 0;
937 list_for_each_entry_safe(pool_entry, tmp,
938 &card->qdio.init_pool.entry_list, init_list){
939 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
940 free_page((unsigned long)pool_entry->elements[i]);
941 list_del(&pool_entry->init_list);
942 kfree(pool_entry);
943 }
944}
945
946static void qeth_free_qdio_buffers(struct qeth_card *card)
947{
948 int i, j;
949
950 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
951 QETH_QDIO_UNINITIALIZED)
952 return;
953 kfree(card->qdio.in_q);
954 card->qdio.in_q = NULL;
955
956 qeth_free_buffer_pool(card);
957
958 if (card->qdio.out_qs) {
959 for (i = 0; i < card->qdio.no_out_queues; ++i) {
960 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
961 qeth_clear_output_buffer(card->qdio.out_qs[i],
962 &card->qdio.out_qs[i]->bufs[j]);
963 kfree(card->qdio.out_qs[i]);
964 }
965 kfree(card->qdio.out_qs);
966 card->qdio.out_qs = NULL;
967 }
968}
969
970static void qeth_clean_channel(struct qeth_channel *channel)
971{
972 int cnt;
973
974 QETH_DBF_TEXT(SETUP, 2, "freech");
975 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
976 kfree(channel->iob[cnt].data);
977}
978
979static void qeth_get_channel_path_desc(struct qeth_card *card)
980{
981 struct ccw_device *ccwdev;
982 struct channelPath_dsc {
983 u8 flags;
984 u8 lsn;
985 u8 desc;
986 u8 chpid;
987 u8 swla;
988 u8 zeroes;
989 u8 chla;
990 u8 chpp;
991 } *chp_dsc;
992
993 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
994
995 ccwdev = card->data.ccwdev;
996 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
997 if (chp_dsc != NULL) {
998
999 if ((chp_dsc->chpp & 0x02) == 0x02) {
1000 if ((atomic_read(&card->qdio.state) !=
1001 QETH_QDIO_UNINITIALIZED) &&
1002 (card->qdio.no_out_queues == 4))
1003
1004 qeth_free_qdio_buffers(card);
1005 card->qdio.no_out_queues = 1;
1006 if (card->qdio.default_out_queue != 0)
1007 dev_info(&card->gdev->dev,
1008 "Priority Queueing not supported\n");
1009 card->qdio.default_out_queue = 0;
1010 } else {
1011 if ((atomic_read(&card->qdio.state) !=
1012 QETH_QDIO_UNINITIALIZED) &&
1013 (card->qdio.no_out_queues == 1)) {
1014
1015 qeth_free_qdio_buffers(card);
1016 card->qdio.default_out_queue = 2;
1017 }
1018 card->qdio.no_out_queues = 4;
1019 }
1020 card->info.func_level = 0x4100 + chp_dsc->desc;
1021 kfree(chp_dsc);
1022 }
1023 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1024 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1025 return;
1026}
1027
1028static void qeth_init_qdio_info(struct qeth_card *card)
1029{
1030 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1031 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1032
1033 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1034 if (card->info.type == QETH_CARD_TYPE_IQD)
1035 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1036 else
1037 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1038 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1039 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1040 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1041}
1042
1043static void qeth_set_intial_options(struct qeth_card *card)
1044{
1045 card->options.route4.type = NO_ROUTER;
1046 card->options.route6.type = NO_ROUTER;
1047 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1048 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1049 card->options.fake_broadcast = 0;
1050 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1051 card->options.performance_stats = 0;
1052 card->options.rx_sg_cb = QETH_RX_SG_CB;
1053 card->options.isolation = ISOLATION_MODE_NONE;
1054}
1055
1056static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1057{
1058 unsigned long flags;
1059 int rc = 0;
1060
1061 spin_lock_irqsave(&card->thread_mask_lock, flags);
1062 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1063 (u8) card->thread_start_mask,
1064 (u8) card->thread_allowed_mask,
1065 (u8) card->thread_running_mask);
1066 rc = (card->thread_start_mask & thread);
1067 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1068 return rc;
1069}
1070
1071static void qeth_start_kernel_thread(struct work_struct *work)
1072{
1073 struct qeth_card *card = container_of(work, struct qeth_card,
1074 kernel_thread_starter);
1075 QETH_CARD_TEXT(card , 2, "strthrd");
1076
1077 if (card->read.state != CH_STATE_UP &&
1078 card->write.state != CH_STATE_UP)
1079 return;
1080 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1081 kthread_run(card->discipline.recover, (void *) card,
1082 "qeth_recover");
1083}
1084
1085static int qeth_setup_card(struct qeth_card *card)
1086{
1087
1088 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1089 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1090
1091 card->read.state = CH_STATE_DOWN;
1092 card->write.state = CH_STATE_DOWN;
1093 card->data.state = CH_STATE_DOWN;
1094 card->state = CARD_STATE_DOWN;
1095 card->lan_online = 0;
1096 card->read_or_write_problem = 0;
1097 card->dev = NULL;
1098 spin_lock_init(&card->vlanlock);
1099 spin_lock_init(&card->mclock);
1100 spin_lock_init(&card->lock);
1101 spin_lock_init(&card->ip_lock);
1102 spin_lock_init(&card->thread_mask_lock);
1103 mutex_init(&card->conf_mutex);
1104 mutex_init(&card->discipline_mutex);
1105 card->thread_start_mask = 0;
1106 card->thread_allowed_mask = 0;
1107 card->thread_running_mask = 0;
1108 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1109 INIT_LIST_HEAD(&card->ip_list);
1110 INIT_LIST_HEAD(card->ip_tbd_list);
1111 INIT_LIST_HEAD(&card->cmd_waiter_list);
1112 init_waitqueue_head(&card->wait_q);
1113
1114 qeth_set_intial_options(card);
1115
1116 INIT_LIST_HEAD(&card->ipato.entries);
1117 card->ipato.enabled = 0;
1118 card->ipato.invert4 = 0;
1119 card->ipato.invert6 = 0;
1120
1121 qeth_init_qdio_info(card);
1122 return 0;
1123}
1124
1125static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1126{
1127 struct qeth_card *card = container_of(slr, struct qeth_card,
1128 qeth_service_level);
1129 if (card->info.mcl_level[0])
1130 seq_printf(m, "qeth: %s firmware level %s\n",
1131 CARD_BUS_ID(card), card->info.mcl_level);
1132}
1133
1134static struct qeth_card *qeth_alloc_card(void)
1135{
1136 struct qeth_card *card;
1137
1138 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1139 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1140 if (!card)
1141 goto out;
1142 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1143 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1144 if (!card->ip_tbd_list) {
1145 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1146 goto out_card;
1147 }
1148 if (qeth_setup_channel(&card->read))
1149 goto out_ip;
1150 if (qeth_setup_channel(&card->write))
1151 goto out_channel;
1152 card->options.layer2 = -1;
1153 card->qeth_service_level.seq_print = qeth_core_sl_print;
1154 register_service_level(&card->qeth_service_level);
1155 return card;
1156
1157out_channel:
1158 qeth_clean_channel(&card->read);
1159out_ip:
1160 kfree(card->ip_tbd_list);
1161out_card:
1162 kfree(card);
1163out:
1164 return NULL;
1165}
1166
1167static int qeth_determine_card_type(struct qeth_card *card)
1168{
1169 int i = 0;
1170
1171 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1172
1173 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1174 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1175 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1176 if ((CARD_RDEV(card)->id.dev_type ==
1177 known_devices[i][QETH_DEV_TYPE_IND]) &&
1178 (CARD_RDEV(card)->id.dev_model ==
1179 known_devices[i][QETH_DEV_MODEL_IND])) {
1180 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1181 card->qdio.no_out_queues =
1182 known_devices[i][QETH_QUEUE_NO_IND];
1183 card->info.is_multicast_different =
1184 known_devices[i][QETH_MULTICAST_IND];
1185 qeth_get_channel_path_desc(card);
1186 return 0;
1187 }
1188 i++;
1189 }
1190 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1191 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1192 "unknown type\n");
1193 return -ENOENT;
1194}
1195
1196static int qeth_clear_channel(struct qeth_channel *channel)
1197{
1198 unsigned long flags;
1199 struct qeth_card *card;
1200 int rc;
1201
1202 card = CARD_FROM_CDEV(channel->ccwdev);
1203 QETH_CARD_TEXT(card, 3, "clearch");
1204 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1205 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1206 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1207
1208 if (rc)
1209 return rc;
1210 rc = wait_event_interruptible_timeout(card->wait_q,
1211 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1212 if (rc == -ERESTARTSYS)
1213 return rc;
1214 if (channel->state != CH_STATE_STOPPED)
1215 return -ETIME;
1216 channel->state = CH_STATE_DOWN;
1217 return 0;
1218}
1219
1220static int qeth_halt_channel(struct qeth_channel *channel)
1221{
1222 unsigned long flags;
1223 struct qeth_card *card;
1224 int rc;
1225
1226 card = CARD_FROM_CDEV(channel->ccwdev);
1227 QETH_CARD_TEXT(card, 3, "haltch");
1228 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1229 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1230 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1231
1232 if (rc)
1233 return rc;
1234 rc = wait_event_interruptible_timeout(card->wait_q,
1235 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1236 if (rc == -ERESTARTSYS)
1237 return rc;
1238 if (channel->state != CH_STATE_HALTED)
1239 return -ETIME;
1240 return 0;
1241}
1242
1243static int qeth_halt_channels(struct qeth_card *card)
1244{
1245 int rc1 = 0, rc2 = 0, rc3 = 0;
1246
1247 QETH_CARD_TEXT(card, 3, "haltchs");
1248 rc1 = qeth_halt_channel(&card->read);
1249 rc2 = qeth_halt_channel(&card->write);
1250 rc3 = qeth_halt_channel(&card->data);
1251 if (rc1)
1252 return rc1;
1253 if (rc2)
1254 return rc2;
1255 return rc3;
1256}
1257
1258static int qeth_clear_channels(struct qeth_card *card)
1259{
1260 int rc1 = 0, rc2 = 0, rc3 = 0;
1261
1262 QETH_CARD_TEXT(card, 3, "clearchs");
1263 rc1 = qeth_clear_channel(&card->read);
1264 rc2 = qeth_clear_channel(&card->write);
1265 rc3 = qeth_clear_channel(&card->data);
1266 if (rc1)
1267 return rc1;
1268 if (rc2)
1269 return rc2;
1270 return rc3;
1271}
1272
1273static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1274{
1275 int rc = 0;
1276
1277 QETH_CARD_TEXT(card, 3, "clhacrd");
1278
1279 if (halt)
1280 rc = qeth_halt_channels(card);
1281 if (rc)
1282 return rc;
1283 return qeth_clear_channels(card);
1284}
1285
1286int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1287{
1288 int rc = 0;
1289
1290 QETH_CARD_TEXT(card, 3, "qdioclr");
1291 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1292 QETH_QDIO_CLEANING)) {
1293 case QETH_QDIO_ESTABLISHED:
1294 if (card->info.type == QETH_CARD_TYPE_IQD)
1295 rc = qdio_shutdown(CARD_DDEV(card),
1296 QDIO_FLAG_CLEANUP_USING_HALT);
1297 else
1298 rc = qdio_shutdown(CARD_DDEV(card),
1299 QDIO_FLAG_CLEANUP_USING_CLEAR);
1300 if (rc)
1301 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1302 qdio_free(CARD_DDEV(card));
1303 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1304 break;
1305 case QETH_QDIO_CLEANING:
1306 return rc;
1307 default:
1308 break;
1309 }
1310 rc = qeth_clear_halt_card(card, use_halt);
1311 if (rc)
1312 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1313 card->state = CARD_STATE_DOWN;
1314 return rc;
1315}
1316EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1317
1318static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1319 int *length)
1320{
1321 struct ciw *ciw;
1322 char *rcd_buf;
1323 int ret;
1324 struct qeth_channel *channel = &card->data;
1325 unsigned long flags;
1326
1327
1328
1329
1330 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1331 if (!ciw || ciw->cmd == 0)
1332 return -EOPNOTSUPP;
1333 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1334 if (!rcd_buf)
1335 return -ENOMEM;
1336
1337 channel->ccw.cmd_code = ciw->cmd;
1338 channel->ccw.cda = (__u32) __pa(rcd_buf);
1339 channel->ccw.count = ciw->count;
1340 channel->ccw.flags = CCW_FLAG_SLI;
1341 channel->state = CH_STATE_RCD;
1342 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1343 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1344 QETH_RCD_PARM, LPM_ANYPATH, 0,
1345 QETH_RCD_TIMEOUT);
1346 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1347 if (!ret)
1348 wait_event(card->wait_q,
1349 (channel->state == CH_STATE_RCD_DONE ||
1350 channel->state == CH_STATE_DOWN));
1351 if (channel->state == CH_STATE_DOWN)
1352 ret = -EIO;
1353 else
1354 channel->state = CH_STATE_DOWN;
1355 if (ret) {
1356 kfree(rcd_buf);
1357 *buffer = NULL;
1358 *length = 0;
1359 } else {
1360 *length = ciw->count;
1361 *buffer = rcd_buf;
1362 }
1363 return ret;
1364}
1365
1366static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1367{
1368 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1369 card->info.chpid = prcd[30];
1370 card->info.unit_addr2 = prcd[31];
1371 card->info.cula = prcd[63];
1372 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1373 (prcd[0x11] == _ascebc['M']));
1374}
1375
1376static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1377{
1378 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1379
1380 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1381 card->info.blkt.time_total = 250;
1382 card->info.blkt.inter_packet = 5;
1383 card->info.blkt.inter_packet_jumbo = 15;
1384 } else {
1385 card->info.blkt.time_total = 0;
1386 card->info.blkt.inter_packet = 0;
1387 card->info.blkt.inter_packet_jumbo = 0;
1388 }
1389}
1390
1391static void qeth_init_tokens(struct qeth_card *card)
1392{
1393 card->token.issuer_rm_w = 0x00010103UL;
1394 card->token.cm_filter_w = 0x00010108UL;
1395 card->token.cm_connection_w = 0x0001010aUL;
1396 card->token.ulp_filter_w = 0x0001010bUL;
1397 card->token.ulp_connection_w = 0x0001010dUL;
1398}
1399
1400static void qeth_init_func_level(struct qeth_card *card)
1401{
1402 switch (card->info.type) {
1403 case QETH_CARD_TYPE_IQD:
1404 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1405 break;
1406 case QETH_CARD_TYPE_OSD:
1407 case QETH_CARD_TYPE_OSN:
1408 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1409 break;
1410 default:
1411 break;
1412 }
1413}
1414
1415static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1416 void (*idx_reply_cb)(struct qeth_channel *,
1417 struct qeth_cmd_buffer *))
1418{
1419 struct qeth_cmd_buffer *iob;
1420 unsigned long flags;
1421 int rc;
1422 struct qeth_card *card;
1423
1424 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1425 card = CARD_FROM_CDEV(channel->ccwdev);
1426 iob = qeth_get_buffer(channel);
1427 iob->callback = idx_reply_cb;
1428 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1429 channel->ccw.count = QETH_BUFSIZE;
1430 channel->ccw.cda = (__u32) __pa(iob->data);
1431
1432 wait_event(card->wait_q,
1433 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1434 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1435 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1436 rc = ccw_device_start(channel->ccwdev,
1437 &channel->ccw, (addr_t) iob, 0, 0);
1438 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1439
1440 if (rc) {
1441 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1442 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1443 atomic_set(&channel->irq_pending, 0);
1444 wake_up(&card->wait_q);
1445 return rc;
1446 }
1447 rc = wait_event_interruptible_timeout(card->wait_q,
1448 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1449 if (rc == -ERESTARTSYS)
1450 return rc;
1451 if (channel->state != CH_STATE_UP) {
1452 rc = -ETIME;
1453 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1454 qeth_clear_cmd_buffers(channel);
1455 } else
1456 rc = 0;
1457 return rc;
1458}
1459
1460static int qeth_idx_activate_channel(struct qeth_channel *channel,
1461 void (*idx_reply_cb)(struct qeth_channel *,
1462 struct qeth_cmd_buffer *))
1463{
1464 struct qeth_card *card;
1465 struct qeth_cmd_buffer *iob;
1466 unsigned long flags;
1467 __u16 temp;
1468 __u8 tmp;
1469 int rc;
1470 struct ccw_dev_id temp_devid;
1471
1472 card = CARD_FROM_CDEV(channel->ccwdev);
1473
1474 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1475
1476 iob = qeth_get_buffer(channel);
1477 iob->callback = idx_reply_cb;
1478 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1479 channel->ccw.count = IDX_ACTIVATE_SIZE;
1480 channel->ccw.cda = (__u32) __pa(iob->data);
1481 if (channel == &card->write) {
1482 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1483 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1484 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1485 card->seqno.trans_hdr++;
1486 } else {
1487 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1488 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1489 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1490 }
1491 tmp = ((__u8)card->info.portno) | 0x80;
1492 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1493 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1494 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1495 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1496 &card->info.func_level, sizeof(__u16));
1497 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1498 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1499 temp = (card->info.cula << 8) + card->info.unit_addr2;
1500 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1501
1502 wait_event(card->wait_q,
1503 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1504 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1505 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1506 rc = ccw_device_start(channel->ccwdev,
1507 &channel->ccw, (addr_t) iob, 0, 0);
1508 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1509
1510 if (rc) {
1511 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1512 rc);
1513 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1514 atomic_set(&channel->irq_pending, 0);
1515 wake_up(&card->wait_q);
1516 return rc;
1517 }
1518 rc = wait_event_interruptible_timeout(card->wait_q,
1519 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1520 if (rc == -ERESTARTSYS)
1521 return rc;
1522 if (channel->state != CH_STATE_ACTIVATING) {
1523 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1524 " failed to recover an error on the device\n");
1525 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1526 dev_name(&channel->ccwdev->dev));
1527 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1528 qeth_clear_cmd_buffers(channel);
1529 return -ETIME;
1530 }
1531 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1532}
1533
1534static int qeth_peer_func_level(int level)
1535{
1536 if ((level & 0xff) == 8)
1537 return (level & 0xff) + 0x400;
1538 if (((level >> 8) & 3) == 1)
1539 return (level & 0xff) + 0x200;
1540 return level;
1541}
1542
1543static void qeth_idx_write_cb(struct qeth_channel *channel,
1544 struct qeth_cmd_buffer *iob)
1545{
1546 struct qeth_card *card;
1547 __u16 temp;
1548
1549 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1550
1551 if (channel->state == CH_STATE_DOWN) {
1552 channel->state = CH_STATE_ACTIVATING;
1553 goto out;
1554 }
1555 card = CARD_FROM_CDEV(channel->ccwdev);
1556
1557 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1558 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1559 dev_err(&card->write.ccwdev->dev,
1560 "The adapter is used exclusively by another "
1561 "host\n");
1562 else
1563 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1564 " negative reply\n",
1565 dev_name(&card->write.ccwdev->dev));
1566 goto out;
1567 }
1568 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1569 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1570 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1571 "function level mismatch (sent: 0x%x, received: "
1572 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1573 card->info.func_level, temp);
1574 goto out;
1575 }
1576 channel->state = CH_STATE_UP;
1577out:
1578 qeth_release_buffer(channel, iob);
1579}
1580
1581static void qeth_idx_read_cb(struct qeth_channel *channel,
1582 struct qeth_cmd_buffer *iob)
1583{
1584 struct qeth_card *card;
1585 __u16 temp;
1586
1587 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1588 if (channel->state == CH_STATE_DOWN) {
1589 channel->state = CH_STATE_ACTIVATING;
1590 goto out;
1591 }
1592
1593 card = CARD_FROM_CDEV(channel->ccwdev);
1594 if (qeth_check_idx_response(card, iob->data))
1595 goto out;
1596
1597 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1598 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1599 case QETH_IDX_ACT_ERR_EXCL:
1600 dev_err(&card->write.ccwdev->dev,
1601 "The adapter is used exclusively by another "
1602 "host\n");
1603 break;
1604 case QETH_IDX_ACT_ERR_AUTH:
1605 case QETH_IDX_ACT_ERR_AUTH_USER:
1606 dev_err(&card->read.ccwdev->dev,
1607 "Setting the device online failed because of "
1608 "insufficient authorization\n");
1609 break;
1610 default:
1611 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1612 " negative reply\n",
1613 dev_name(&card->read.ccwdev->dev));
1614 }
1615 QETH_CARD_TEXT_(card, 2, "idxread%c",
1616 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1617 goto out;
1618 }
1619
1620
1621
1622
1623
1624 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1625 (card->info.type == QETH_CARD_TYPE_OSD))
1626 card->info.portname_required = 1;
1627
1628 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1629 if (temp != qeth_peer_func_level(card->info.func_level)) {
1630 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1631 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1632 dev_name(&card->read.ccwdev->dev),
1633 card->info.func_level, temp);
1634 goto out;
1635 }
1636 memcpy(&card->token.issuer_rm_r,
1637 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1638 QETH_MPC_TOKEN_LENGTH);
1639 memcpy(&card->info.mcl_level[0],
1640 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1641 channel->state = CH_STATE_UP;
1642out:
1643 qeth_release_buffer(channel, iob);
1644}
1645
1646void qeth_prepare_control_data(struct qeth_card *card, int len,
1647 struct qeth_cmd_buffer *iob)
1648{
1649 qeth_setup_ccw(&card->write, iob->data, len);
1650 iob->callback = qeth_release_buffer;
1651
1652 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1653 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1654 card->seqno.trans_hdr++;
1655 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1656 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1657 card->seqno.pdu_hdr++;
1658 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1659 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1660 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1661}
1662EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1663
1664int qeth_send_control_data(struct qeth_card *card, int len,
1665 struct qeth_cmd_buffer *iob,
1666 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1667 unsigned long),
1668 void *reply_param)
1669{
1670 int rc;
1671 unsigned long flags;
1672 struct qeth_reply *reply = NULL;
1673 unsigned long timeout, event_timeout;
1674 struct qeth_ipa_cmd *cmd;
1675
1676 QETH_CARD_TEXT(card, 2, "sendctl");
1677
1678 if (card->read_or_write_problem) {
1679 qeth_release_buffer(iob->channel, iob);
1680 return -EIO;
1681 }
1682 reply = qeth_alloc_reply(card);
1683 if (!reply) {
1684 return -ENOMEM;
1685 }
1686 reply->callback = reply_cb;
1687 reply->param = reply_param;
1688 if (card->state == CARD_STATE_DOWN)
1689 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1690 else
1691 reply->seqno = card->seqno.ipa++;
1692 init_waitqueue_head(&reply->wait_q);
1693 spin_lock_irqsave(&card->lock, flags);
1694 list_add_tail(&reply->list, &card->cmd_waiter_list);
1695 spin_unlock_irqrestore(&card->lock, flags);
1696 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1697
1698 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1699 qeth_prepare_control_data(card, len, iob);
1700
1701 if (IS_IPA(iob->data))
1702 event_timeout = QETH_IPA_TIMEOUT;
1703 else
1704 event_timeout = QETH_TIMEOUT;
1705 timeout = jiffies + event_timeout;
1706
1707 QETH_CARD_TEXT(card, 6, "noirqpnd");
1708 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1709 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1710 (addr_t) iob, 0, 0);
1711 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1712 if (rc) {
1713 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1714 "ccw_device_start rc = %i\n",
1715 dev_name(&card->write.ccwdev->dev), rc);
1716 QETH_CARD_TEXT_(card, 2, " err%d", rc);
1717 spin_lock_irqsave(&card->lock, flags);
1718 list_del_init(&reply->list);
1719 qeth_put_reply(reply);
1720 spin_unlock_irqrestore(&card->lock, flags);
1721 qeth_release_buffer(iob->channel, iob);
1722 atomic_set(&card->write.irq_pending, 0);
1723 wake_up(&card->wait_q);
1724 return rc;
1725 }
1726
1727
1728
1729 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1730 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1731 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1732 if (!wait_event_timeout(reply->wait_q,
1733 atomic_read(&reply->received), event_timeout))
1734 goto time_err;
1735 } else {
1736 while (!atomic_read(&reply->received)) {
1737 if (time_after(jiffies, timeout))
1738 goto time_err;
1739 cpu_relax();
1740 };
1741 }
1742
1743 if (reply->rc == -EIO)
1744 goto error;
1745 rc = reply->rc;
1746 qeth_put_reply(reply);
1747 return rc;
1748
1749time_err:
1750 reply->rc = -ETIME;
1751 spin_lock_irqsave(&reply->card->lock, flags);
1752 list_del_init(&reply->list);
1753 spin_unlock_irqrestore(&reply->card->lock, flags);
1754 atomic_inc(&reply->received);
1755error:
1756 atomic_set(&card->write.irq_pending, 0);
1757 qeth_release_buffer(iob->channel, iob);
1758 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
1759 rc = reply->rc;
1760 qeth_put_reply(reply);
1761 return rc;
1762}
1763EXPORT_SYMBOL_GPL(qeth_send_control_data);
1764
1765static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1766 unsigned long data)
1767{
1768 struct qeth_cmd_buffer *iob;
1769
1770 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1771
1772 iob = (struct qeth_cmd_buffer *) data;
1773 memcpy(&card->token.cm_filter_r,
1774 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1775 QETH_MPC_TOKEN_LENGTH);
1776 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1777 return 0;
1778}
1779
1780static int qeth_cm_enable(struct qeth_card *card)
1781{
1782 int rc;
1783 struct qeth_cmd_buffer *iob;
1784
1785 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1786
1787 iob = qeth_wait_for_buffer(&card->write);
1788 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1789 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1790 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1791 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1792 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1793
1794 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1795 qeth_cm_enable_cb, NULL);
1796 return rc;
1797}
1798
1799static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1800 unsigned long data)
1801{
1802
1803 struct qeth_cmd_buffer *iob;
1804
1805 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1806
1807 iob = (struct qeth_cmd_buffer *) data;
1808 memcpy(&card->token.cm_connection_r,
1809 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1810 QETH_MPC_TOKEN_LENGTH);
1811 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1812 return 0;
1813}
1814
1815static int qeth_cm_setup(struct qeth_card *card)
1816{
1817 int rc;
1818 struct qeth_cmd_buffer *iob;
1819
1820 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1821
1822 iob = qeth_wait_for_buffer(&card->write);
1823 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1824 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1825 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1826 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1827 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1828 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1829 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1830 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1831 qeth_cm_setup_cb, NULL);
1832 return rc;
1833
1834}
1835
1836static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1837{
1838 switch (card->info.type) {
1839 case QETH_CARD_TYPE_UNKNOWN:
1840 return 1500;
1841 case QETH_CARD_TYPE_IQD:
1842 return card->info.max_mtu;
1843 case QETH_CARD_TYPE_OSD:
1844 switch (card->info.link_type) {
1845 case QETH_LINK_TYPE_HSTR:
1846 case QETH_LINK_TYPE_LANE_TR:
1847 return 2000;
1848 default:
1849 return 1492;
1850 }
1851 case QETH_CARD_TYPE_OSM:
1852 case QETH_CARD_TYPE_OSX:
1853 return 1492;
1854 default:
1855 return 1500;
1856 }
1857}
1858
1859static inline int qeth_get_mtu_outof_framesize(int framesize)
1860{
1861 switch (framesize) {
1862 case 0x4000:
1863 return 8192;
1864 case 0x6000:
1865 return 16384;
1866 case 0xa000:
1867 return 32768;
1868 case 0xffff:
1869 return 57344;
1870 default:
1871 return 0;
1872 }
1873}
1874
1875static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1876{
1877 switch (card->info.type) {
1878 case QETH_CARD_TYPE_OSD:
1879 case QETH_CARD_TYPE_OSM:
1880 case QETH_CARD_TYPE_OSX:
1881 case QETH_CARD_TYPE_IQD:
1882 return ((mtu >= 576) &&
1883 (mtu <= card->info.max_mtu));
1884 case QETH_CARD_TYPE_OSN:
1885 case QETH_CARD_TYPE_UNKNOWN:
1886 default:
1887 return 1;
1888 }
1889}
1890
1891static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1892 unsigned long data)
1893{
1894
1895 __u16 mtu, framesize;
1896 __u16 len;
1897 __u8 link_type;
1898 struct qeth_cmd_buffer *iob;
1899
1900 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1901
1902 iob = (struct qeth_cmd_buffer *) data;
1903 memcpy(&card->token.ulp_filter_r,
1904 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1905 QETH_MPC_TOKEN_LENGTH);
1906 if (card->info.type == QETH_CARD_TYPE_IQD) {
1907 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1908 mtu = qeth_get_mtu_outof_framesize(framesize);
1909 if (!mtu) {
1910 iob->rc = -EINVAL;
1911 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1912 return 0;
1913 }
1914 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
1915
1916 if (card->dev &&
1917 ((card->dev->mtu == card->info.initial_mtu) ||
1918 (card->dev->mtu > mtu)))
1919 card->dev->mtu = mtu;
1920 qeth_free_qdio_buffers(card);
1921 }
1922 card->info.initial_mtu = mtu;
1923 card->info.max_mtu = mtu;
1924 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1925 } else {
1926 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1927 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
1928 iob->data);
1929 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1930 }
1931
1932 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1933 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1934 memcpy(&link_type,
1935 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1936 card->info.link_type = link_type;
1937 } else
1938 card->info.link_type = 0;
1939 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
1940 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1941 return 0;
1942}
1943
1944static int qeth_ulp_enable(struct qeth_card *card)
1945{
1946 int rc;
1947 char prot_type;
1948 struct qeth_cmd_buffer *iob;
1949
1950
1951 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1952
1953 iob = qeth_wait_for_buffer(&card->write);
1954 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1955
1956 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1957 (__u8) card->info.portno;
1958 if (card->options.layer2)
1959 if (card->info.type == QETH_CARD_TYPE_OSN)
1960 prot_type = QETH_PROT_OSN2;
1961 else
1962 prot_type = QETH_PROT_LAYER2;
1963 else
1964 prot_type = QETH_PROT_TCPIP;
1965
1966 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1967 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1968 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1969 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1970 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1971 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1972 card->info.portname, 9);
1973 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1974 qeth_ulp_enable_cb, NULL);
1975 return rc;
1976
1977}
1978
1979static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1980 unsigned long data)
1981{
1982 struct qeth_cmd_buffer *iob;
1983 int rc = 0;
1984
1985 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1986
1987 iob = (struct qeth_cmd_buffer *) data;
1988 memcpy(&card->token.ulp_connection_r,
1989 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1990 QETH_MPC_TOKEN_LENGTH);
1991 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1992 3)) {
1993 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
1994 dev_err(&card->gdev->dev, "A connection could not be "
1995 "established because of an OLM limit\n");
1996 iob->rc = -EMLINK;
1997 }
1998 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1999 return rc;
2000}
2001
2002static int qeth_ulp_setup(struct qeth_card *card)
2003{
2004 int rc;
2005 __u16 temp;
2006 struct qeth_cmd_buffer *iob;
2007 struct ccw_dev_id dev_id;
2008
2009 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2010
2011 iob = qeth_wait_for_buffer(&card->write);
2012 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2013
2014 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2015 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2016 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2017 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2018 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2019 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2020
2021 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2022 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2023 temp = (card->info.cula << 8) + card->info.unit_addr2;
2024 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2025 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2026 qeth_ulp_setup_cb, NULL);
2027 return rc;
2028}
2029
2030static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2031{
2032 int i, j;
2033
2034 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2035
2036 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2037 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2038 return 0;
2039
2040 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2041 GFP_KERNEL);
2042 if (!card->qdio.in_q)
2043 goto out_nomem;
2044 QETH_DBF_TEXT(SETUP, 2, "inq");
2045 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2046 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2047
2048 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2049 card->qdio.in_q->bufs[i].buffer =
2050 &card->qdio.in_q->qdio_bufs[i];
2051
2052 if (qeth_alloc_buffer_pool(card))
2053 goto out_freeinq;
2054
2055 card->qdio.out_qs =
2056 kmalloc(card->qdio.no_out_queues *
2057 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2058 if (!card->qdio.out_qs)
2059 goto out_freepool;
2060 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2061 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2062 GFP_KERNEL);
2063 if (!card->qdio.out_qs[i])
2064 goto out_freeoutq;
2065 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2066 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2067 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2068 card->qdio.out_qs[i]->queue_no = i;
2069
2070 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2071 card->qdio.out_qs[i]->bufs[j].buffer =
2072 &card->qdio.out_qs[i]->qdio_bufs[j];
2073 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2074 skb_list);
2075 lockdep_set_class(
2076 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2077 &qdio_out_skb_queue_key);
2078 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2079 }
2080 }
2081 return 0;
2082
2083out_freeoutq:
2084 while (i > 0)
2085 kfree(card->qdio.out_qs[--i]);
2086 kfree(card->qdio.out_qs);
2087 card->qdio.out_qs = NULL;
2088out_freepool:
2089 qeth_free_buffer_pool(card);
2090out_freeinq:
2091 kfree(card->qdio.in_q);
2092 card->qdio.in_q = NULL;
2093out_nomem:
2094 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2095 return -ENOMEM;
2096}
2097
2098static void qeth_create_qib_param_field(struct qeth_card *card,
2099 char *param_field)
2100{
2101
2102 param_field[0] = _ascebc['P'];
2103 param_field[1] = _ascebc['C'];
2104 param_field[2] = _ascebc['I'];
2105 param_field[3] = _ascebc['T'];
2106 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2107 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2108 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2109}
2110
2111static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2112 char *param_field)
2113{
2114 param_field[16] = _ascebc['B'];
2115 param_field[17] = _ascebc['L'];
2116 param_field[18] = _ascebc['K'];
2117 param_field[19] = _ascebc['T'];
2118 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2119 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2120 *((unsigned int *) (¶m_field[28])) =
2121 card->info.blkt.inter_packet_jumbo;
2122}
2123
2124static int qeth_qdio_activate(struct qeth_card *card)
2125{
2126 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2127 return qdio_activate(CARD_DDEV(card));
2128}
2129
2130static int qeth_dm_act(struct qeth_card *card)
2131{
2132 int rc;
2133 struct qeth_cmd_buffer *iob;
2134
2135 QETH_DBF_TEXT(SETUP, 2, "dmact");
2136
2137 iob = qeth_wait_for_buffer(&card->write);
2138 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2139
2140 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2141 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2142 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2143 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2144 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2145 return rc;
2146}
2147
2148static int qeth_mpc_initialize(struct qeth_card *card)
2149{
2150 int rc;
2151
2152 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2153
2154 rc = qeth_issue_next_read(card);
2155 if (rc) {
2156 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2157 return rc;
2158 }
2159 rc = qeth_cm_enable(card);
2160 if (rc) {
2161 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2162 goto out_qdio;
2163 }
2164 rc = qeth_cm_setup(card);
2165 if (rc) {
2166 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2167 goto out_qdio;
2168 }
2169 rc = qeth_ulp_enable(card);
2170 if (rc) {
2171 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2172 goto out_qdio;
2173 }
2174 rc = qeth_ulp_setup(card);
2175 if (rc) {
2176 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2177 goto out_qdio;
2178 }
2179 rc = qeth_alloc_qdio_buffers(card);
2180 if (rc) {
2181 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2182 goto out_qdio;
2183 }
2184 rc = qeth_qdio_establish(card);
2185 if (rc) {
2186 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2187 qeth_free_qdio_buffers(card);
2188 goto out_qdio;
2189 }
2190 rc = qeth_qdio_activate(card);
2191 if (rc) {
2192 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2193 goto out_qdio;
2194 }
2195 rc = qeth_dm_act(card);
2196 if (rc) {
2197 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2198 goto out_qdio;
2199 }
2200
2201 return 0;
2202out_qdio:
2203 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2204 return rc;
2205}
2206
2207static void qeth_print_status_with_portname(struct qeth_card *card)
2208{
2209 char dbf_text[15];
2210 int i;
2211
2212 sprintf(dbf_text, "%s", card->info.portname + 1);
2213 for (i = 0; i < 8; i++)
2214 dbf_text[i] =
2215 (char) _ebcasc[(__u8) dbf_text[i]];
2216 dbf_text[8] = 0;
2217 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2218 "with link type %s (portname: %s)\n",
2219 qeth_get_cardname(card),
2220 (card->info.mcl_level[0]) ? " (level: " : "",
2221 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2222 (card->info.mcl_level[0]) ? ")" : "",
2223 qeth_get_cardname_short(card),
2224 dbf_text);
2225
2226}
2227
2228static void qeth_print_status_no_portname(struct qeth_card *card)
2229{
2230 if (card->info.portname[0])
2231 dev_info(&card->gdev->dev, "Device is a%s "
2232 "card%s%s%s\nwith link type %s "
2233 "(no portname needed by interface).\n",
2234 qeth_get_cardname(card),
2235 (card->info.mcl_level[0]) ? " (level: " : "",
2236 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2237 (card->info.mcl_level[0]) ? ")" : "",
2238 qeth_get_cardname_short(card));
2239 else
2240 dev_info(&card->gdev->dev, "Device is a%s "
2241 "card%s%s%s\nwith link type %s.\n",
2242 qeth_get_cardname(card),
2243 (card->info.mcl_level[0]) ? " (level: " : "",
2244 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2245 (card->info.mcl_level[0]) ? ")" : "",
2246 qeth_get_cardname_short(card));
2247}
2248
2249void qeth_print_status_message(struct qeth_card *card)
2250{
2251 switch (card->info.type) {
2252 case QETH_CARD_TYPE_OSD:
2253 case QETH_CARD_TYPE_OSM:
2254 case QETH_CARD_TYPE_OSX:
2255
2256
2257
2258
2259 if (!card->info.mcl_level[0]) {
2260 sprintf(card->info.mcl_level, "%02x%02x",
2261 card->info.mcl_level[2],
2262 card->info.mcl_level[3]);
2263
2264 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2265 break;
2266 }
2267
2268 case QETH_CARD_TYPE_IQD:
2269 if ((card->info.guestlan) ||
2270 (card->info.mcl_level[0] & 0x80)) {
2271 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2272 card->info.mcl_level[0]];
2273 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2274 card->info.mcl_level[1]];
2275 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2276 card->info.mcl_level[2]];
2277 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2278 card->info.mcl_level[3]];
2279 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2280 }
2281 break;
2282 default:
2283 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2284 }
2285 if (card->info.portname_required)
2286 qeth_print_status_with_portname(card);
2287 else
2288 qeth_print_status_no_portname(card);
2289}
2290EXPORT_SYMBOL_GPL(qeth_print_status_message);
2291
2292static void qeth_initialize_working_pool_list(struct qeth_card *card)
2293{
2294 struct qeth_buffer_pool_entry *entry;
2295
2296 QETH_CARD_TEXT(card, 5, "inwrklst");
2297
2298 list_for_each_entry(entry,
2299 &card->qdio.init_pool.entry_list, init_list) {
2300 qeth_put_buffer_pool_entry(card, entry);
2301 }
2302}
2303
2304static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2305 struct qeth_card *card)
2306{
2307 struct list_head *plh;
2308 struct qeth_buffer_pool_entry *entry;
2309 int i, free;
2310 struct page *page;
2311
2312 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2313 return NULL;
2314
2315 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2316 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2317 free = 1;
2318 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2319 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2320 free = 0;
2321 break;
2322 }
2323 }
2324 if (free) {
2325 list_del_init(&entry->list);
2326 return entry;
2327 }
2328 }
2329
2330
2331 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2332 struct qeth_buffer_pool_entry, list);
2333 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2334 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2335 page = alloc_page(GFP_ATOMIC);
2336 if (!page) {
2337 return NULL;
2338 } else {
2339 free_page((unsigned long)entry->elements[i]);
2340 entry->elements[i] = page_address(page);
2341 if (card->options.performance_stats)
2342 card->perf_stats.sg_alloc_page_rx++;
2343 }
2344 }
2345 }
2346 list_del_init(&entry->list);
2347 return entry;
2348}
2349
2350static int qeth_init_input_buffer(struct qeth_card *card,
2351 struct qeth_qdio_buffer *buf)
2352{
2353 struct qeth_buffer_pool_entry *pool_entry;
2354 int i;
2355
2356 pool_entry = qeth_find_free_buffer_pool_entry(card);
2357 if (!pool_entry)
2358 return 1;
2359
2360
2361
2362
2363
2364
2365
2366
2367 buf->pool_entry = pool_entry;
2368 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2369 buf->buffer->element[i].length = PAGE_SIZE;
2370 buf->buffer->element[i].addr = pool_entry->elements[i];
2371 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2372 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2373 else
2374 buf->buffer->element[i].eflags = 0;
2375 buf->buffer->element[i].sflags = 0;
2376 }
2377 return 0;
2378}
2379
2380int qeth_init_qdio_queues(struct qeth_card *card)
2381{
2382 int i, j;
2383 int rc;
2384
2385 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2386
2387
2388 memset(card->qdio.in_q->qdio_bufs, 0,
2389 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2390 qeth_initialize_working_pool_list(card);
2391
2392 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2393 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2394 card->qdio.in_q->next_buf_to_init =
2395 card->qdio.in_buf_pool.buf_count - 1;
2396 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2397 card->qdio.in_buf_pool.buf_count - 1);
2398 if (rc) {
2399 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2400 return rc;
2401 }
2402
2403 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2404 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2405 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2406 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2407 qeth_clear_output_buffer(card->qdio.out_qs[i],
2408 &card->qdio.out_qs[i]->bufs[j]);
2409 }
2410 card->qdio.out_qs[i]->card = card;
2411 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2412 card->qdio.out_qs[i]->do_pack = 0;
2413 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2414 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2415 atomic_set(&card->qdio.out_qs[i]->state,
2416 QETH_OUT_Q_UNLOCKED);
2417 }
2418 return 0;
2419}
2420EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2421
2422static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2423{
2424 switch (link_type) {
2425 case QETH_LINK_TYPE_HSTR:
2426 return 2;
2427 default:
2428 return 1;
2429 }
2430}
2431
2432static void qeth_fill_ipacmd_header(struct qeth_card *card,
2433 struct qeth_ipa_cmd *cmd, __u8 command,
2434 enum qeth_prot_versions prot)
2435{
2436 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2437 cmd->hdr.command = command;
2438 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2439 cmd->hdr.seqno = card->seqno.ipa;
2440 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2441 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2442 if (card->options.layer2)
2443 cmd->hdr.prim_version_no = 2;
2444 else
2445 cmd->hdr.prim_version_no = 1;
2446 cmd->hdr.param_count = 1;
2447 cmd->hdr.prot_version = prot;
2448 cmd->hdr.ipa_supported = 0;
2449 cmd->hdr.ipa_enabled = 0;
2450}
2451
2452struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2453 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2454{
2455 struct qeth_cmd_buffer *iob;
2456 struct qeth_ipa_cmd *cmd;
2457
2458 iob = qeth_wait_for_buffer(&card->write);
2459 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2460 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2461
2462 return iob;
2463}
2464EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2465
2466void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2467 char prot_type)
2468{
2469 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2470 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2471 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2472 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2473}
2474EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2475
2476int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2477 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2478 unsigned long),
2479 void *reply_param)
2480{
2481 int rc;
2482 char prot_type;
2483
2484 QETH_CARD_TEXT(card, 4, "sendipa");
2485
2486 if (card->options.layer2)
2487 if (card->info.type == QETH_CARD_TYPE_OSN)
2488 prot_type = QETH_PROT_OSN2;
2489 else
2490 prot_type = QETH_PROT_LAYER2;
2491 else
2492 prot_type = QETH_PROT_TCPIP;
2493 qeth_prepare_ipa_cmd(card, iob, prot_type);
2494 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2495 iob, reply_cb, reply_param);
2496 if (rc == -ETIME) {
2497 qeth_clear_ipacmd_list(card);
2498 qeth_schedule_recovery(card);
2499 }
2500 return rc;
2501}
2502EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2503
2504int qeth_send_startlan(struct qeth_card *card)
2505{
2506 int rc;
2507 struct qeth_cmd_buffer *iob;
2508
2509 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2510
2511 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2512 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2513 return rc;
2514}
2515EXPORT_SYMBOL_GPL(qeth_send_startlan);
2516
2517int qeth_default_setadapterparms_cb(struct qeth_card *card,
2518 struct qeth_reply *reply, unsigned long data)
2519{
2520 struct qeth_ipa_cmd *cmd;
2521
2522 QETH_CARD_TEXT(card, 4, "defadpcb");
2523
2524 cmd = (struct qeth_ipa_cmd *) data;
2525 if (cmd->hdr.return_code == 0)
2526 cmd->hdr.return_code =
2527 cmd->data.setadapterparms.hdr.return_code;
2528 return 0;
2529}
2530EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2531
2532static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2533 struct qeth_reply *reply, unsigned long data)
2534{
2535 struct qeth_ipa_cmd *cmd;
2536
2537 QETH_CARD_TEXT(card, 3, "quyadpcb");
2538
2539 cmd = (struct qeth_ipa_cmd *) data;
2540 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2541 card->info.link_type =
2542 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2543 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2544 }
2545 card->options.adp.supported_funcs =
2546 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2547 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2548}
2549
2550struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2551 __u32 command, __u32 cmdlen)
2552{
2553 struct qeth_cmd_buffer *iob;
2554 struct qeth_ipa_cmd *cmd;
2555
2556 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2557 QETH_PROT_IPV4);
2558 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2559 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2560 cmd->data.setadapterparms.hdr.command_code = command;
2561 cmd->data.setadapterparms.hdr.used_total = 1;
2562 cmd->data.setadapterparms.hdr.seq_no = 1;
2563
2564 return iob;
2565}
2566EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2567
2568int qeth_query_setadapterparms(struct qeth_card *card)
2569{
2570 int rc;
2571 struct qeth_cmd_buffer *iob;
2572
2573 QETH_CARD_TEXT(card, 3, "queryadp");
2574 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2575 sizeof(struct qeth_ipacmd_setadpparms));
2576 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2577 return rc;
2578}
2579EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2580
2581static int qeth_query_ipassists_cb(struct qeth_card *card,
2582 struct qeth_reply *reply, unsigned long data)
2583{
2584 struct qeth_ipa_cmd *cmd;
2585
2586 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2587
2588 cmd = (struct qeth_ipa_cmd *) data;
2589 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2590 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2591 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2592 } else {
2593 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2594 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2595 }
2596 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2597 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
2598 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
2599 return 0;
2600}
2601
2602int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2603{
2604 int rc;
2605 struct qeth_cmd_buffer *iob;
2606
2607 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2608 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2609 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2610 return rc;
2611}
2612EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2613
2614static int qeth_query_setdiagass_cb(struct qeth_card *card,
2615 struct qeth_reply *reply, unsigned long data)
2616{
2617 struct qeth_ipa_cmd *cmd;
2618 __u16 rc;
2619
2620 cmd = (struct qeth_ipa_cmd *)data;
2621 rc = cmd->hdr.return_code;
2622 if (rc)
2623 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2624 else
2625 card->info.diagass_support = cmd->data.diagass.ext;
2626 return 0;
2627}
2628
2629static int qeth_query_setdiagass(struct qeth_card *card)
2630{
2631 struct qeth_cmd_buffer *iob;
2632 struct qeth_ipa_cmd *cmd;
2633
2634 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2635 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2636 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2637 cmd->data.diagass.subcmd_len = 16;
2638 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2639 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2640}
2641
2642static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2643{
2644 unsigned long info = get_zeroed_page(GFP_KERNEL);
2645 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2646 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2647 struct ccw_dev_id ccwid;
2648 int level, rc;
2649
2650 tid->chpid = card->info.chpid;
2651 ccw_device_get_id(CARD_RDEV(card), &ccwid);
2652 tid->ssid = ccwid.ssid;
2653 tid->devno = ccwid.devno;
2654 if (!info)
2655 return;
2656
2657 rc = stsi(NULL, 0, 0, 0);
2658 if (rc == -ENOSYS)
2659 level = rc;
2660 else
2661 level = (((unsigned int) rc) >> 28);
2662
2663 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
2664 tid->lparnr = info222->lpar_number;
2665
2666 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
2667 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
2668 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
2669 }
2670 free_page(info);
2671 return;
2672}
2673
2674static int qeth_hw_trap_cb(struct qeth_card *card,
2675 struct qeth_reply *reply, unsigned long data)
2676{
2677 struct qeth_ipa_cmd *cmd;
2678 __u16 rc;
2679
2680 cmd = (struct qeth_ipa_cmd *)data;
2681 rc = cmd->hdr.return_code;
2682 if (rc)
2683 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
2684 return 0;
2685}
2686
2687int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
2688{
2689 struct qeth_cmd_buffer *iob;
2690 struct qeth_ipa_cmd *cmd;
2691
2692 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
2693 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2694 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2695 cmd->data.diagass.subcmd_len = 80;
2696 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
2697 cmd->data.diagass.type = 1;
2698 cmd->data.diagass.action = action;
2699 switch (action) {
2700 case QETH_DIAGS_TRAP_ARM:
2701 cmd->data.diagass.options = 0x0003;
2702 cmd->data.diagass.ext = 0x00010000 +
2703 sizeof(struct qeth_trap_id);
2704 qeth_get_trap_id(card,
2705 (struct qeth_trap_id *)cmd->data.diagass.cdata);
2706 break;
2707 case QETH_DIAGS_TRAP_DISARM:
2708 cmd->data.diagass.options = 0x0001;
2709 break;
2710 case QETH_DIAGS_TRAP_CAPTURE:
2711 break;
2712 }
2713 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
2714}
2715EXPORT_SYMBOL_GPL(qeth_hw_trap);
2716
2717int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2718 unsigned int qdio_error, const char *dbftext)
2719{
2720 if (qdio_error) {
2721 QETH_CARD_TEXT(card, 2, dbftext);
2722 QETH_CARD_TEXT_(card, 2, " F15=%02X",
2723 buf->element[15].sflags);
2724 QETH_CARD_TEXT_(card, 2, " F14=%02X",
2725 buf->element[14].sflags);
2726 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
2727 if ((buf->element[15].sflags) == 0x12) {
2728 card->stats.rx_dropped++;
2729 return 0;
2730 } else
2731 return 1;
2732 }
2733 return 0;
2734}
2735EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2736
2737void qeth_queue_input_buffer(struct qeth_card *card, int index)
2738{
2739 struct qeth_qdio_q *queue = card->qdio.in_q;
2740 int count;
2741 int i;
2742 int rc;
2743 int newcount = 0;
2744
2745 count = (index < queue->next_buf_to_init)?
2746 card->qdio.in_buf_pool.buf_count -
2747 (queue->next_buf_to_init - index) :
2748 card->qdio.in_buf_pool.buf_count -
2749 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2750
2751 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2752 for (i = queue->next_buf_to_init;
2753 i < queue->next_buf_to_init + count; ++i) {
2754 if (qeth_init_input_buffer(card,
2755 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2756 break;
2757 } else {
2758 newcount++;
2759 }
2760 }
2761
2762 if (newcount < count) {
2763
2764
2765 atomic_set(&card->force_alloc_skb, 3);
2766 count = newcount;
2767 } else {
2768 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2769 }
2770
2771
2772
2773
2774
2775
2776
2777
2778 if (card->options.performance_stats) {
2779 card->perf_stats.inbound_do_qdio_cnt++;
2780 card->perf_stats.inbound_do_qdio_start_time =
2781 qeth_get_micros();
2782 }
2783 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2784 queue->next_buf_to_init, count);
2785 if (card->options.performance_stats)
2786 card->perf_stats.inbound_do_qdio_time +=
2787 qeth_get_micros() -
2788 card->perf_stats.inbound_do_qdio_start_time;
2789 if (rc) {
2790 dev_warn(&card->gdev->dev,
2791 "QDIO reported an error, rc=%i\n", rc);
2792 QETH_CARD_TEXT(card, 2, "qinberr");
2793 }
2794 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2795 QDIO_MAX_BUFFERS_PER_Q;
2796 }
2797}
2798EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2799
2800static int qeth_handle_send_error(struct qeth_card *card,
2801 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2802{
2803 int sbalf15 = buffer->buffer->element[15].sflags;
2804
2805 QETH_CARD_TEXT(card, 6, "hdsnderr");
2806 if (card->info.type == QETH_CARD_TYPE_IQD) {
2807 if (sbalf15 == 0) {
2808 qdio_err = 0;
2809 } else {
2810 qdio_err = 1;
2811 }
2812 }
2813 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2814
2815 if (!qdio_err)
2816 return QETH_SEND_ERROR_NONE;
2817
2818 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2819 return QETH_SEND_ERROR_RETRY;
2820
2821 QETH_CARD_TEXT(card, 1, "lnkfail");
2822 QETH_CARD_TEXT_(card, 1, "%04x %02x",
2823 (u16)qdio_err, (u8)sbalf15);
2824 return QETH_SEND_ERROR_LINK_FAILURE;
2825}
2826
2827
2828
2829
2830
2831static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2832{
2833 if (!queue->do_pack) {
2834 if (atomic_read(&queue->used_buffers)
2835 >= QETH_HIGH_WATERMARK_PACK){
2836
2837 QETH_CARD_TEXT(queue->card, 6, "np->pack");
2838 if (queue->card->options.performance_stats)
2839 queue->card->perf_stats.sc_dp_p++;
2840 queue->do_pack = 1;
2841 }
2842 }
2843}
2844
2845
2846
2847
2848
2849
2850
2851static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2852{
2853 struct qeth_qdio_out_buffer *buffer;
2854 int flush_count = 0;
2855
2856 if (queue->do_pack) {
2857 if (atomic_read(&queue->used_buffers)
2858 <= QETH_LOW_WATERMARK_PACK) {
2859
2860 QETH_CARD_TEXT(queue->card, 6, "pack->np");
2861 if (queue->card->options.performance_stats)
2862 queue->card->perf_stats.sc_p_dp++;
2863 queue->do_pack = 0;
2864
2865 buffer = &queue->bufs[queue->next_buf_to_fill];
2866 if ((atomic_read(&buffer->state) ==
2867 QETH_QDIO_BUF_EMPTY) &&
2868 (buffer->next_element_to_fill > 0)) {
2869 atomic_set(&buffer->state,
2870 QETH_QDIO_BUF_PRIMED);
2871 flush_count++;
2872 queue->next_buf_to_fill =
2873 (queue->next_buf_to_fill + 1) %
2874 QDIO_MAX_BUFFERS_PER_Q;
2875 }
2876 }
2877 }
2878 return flush_count;
2879}
2880
2881
2882
2883
2884
2885
2886static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2887{
2888 struct qeth_qdio_out_buffer *buffer;
2889
2890 buffer = &queue->bufs[queue->next_buf_to_fill];
2891 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2892 (buffer->next_element_to_fill > 0)) {
2893
2894 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2895 queue->next_buf_to_fill =
2896 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2897 return 1;
2898 }
2899 return 0;
2900}
2901
2902static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2903 int count)
2904{
2905 struct qeth_qdio_out_buffer *buf;
2906 int rc;
2907 int i;
2908 unsigned int qdio_flags;
2909
2910 for (i = index; i < index + count; ++i) {
2911 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2912 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
2913 SBAL_EFLAGS_LAST_ENTRY;
2914
2915 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2916 continue;
2917
2918 if (!queue->do_pack) {
2919 if ((atomic_read(&queue->used_buffers) >=
2920 (QETH_HIGH_WATERMARK_PACK -
2921 QETH_WATERMARK_PACK_FUZZ)) &&
2922 !atomic_read(&queue->set_pci_flags_count)) {
2923
2924
2925 atomic_inc(&queue->set_pci_flags_count);
2926 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
2927 }
2928 } else {
2929 if (!atomic_read(&queue->set_pci_flags_count)) {
2930
2931
2932
2933
2934
2935
2936
2937
2938 atomic_inc(&queue->set_pci_flags_count);
2939 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
2940 }
2941 }
2942 }
2943
2944 queue->card->dev->trans_start = jiffies;
2945 if (queue->card->options.performance_stats) {
2946 queue->card->perf_stats.outbound_do_qdio_cnt++;
2947 queue->card->perf_stats.outbound_do_qdio_start_time =
2948 qeth_get_micros();
2949 }
2950 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2951 if (atomic_read(&queue->set_pci_flags_count))
2952 qdio_flags |= QDIO_FLAG_PCI_OUT;
2953 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2954 queue->queue_no, index, count);
2955 if (queue->card->options.performance_stats)
2956 queue->card->perf_stats.outbound_do_qdio_time +=
2957 qeth_get_micros() -
2958 queue->card->perf_stats.outbound_do_qdio_start_time;
2959 atomic_add(count, &queue->used_buffers);
2960 if (rc) {
2961 queue->card->stats.tx_errors += count;
2962
2963 if (rc == QDIO_ERROR_SIGA_TARGET)
2964 return;
2965 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
2966 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
2967
2968
2969
2970 qeth_schedule_recovery(queue->card);
2971 return;
2972 }
2973 if (queue->card->options.performance_stats)
2974 queue->card->perf_stats.bufs_sent += count;
2975}
2976
2977static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2978{
2979 int index;
2980 int flush_cnt = 0;
2981 int q_was_packing = 0;
2982
2983
2984
2985
2986
2987 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2988 !atomic_read(&queue->set_pci_flags_count)) {
2989 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2990 QETH_OUT_Q_UNLOCKED) {
2991
2992
2993
2994
2995
2996 netif_stop_queue(queue->card->dev);
2997 index = queue->next_buf_to_fill;
2998 q_was_packing = queue->do_pack;
2999
3000 barrier();
3001 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3002 if (!flush_cnt &&
3003 !atomic_read(&queue->set_pci_flags_count))
3004 flush_cnt +=
3005 qeth_flush_buffers_on_no_pci(queue);
3006 if (queue->card->options.performance_stats &&
3007 q_was_packing)
3008 queue->card->perf_stats.bufs_sent_pack +=
3009 flush_cnt;
3010 if (flush_cnt)
3011 qeth_flush_buffers(queue, index, flush_cnt);
3012 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3013 }
3014 }
3015}
3016
3017void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3018 unsigned long card_ptr)
3019{
3020 struct qeth_card *card = (struct qeth_card *)card_ptr;
3021
3022 if (card->dev && (card->dev->flags & IFF_UP))
3023 napi_schedule(&card->napi);
3024}
3025EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3026
3027void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3028 unsigned int queue, int first_element, int count,
3029 unsigned long card_ptr)
3030{
3031 struct qeth_card *card = (struct qeth_card *)card_ptr;
3032
3033 if (qdio_err)
3034 qeth_schedule_recovery(card);
3035}
3036EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3037
3038void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3039 unsigned int qdio_error, int __queue, int first_element,
3040 int count, unsigned long card_ptr)
3041{
3042 struct qeth_card *card = (struct qeth_card *) card_ptr;
3043 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3044 struct qeth_qdio_out_buffer *buffer;
3045 int i;
3046
3047 QETH_CARD_TEXT(card, 6, "qdouhdl");
3048 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
3049 QETH_CARD_TEXT(card, 2, "achkcond");
3050 netif_stop_queue(card->dev);
3051 qeth_schedule_recovery(card);
3052 return;
3053 }
3054 if (card->options.performance_stats) {
3055 card->perf_stats.outbound_handler_cnt++;
3056 card->perf_stats.outbound_handler_start_time =
3057 qeth_get_micros();
3058 }
3059 for (i = first_element; i < (first_element + count); ++i) {
3060 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
3061 qeth_handle_send_error(card, buffer, qdio_error);
3062 qeth_clear_output_buffer(queue, buffer);
3063 }
3064 atomic_sub(count, &queue->used_buffers);
3065
3066 if (card->info.type != QETH_CARD_TYPE_IQD)
3067 qeth_check_outbound_queue(queue);
3068
3069 netif_wake_queue(queue->card->dev);
3070 if (card->options.performance_stats)
3071 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3072 card->perf_stats.outbound_handler_start_time;
3073}
3074EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3075
3076int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3077 int ipv, int cast_type)
3078{
3079 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3080 card->info.type == QETH_CARD_TYPE_OSX))
3081 return card->qdio.default_out_queue;
3082 switch (card->qdio.no_out_queues) {
3083 case 4:
3084 if (cast_type && card->info.is_multicast_different)
3085 return card->info.is_multicast_different &
3086 (card->qdio.no_out_queues - 1);
3087 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3088 const u8 tos = ip_hdr(skb)->tos;
3089
3090 if (card->qdio.do_prio_queueing ==
3091 QETH_PRIO_Q_ING_TOS) {
3092 if (tos & IP_TOS_NOTIMPORTANT)
3093 return 3;
3094 if (tos & IP_TOS_HIGHRELIABILITY)
3095 return 2;
3096 if (tos & IP_TOS_HIGHTHROUGHPUT)
3097 return 1;
3098 if (tos & IP_TOS_LOWDELAY)
3099 return 0;
3100 }
3101 if (card->qdio.do_prio_queueing ==
3102 QETH_PRIO_Q_ING_PREC)
3103 return 3 - (tos >> 6);
3104 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3105
3106 }
3107 return card->qdio.default_out_queue;
3108 case 1:
3109 default:
3110 return card->qdio.default_out_queue;
3111 }
3112}
3113EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3114
3115int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3116 struct sk_buff *skb, int elems)
3117{
3118 int dlen = skb->len - skb->data_len;
3119 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3120 PFN_DOWN((unsigned long)skb->data);
3121
3122 elements_needed += skb_shinfo(skb)->nr_frags;
3123 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3124 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3125 "(Number=%d / Length=%d). Discarded.\n",
3126 (elements_needed+elems), skb->len);
3127 return 0;
3128 }
3129 return elements_needed;
3130}
3131EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3132
3133int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3134{
3135 int hroom, inpage, rest;
3136
3137 if (((unsigned long)skb->data & PAGE_MASK) !=
3138 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3139 hroom = skb_headroom(skb);
3140 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3141 rest = len - inpage;
3142 if (rest > hroom)
3143 return 1;
3144 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3145 skb->data -= rest;
3146 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3147 }
3148 return 0;
3149}
3150EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3151
3152static inline void __qeth_fill_buffer(struct sk_buff *skb,
3153 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3154 int offset)
3155{
3156 int length = skb->len - skb->data_len;
3157 int length_here;
3158 int element;
3159 char *data;
3160 int first_lap, cnt;
3161 struct skb_frag_struct *frag;
3162
3163 element = *next_element_to_fill;
3164 data = skb->data;
3165 first_lap = (is_tso == 0 ? 1 : 0);
3166
3167 if (offset >= 0) {
3168 data = skb->data + offset;
3169 length -= offset;
3170 first_lap = 0;
3171 }
3172
3173 while (length > 0) {
3174
3175 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3176 if (length < length_here)
3177 length_here = length;
3178
3179 buffer->element[element].addr = data;
3180 buffer->element[element].length = length_here;
3181 length -= length_here;
3182 if (!length) {
3183 if (first_lap)
3184 if (skb_shinfo(skb)->nr_frags)
3185 buffer->element[element].eflags =
3186 SBAL_EFLAGS_FIRST_FRAG;
3187 else
3188 buffer->element[element].eflags = 0;
3189 else
3190 buffer->element[element].eflags =
3191 SBAL_EFLAGS_MIDDLE_FRAG;
3192 } else {
3193 if (first_lap)
3194 buffer->element[element].eflags =
3195 SBAL_EFLAGS_FIRST_FRAG;
3196 else
3197 buffer->element[element].eflags =
3198 SBAL_EFLAGS_MIDDLE_FRAG;
3199 }
3200 data += length_here;
3201 element++;
3202 first_lap = 0;
3203 }
3204
3205 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3206 frag = &skb_shinfo(skb)->frags[cnt];
3207 buffer->element[element].addr = (char *)page_to_phys(frag->page)
3208 + frag->page_offset;
3209 buffer->element[element].length = frag->size;
3210 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3211 element++;
3212 }
3213
3214 if (buffer->element[element - 1].eflags)
3215 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3216 *next_element_to_fill = element;
3217}
3218
3219static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3220 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3221 struct qeth_hdr *hdr, int offset, int hd_len)
3222{
3223 struct qdio_buffer *buffer;
3224 int flush_cnt = 0, hdr_len, large_send = 0;
3225
3226 buffer = buf->buffer;
3227 atomic_inc(&skb->users);
3228 skb_queue_tail(&buf->skb_list, skb);
3229
3230
3231 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3232 int element = buf->next_element_to_fill;
3233
3234 hdr_len = sizeof(struct qeth_hdr_tso) +
3235 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3236
3237 buffer->element[element].addr = skb->data;
3238 buffer->element[element].length = hdr_len;
3239 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3240 buf->next_element_to_fill++;
3241 skb->data += hdr_len;
3242 skb->len -= hdr_len;
3243 large_send = 1;
3244 }
3245
3246 if (offset >= 0) {
3247 int element = buf->next_element_to_fill;
3248 buffer->element[element].addr = hdr;
3249 buffer->element[element].length = sizeof(struct qeth_hdr) +
3250 hd_len;
3251 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3252 buf->is_header[element] = 1;
3253 buf->next_element_to_fill++;
3254 }
3255
3256 __qeth_fill_buffer(skb, buffer, large_send,
3257 (int *)&buf->next_element_to_fill, offset);
3258
3259 if (!queue->do_pack) {
3260 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3261
3262 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3263 flush_cnt = 1;
3264 } else {
3265 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3266 if (queue->card->options.performance_stats)
3267 queue->card->perf_stats.skbs_sent_pack++;
3268 if (buf->next_element_to_fill >=
3269 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3270
3271
3272
3273
3274 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3275 flush_cnt = 1;
3276 }
3277 }
3278 return flush_cnt;
3279}
3280
3281int qeth_do_send_packet_fast(struct qeth_card *card,
3282 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3283 struct qeth_hdr *hdr, int elements_needed,
3284 int offset, int hd_len)
3285{
3286 struct qeth_qdio_out_buffer *buffer;
3287 int index;
3288
3289
3290 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3291 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3292
3293 index = queue->next_buf_to_fill;
3294 buffer = &queue->bufs[queue->next_buf_to_fill];
3295
3296
3297
3298
3299 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3300 goto out;
3301 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3302 QDIO_MAX_BUFFERS_PER_Q;
3303 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3304 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3305 qeth_flush_buffers(queue, index, 1);
3306 return 0;
3307out:
3308 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3309 return -EBUSY;
3310}
3311EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3312
3313int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3314 struct sk_buff *skb, struct qeth_hdr *hdr,
3315 int elements_needed)
3316{
3317 struct qeth_qdio_out_buffer *buffer;
3318 int start_index;
3319 int flush_count = 0;
3320 int do_pack = 0;
3321 int tmp;
3322 int rc = 0;
3323
3324
3325 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3326 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3327 start_index = queue->next_buf_to_fill;
3328 buffer = &queue->bufs[queue->next_buf_to_fill];
3329
3330
3331
3332
3333 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3334 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3335 return -EBUSY;
3336 }
3337
3338 qeth_switch_to_packing_if_needed(queue);
3339 if (queue->do_pack) {
3340 do_pack = 1;
3341
3342 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3343 buffer->next_element_to_fill) < elements_needed) {
3344
3345 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3346 flush_count++;
3347 queue->next_buf_to_fill =
3348 (queue->next_buf_to_fill + 1) %
3349 QDIO_MAX_BUFFERS_PER_Q;
3350 buffer = &queue->bufs[queue->next_buf_to_fill];
3351
3352
3353 if (atomic_read(&buffer->state) !=
3354 QETH_QDIO_BUF_EMPTY) {
3355 qeth_flush_buffers(queue, start_index,
3356 flush_count);
3357 atomic_set(&queue->state,
3358 QETH_OUT_Q_UNLOCKED);
3359 return -EBUSY;
3360 }
3361 }
3362 }
3363 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3364 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3365 QDIO_MAX_BUFFERS_PER_Q;
3366 flush_count += tmp;
3367 if (flush_count)
3368 qeth_flush_buffers(queue, start_index, flush_count);
3369 else if (!atomic_read(&queue->set_pci_flags_count))
3370 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3371
3372
3373
3374
3375
3376
3377 while (atomic_dec_return(&queue->state)) {
3378 flush_count = 0;
3379 start_index = queue->next_buf_to_fill;
3380
3381 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3382
3383
3384
3385
3386 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3387 flush_count += qeth_flush_buffers_on_no_pci(queue);
3388 if (flush_count)
3389 qeth_flush_buffers(queue, start_index, flush_count);
3390 }
3391
3392 if (queue->card->options.performance_stats && do_pack)
3393 queue->card->perf_stats.bufs_sent_pack += flush_count;
3394
3395 return rc;
3396}
3397EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3398
3399static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3400 struct qeth_reply *reply, unsigned long data)
3401{
3402 struct qeth_ipa_cmd *cmd;
3403 struct qeth_ipacmd_setadpparms *setparms;
3404
3405 QETH_CARD_TEXT(card, 4, "prmadpcb");
3406
3407 cmd = (struct qeth_ipa_cmd *) data;
3408 setparms = &(cmd->data.setadapterparms);
3409
3410 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3411 if (cmd->hdr.return_code) {
3412 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3413 setparms->data.mode = SET_PROMISC_MODE_OFF;
3414 }
3415 card->info.promisc_mode = setparms->data.mode;
3416 return 0;
3417}
3418
3419void qeth_setadp_promisc_mode(struct qeth_card *card)
3420{
3421 enum qeth_ipa_promisc_modes mode;
3422 struct net_device *dev = card->dev;
3423 struct qeth_cmd_buffer *iob;
3424 struct qeth_ipa_cmd *cmd;
3425
3426 QETH_CARD_TEXT(card, 4, "setprom");
3427
3428 if (((dev->flags & IFF_PROMISC) &&
3429 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3430 (!(dev->flags & IFF_PROMISC) &&
3431 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3432 return;
3433 mode = SET_PROMISC_MODE_OFF;
3434 if (dev->flags & IFF_PROMISC)
3435 mode = SET_PROMISC_MODE_ON;
3436 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3437
3438 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3439 sizeof(struct qeth_ipacmd_setadpparms));
3440 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3441 cmd->data.setadapterparms.data.mode = mode;
3442 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3443}
3444EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3445
3446int qeth_change_mtu(struct net_device *dev, int new_mtu)
3447{
3448 struct qeth_card *card;
3449 char dbf_text[15];
3450
3451 card = dev->ml_priv;
3452
3453 QETH_CARD_TEXT(card, 4, "chgmtu");
3454 sprintf(dbf_text, "%8x", new_mtu);
3455 QETH_CARD_TEXT(card, 4, dbf_text);
3456
3457 if (new_mtu < 64)
3458 return -EINVAL;
3459 if (new_mtu > 65535)
3460 return -EINVAL;
3461 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3462 (!qeth_mtu_is_valid(card, new_mtu)))
3463 return -EINVAL;
3464 dev->mtu = new_mtu;
3465 return 0;
3466}
3467EXPORT_SYMBOL_GPL(qeth_change_mtu);
3468
3469struct net_device_stats *qeth_get_stats(struct net_device *dev)
3470{
3471 struct qeth_card *card;
3472
3473 card = dev->ml_priv;
3474
3475 QETH_CARD_TEXT(card, 5, "getstat");
3476
3477 return &card->stats;
3478}
3479EXPORT_SYMBOL_GPL(qeth_get_stats);
3480
3481static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3482 struct qeth_reply *reply, unsigned long data)
3483{
3484 struct qeth_ipa_cmd *cmd;
3485
3486 QETH_CARD_TEXT(card, 4, "chgmaccb");
3487
3488 cmd = (struct qeth_ipa_cmd *) data;
3489 if (!card->options.layer2 ||
3490 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3491 memcpy(card->dev->dev_addr,
3492 &cmd->data.setadapterparms.data.change_addr.addr,
3493 OSA_ADDR_LEN);
3494 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3495 }
3496 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3497 return 0;
3498}
3499
3500int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3501{
3502 int rc;
3503 struct qeth_cmd_buffer *iob;
3504 struct qeth_ipa_cmd *cmd;
3505
3506 QETH_CARD_TEXT(card, 4, "chgmac");
3507
3508 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3509 sizeof(struct qeth_ipacmd_setadpparms));
3510 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3511 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3512 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3513 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3514 card->dev->dev_addr, OSA_ADDR_LEN);
3515 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3516 NULL);
3517 return rc;
3518}
3519EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3520
3521static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3522 struct qeth_reply *reply, unsigned long data)
3523{
3524 struct qeth_ipa_cmd *cmd;
3525 struct qeth_set_access_ctrl *access_ctrl_req;
3526
3527 QETH_CARD_TEXT(card, 4, "setaccb");
3528
3529 cmd = (struct qeth_ipa_cmd *) data;
3530 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3531 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3532 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3533 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3534 cmd->data.setadapterparms.hdr.return_code);
3535 switch (cmd->data.setadapterparms.hdr.return_code) {
3536 case SET_ACCESS_CTRL_RC_SUCCESS:
3537 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3538 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3539 {
3540 card->options.isolation = access_ctrl_req->subcmd_code;
3541 if (card->options.isolation == ISOLATION_MODE_NONE) {
3542 dev_info(&card->gdev->dev,
3543 "QDIO data connection isolation is deactivated\n");
3544 } else {
3545 dev_info(&card->gdev->dev,
3546 "QDIO data connection isolation is activated\n");
3547 }
3548 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3549 card->gdev->dev.kobj.name,
3550 access_ctrl_req->subcmd_code,
3551 cmd->data.setadapterparms.hdr.return_code);
3552 break;
3553 }
3554 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3555 {
3556 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3557 card->gdev->dev.kobj.name,
3558 access_ctrl_req->subcmd_code,
3559 cmd->data.setadapterparms.hdr.return_code);
3560 dev_err(&card->gdev->dev, "Adapter does not "
3561 "support QDIO data connection isolation\n");
3562
3563
3564 card->options.isolation = ISOLATION_MODE_NONE;
3565 break;
3566 }
3567 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3568 {
3569 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3570 card->gdev->dev.kobj.name,
3571 access_ctrl_req->subcmd_code,
3572 cmd->data.setadapterparms.hdr.return_code);
3573 dev_err(&card->gdev->dev,
3574 "Adapter is dedicated. "
3575 "QDIO data connection isolation not supported\n");
3576
3577
3578 card->options.isolation = ISOLATION_MODE_NONE;
3579 break;
3580 }
3581 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3582 {
3583 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3584 card->gdev->dev.kobj.name,
3585 access_ctrl_req->subcmd_code,
3586 cmd->data.setadapterparms.hdr.return_code);
3587 dev_err(&card->gdev->dev,
3588 "TSO does not permit QDIO data connection isolation\n");
3589
3590
3591 card->options.isolation = ISOLATION_MODE_NONE;
3592 break;
3593 }
3594 default:
3595 {
3596
3597 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3598 "==UNKNOWN\n",
3599 card->gdev->dev.kobj.name,
3600 access_ctrl_req->subcmd_code,
3601 cmd->data.setadapterparms.hdr.return_code);
3602
3603
3604 card->options.isolation = ISOLATION_MODE_NONE;
3605 break;
3606 }
3607 }
3608 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3609 return 0;
3610}
3611
3612static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3613 enum qeth_ipa_isolation_modes isolation)
3614{
3615 int rc;
3616 struct qeth_cmd_buffer *iob;
3617 struct qeth_ipa_cmd *cmd;
3618 struct qeth_set_access_ctrl *access_ctrl_req;
3619
3620 QETH_CARD_TEXT(card, 4, "setacctl");
3621
3622 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3623 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3624
3625 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3626 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3627 sizeof(struct qeth_set_access_ctrl));
3628 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3629 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3630 access_ctrl_req->subcmd_code = isolation;
3631
3632 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3633 NULL);
3634 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3635 return rc;
3636}
3637
3638int qeth_set_access_ctrl_online(struct qeth_card *card)
3639{
3640 int rc = 0;
3641
3642 QETH_CARD_TEXT(card, 4, "setactlo");
3643
3644 if ((card->info.type == QETH_CARD_TYPE_OSD ||
3645 card->info.type == QETH_CARD_TYPE_OSX) &&
3646 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3647 rc = qeth_setadpparms_set_access_ctrl(card,
3648 card->options.isolation);
3649 if (rc) {
3650 QETH_DBF_MESSAGE(3,
3651 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
3652 card->gdev->dev.kobj.name,
3653 rc);
3654 }
3655 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3656 card->options.isolation = ISOLATION_MODE_NONE;
3657
3658 dev_err(&card->gdev->dev, "Adapter does not "
3659 "support QDIO data connection isolation\n");
3660 rc = -EOPNOTSUPP;
3661 }
3662 return rc;
3663}
3664EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3665
3666void qeth_tx_timeout(struct net_device *dev)
3667{
3668 struct qeth_card *card;
3669
3670 card = dev->ml_priv;
3671 QETH_CARD_TEXT(card, 4, "txtimeo");
3672 card->stats.tx_errors++;
3673 qeth_schedule_recovery(card);
3674}
3675EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3676
3677int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3678{
3679 struct qeth_card *card = dev->ml_priv;
3680 int rc = 0;
3681
3682 switch (regnum) {
3683 case MII_BMCR:
3684 rc = BMCR_FULLDPLX;
3685 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3686 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3687 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3688 rc |= BMCR_SPEED100;
3689 break;
3690 case MII_BMSR:
3691 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3692 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3693 BMSR_100BASE4;
3694 break;
3695 case MII_PHYSID1:
3696 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3697 dev->dev_addr[2];
3698 rc = (rc >> 5) & 0xFFFF;
3699 break;
3700 case MII_PHYSID2:
3701 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3702 break;
3703 case MII_ADVERTISE:
3704 rc = ADVERTISE_ALL;
3705 break;
3706 case MII_LPA:
3707 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3708 LPA_100BASE4 | LPA_LPACK;
3709 break;
3710 case MII_EXPANSION:
3711 break;
3712 case MII_DCOUNTER:
3713 break;
3714 case MII_FCSCOUNTER:
3715 break;
3716 case MII_NWAYTEST:
3717 break;
3718 case MII_RERRCOUNTER:
3719 rc = card->stats.rx_errors;
3720 break;
3721 case MII_SREVISION:
3722 break;
3723 case MII_RESV1:
3724 break;
3725 case MII_LBRERROR:
3726 break;
3727 case MII_PHYADDR:
3728 break;
3729 case MII_RESV2:
3730 break;
3731 case MII_TPISTATUS:
3732 break;
3733 case MII_NCONFIG:
3734 break;
3735 default:
3736 break;
3737 }
3738 return rc;
3739}
3740EXPORT_SYMBOL_GPL(qeth_mdio_read);
3741
3742static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3743 struct qeth_cmd_buffer *iob, int len,
3744 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3745 unsigned long),
3746 void *reply_param)
3747{
3748 u16 s1, s2;
3749
3750 QETH_CARD_TEXT(card, 4, "sendsnmp");
3751
3752 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3753 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3754 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3755
3756 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3757 s2 = (u32) len;
3758 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3759 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3760 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3761 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3762 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3763 reply_cb, reply_param);
3764}
3765
3766static int qeth_snmp_command_cb(struct qeth_card *card,
3767 struct qeth_reply *reply, unsigned long sdata)
3768{
3769 struct qeth_ipa_cmd *cmd;
3770 struct qeth_arp_query_info *qinfo;
3771 struct qeth_snmp_cmd *snmp;
3772 unsigned char *data;
3773 __u16 data_len;
3774
3775 QETH_CARD_TEXT(card, 3, "snpcmdcb");
3776
3777 cmd = (struct qeth_ipa_cmd *) sdata;
3778 data = (unsigned char *)((char *)cmd - reply->offset);
3779 qinfo = (struct qeth_arp_query_info *) reply->param;
3780 snmp = &cmd->data.setadapterparms.data.snmp;
3781
3782 if (cmd->hdr.return_code) {
3783 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
3784 return 0;
3785 }
3786 if (cmd->data.setadapterparms.hdr.return_code) {
3787 cmd->hdr.return_code =
3788 cmd->data.setadapterparms.hdr.return_code;
3789 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
3790 return 0;
3791 }
3792 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3793 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3794 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3795 else
3796 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3797
3798
3799 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3800 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
3801 cmd->hdr.return_code = -ENOMEM;
3802 return 0;
3803 }
3804 QETH_CARD_TEXT_(card, 4, "snore%i",
3805 cmd->data.setadapterparms.hdr.used_total);
3806 QETH_CARD_TEXT_(card, 4, "sseqn%i",
3807 cmd->data.setadapterparms.hdr.seq_no);
3808
3809 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3810 memcpy(qinfo->udata + qinfo->udata_offset,
3811 (char *)snmp,
3812 data_len + offsetof(struct qeth_snmp_cmd, data));
3813 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3814 } else {
3815 memcpy(qinfo->udata + qinfo->udata_offset,
3816 (char *)&snmp->request, data_len);
3817 }
3818 qinfo->udata_offset += data_len;
3819
3820 QETH_CARD_TEXT_(card, 4, "srtot%i",
3821 cmd->data.setadapterparms.hdr.used_total);
3822 QETH_CARD_TEXT_(card, 4, "srseq%i",
3823 cmd->data.setadapterparms.hdr.seq_no);
3824 if (cmd->data.setadapterparms.hdr.seq_no <
3825 cmd->data.setadapterparms.hdr.used_total)
3826 return 1;
3827 return 0;
3828}
3829
3830int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3831{
3832 struct qeth_cmd_buffer *iob;
3833 struct qeth_ipa_cmd *cmd;
3834 struct qeth_snmp_ureq *ureq;
3835 int req_len;
3836 struct qeth_arp_query_info qinfo = {0, };
3837 int rc = 0;
3838
3839 QETH_CARD_TEXT(card, 3, "snmpcmd");
3840
3841 if (card->info.guestlan)
3842 return -EOPNOTSUPP;
3843
3844 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3845 (!card->options.layer2)) {
3846 return -EOPNOTSUPP;
3847 }
3848
3849 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3850 return -EFAULT;
3851 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
3852 if (IS_ERR(ureq)) {
3853 QETH_CARD_TEXT(card, 2, "snmpnome");
3854 return PTR_ERR(ureq);
3855 }
3856 qinfo.udata_len = ureq->hdr.data_len;
3857 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3858 if (!qinfo.udata) {
3859 kfree(ureq);
3860 return -ENOMEM;
3861 }
3862 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3863
3864 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3865 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3866 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3867 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3868 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3869 qeth_snmp_command_cb, (void *)&qinfo);
3870 if (rc)
3871 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3872 QETH_CARD_IFNAME(card), rc);
3873 else {
3874 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3875 rc = -EFAULT;
3876 }
3877
3878 kfree(ureq);
3879 kfree(qinfo.udata);
3880 return rc;
3881}
3882EXPORT_SYMBOL_GPL(qeth_snmp_command);
3883
3884static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3885{
3886 switch (card->info.type) {
3887 case QETH_CARD_TYPE_IQD:
3888 return 2;
3889 default:
3890 return 0;
3891 }
3892}
3893
3894static void qeth_determine_capabilities(struct qeth_card *card)
3895{
3896 int rc;
3897 int length;
3898 char *prcd;
3899 struct ccw_device *ddev;
3900 int ddev_offline = 0;
3901
3902 QETH_DBF_TEXT(SETUP, 2, "detcapab");
3903 ddev = CARD_DDEV(card);
3904 if (!ddev->online) {
3905 ddev_offline = 1;
3906 rc = ccw_device_set_online(ddev);
3907 if (rc) {
3908 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3909 goto out;
3910 }
3911 }
3912
3913 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
3914 if (rc) {
3915 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
3916 dev_name(&card->gdev->dev), rc);
3917 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3918 goto out_offline;
3919 }
3920 qeth_configure_unitaddr(card, prcd);
3921 qeth_configure_blkt_default(card, prcd);
3922 kfree(prcd);
3923
3924 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
3925 if (rc)
3926 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
3927
3928out_offline:
3929 if (ddev_offline == 1)
3930 ccw_device_set_offline(ddev);
3931out:
3932 return;
3933}
3934
3935static int qeth_qdio_establish(struct qeth_card *card)
3936{
3937 struct qdio_initialize init_data;
3938 char *qib_param_field;
3939 struct qdio_buffer **in_sbal_ptrs;
3940 struct qdio_buffer **out_sbal_ptrs;
3941 int i, j, k;
3942 int rc = 0;
3943
3944 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3945
3946 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3947 GFP_KERNEL);
3948 if (!qib_param_field)
3949 return -ENOMEM;
3950
3951 qeth_create_qib_param_field(card, qib_param_field);
3952 qeth_create_qib_param_field_blkt(card, qib_param_field);
3953
3954 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3955 GFP_KERNEL);
3956 if (!in_sbal_ptrs) {
3957 kfree(qib_param_field);
3958 return -ENOMEM;
3959 }
3960 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3961 in_sbal_ptrs[i] = (struct qdio_buffer *)
3962 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3963
3964 out_sbal_ptrs =
3965 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3966 sizeof(void *), GFP_KERNEL);
3967 if (!out_sbal_ptrs) {
3968 kfree(in_sbal_ptrs);
3969 kfree(qib_param_field);
3970 return -ENOMEM;
3971 }
3972 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3973 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3974 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3975 card->qdio.out_qs[i]->bufs[j].buffer);
3976 }
3977
3978 memset(&init_data, 0, sizeof(struct qdio_initialize));
3979 init_data.cdev = CARD_DDEV(card);
3980 init_data.q_format = qeth_get_qdio_q_format(card);
3981 init_data.qib_param_field_format = 0;
3982 init_data.qib_param_field = qib_param_field;
3983 init_data.no_input_qs = 1;
3984 init_data.no_output_qs = card->qdio.no_out_queues;
3985 init_data.input_handler = card->discipline.input_handler;
3986 init_data.output_handler = card->discipline.output_handler;
3987 init_data.queue_start_poll = card->discipline.start_poll;
3988 init_data.int_parm = (unsigned long) card;
3989 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3990 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3991 init_data.scan_threshold =
3992 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
3993
3994 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3995 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3996 rc = qdio_allocate(&init_data);
3997 if (rc) {
3998 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3999 goto out;
4000 }
4001 rc = qdio_establish(&init_data);
4002 if (rc) {
4003 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4004 qdio_free(CARD_DDEV(card));
4005 }
4006 }
4007out:
4008 kfree(out_sbal_ptrs);
4009 kfree(in_sbal_ptrs);
4010 kfree(qib_param_field);
4011 return rc;
4012}
4013
4014static void qeth_core_free_card(struct qeth_card *card)
4015{
4016
4017 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4018 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4019 qeth_clean_channel(&card->read);
4020 qeth_clean_channel(&card->write);
4021 if (card->dev)
4022 free_netdev(card->dev);
4023 kfree(card->ip_tbd_list);
4024 qeth_free_qdio_buffers(card);
4025 unregister_service_level(&card->qeth_service_level);
4026 kfree(card);
4027}
4028
4029static struct ccw_device_id qeth_ids[] = {
4030 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4031 .driver_info = QETH_CARD_TYPE_OSD},
4032 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4033 .driver_info = QETH_CARD_TYPE_IQD},
4034 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4035 .driver_info = QETH_CARD_TYPE_OSN},
4036 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4037 .driver_info = QETH_CARD_TYPE_OSM},
4038 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4039 .driver_info = QETH_CARD_TYPE_OSX},
4040 {},
4041};
4042MODULE_DEVICE_TABLE(ccw, qeth_ids);
4043
4044static struct ccw_driver qeth_ccw_driver = {
4045 .driver = {
4046 .owner = THIS_MODULE,
4047 .name = "qeth",
4048 },
4049 .ids = qeth_ids,
4050 .probe = ccwgroup_probe_ccwdev,
4051 .remove = ccwgroup_remove_ccwdev,
4052};
4053
4054static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4055 unsigned long driver_id)
4056{
4057 return ccwgroup_create_from_string(root_dev, driver_id,
4058 &qeth_ccw_driver, 3, buf);
4059}
4060
4061int qeth_core_hardsetup_card(struct qeth_card *card)
4062{
4063 int retries = 0;
4064 int rc;
4065
4066 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4067 atomic_set(&card->force_alloc_skb, 0);
4068 qeth_get_channel_path_desc(card);
4069retry:
4070 if (retries)
4071 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4072 dev_name(&card->gdev->dev));
4073 ccw_device_set_offline(CARD_DDEV(card));
4074 ccw_device_set_offline(CARD_WDEV(card));
4075 ccw_device_set_offline(CARD_RDEV(card));
4076 rc = ccw_device_set_online(CARD_RDEV(card));
4077 if (rc)
4078 goto retriable;
4079 rc = ccw_device_set_online(CARD_WDEV(card));
4080 if (rc)
4081 goto retriable;
4082 rc = ccw_device_set_online(CARD_DDEV(card));
4083 if (rc)
4084 goto retriable;
4085 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4086retriable:
4087 if (rc == -ERESTARTSYS) {
4088 QETH_DBF_TEXT(SETUP, 2, "break1");
4089 return rc;
4090 } else if (rc) {
4091 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4092 if (++retries > 3)
4093 goto out;
4094 else
4095 goto retry;
4096 }
4097 qeth_determine_capabilities(card);
4098 qeth_init_tokens(card);
4099 qeth_init_func_level(card);
4100 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4101 if (rc == -ERESTARTSYS) {
4102 QETH_DBF_TEXT(SETUP, 2, "break2");
4103 return rc;
4104 } else if (rc) {
4105 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4106 if (--retries < 0)
4107 goto out;
4108 else
4109 goto retry;
4110 }
4111 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4112 if (rc == -ERESTARTSYS) {
4113 QETH_DBF_TEXT(SETUP, 2, "break3");
4114 return rc;
4115 } else if (rc) {
4116 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4117 if (--retries < 0)
4118 goto out;
4119 else
4120 goto retry;
4121 }
4122 card->read_or_write_problem = 0;
4123 rc = qeth_mpc_initialize(card);
4124 if (rc) {
4125 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4126 goto out;
4127 }
4128
4129 card->options.ipa4.supported_funcs = 0;
4130 card->options.adp.supported_funcs = 0;
4131 card->info.diagass_support = 0;
4132 qeth_query_ipassists(card, QETH_PROT_IPV4);
4133 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4134 qeth_query_setadapterparms(card);
4135 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4136 qeth_query_setdiagass(card);
4137 return 0;
4138out:
4139 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4140 "an error on the device\n");
4141 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4142 dev_name(&card->gdev->dev), rc);
4143 return rc;
4144}
4145EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4146
4147static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
4148 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4149{
4150 struct page *page = virt_to_page(element->addr);
4151 if (*pskb == NULL) {
4152
4153
4154
4155 *pskb = dev_alloc_skb(64 + ETH_HLEN);
4156 if (!(*pskb))
4157 return -ENOMEM;
4158 skb_reserve(*pskb, ETH_HLEN);
4159 if (data_len <= 64) {
4160 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4161 data_len);
4162 } else {
4163 get_page(page);
4164 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
4165 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
4166 data_len - 64);
4167 (*pskb)->data_len += data_len - 64;
4168 (*pskb)->len += data_len - 64;
4169 (*pskb)->truesize += data_len - 64;
4170 (*pfrag)++;
4171 }
4172 } else {
4173 get_page(page);
4174 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4175 (*pskb)->data_len += data_len;
4176 (*pskb)->len += data_len;
4177 (*pskb)->truesize += data_len;
4178 (*pfrag)++;
4179 }
4180 return 0;
4181}
4182
4183struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4184 struct qdio_buffer *buffer,
4185 struct qdio_buffer_element **__element, int *__offset,
4186 struct qeth_hdr **hdr)
4187{
4188 struct qdio_buffer_element *element = *__element;
4189 int offset = *__offset;
4190 struct sk_buff *skb = NULL;
4191 int skb_len = 0;
4192 void *data_ptr;
4193 int data_len;
4194 int headroom = 0;
4195 int use_rx_sg = 0;
4196 int frag = 0;
4197
4198
4199 if (element->length < offset + sizeof(struct qeth_hdr)) {
4200 if (qeth_is_last_sbale(element))
4201 return NULL;
4202 element++;
4203 offset = 0;
4204 if (element->length < sizeof(struct qeth_hdr))
4205 return NULL;
4206 }
4207 *hdr = element->addr + offset;
4208
4209 offset += sizeof(struct qeth_hdr);
4210 switch ((*hdr)->hdr.l2.id) {
4211 case QETH_HEADER_TYPE_LAYER2:
4212 skb_len = (*hdr)->hdr.l2.pkt_length;
4213 break;
4214 case QETH_HEADER_TYPE_LAYER3:
4215 skb_len = (*hdr)->hdr.l3.length;
4216 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4217 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4218 headroom = TR_HLEN;
4219 else
4220 headroom = ETH_HLEN;
4221 break;
4222 case QETH_HEADER_TYPE_OSN:
4223 skb_len = (*hdr)->hdr.osn.pdu_length;
4224 headroom = sizeof(struct qeth_hdr);
4225 break;
4226 default:
4227 break;
4228 }
4229
4230 if (!skb_len)
4231 return NULL;
4232
4233 if ((skb_len >= card->options.rx_sg_cb) &&
4234 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4235 (!atomic_read(&card->force_alloc_skb))) {
4236 use_rx_sg = 1;
4237 } else {
4238 skb = dev_alloc_skb(skb_len + headroom);
4239 if (!skb)
4240 goto no_mem;
4241 if (headroom)
4242 skb_reserve(skb, headroom);
4243 }
4244
4245 data_ptr = element->addr + offset;
4246 while (skb_len) {
4247 data_len = min(skb_len, (int)(element->length - offset));
4248 if (data_len) {
4249 if (use_rx_sg) {
4250 if (qeth_create_skb_frag(element, &skb, offset,
4251 &frag, data_len))
4252 goto no_mem;
4253 } else {
4254 memcpy(skb_put(skb, data_len), data_ptr,
4255 data_len);
4256 }
4257 }
4258 skb_len -= data_len;
4259 if (skb_len) {
4260 if (qeth_is_last_sbale(element)) {
4261 QETH_CARD_TEXT(card, 4, "unexeob");
4262 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4263 dev_kfree_skb_any(skb);
4264 card->stats.rx_errors++;
4265 return NULL;
4266 }
4267 element++;
4268 offset = 0;
4269 data_ptr = element->addr;
4270 } else {
4271 offset += data_len;
4272 }
4273 }
4274 *__element = element;
4275 *__offset = offset;
4276 if (use_rx_sg && card->options.performance_stats) {
4277 card->perf_stats.sg_skbs_rx++;
4278 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4279 }
4280 return skb;
4281no_mem:
4282 if (net_ratelimit()) {
4283 QETH_CARD_TEXT(card, 2, "noskbmem");
4284 }
4285 card->stats.rx_dropped++;
4286 return NULL;
4287}
4288EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4289
4290static void qeth_unregister_dbf_views(void)
4291{
4292 int x;
4293 for (x = 0; x < QETH_DBF_INFOS; x++) {
4294 debug_unregister(qeth_dbf[x].id);
4295 qeth_dbf[x].id = NULL;
4296 }
4297}
4298
4299void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4300{
4301 char dbf_txt_buf[32];
4302 va_list args;
4303
4304 if (level > id->level)
4305 return;
4306 va_start(args, fmt);
4307 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4308 va_end(args);
4309 debug_text_event(id, level, dbf_txt_buf);
4310}
4311EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4312
4313static int qeth_register_dbf_views(void)
4314{
4315 int ret;
4316 int x;
4317
4318 for (x = 0; x < QETH_DBF_INFOS; x++) {
4319
4320 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4321 qeth_dbf[x].pages,
4322 qeth_dbf[x].areas,
4323 qeth_dbf[x].len);
4324 if (qeth_dbf[x].id == NULL) {
4325 qeth_unregister_dbf_views();
4326 return -ENOMEM;
4327 }
4328
4329
4330 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4331 if (ret) {
4332 qeth_unregister_dbf_views();
4333 return ret;
4334 }
4335
4336
4337 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4338 }
4339
4340 return 0;
4341}
4342
4343int qeth_core_load_discipline(struct qeth_card *card,
4344 enum qeth_discipline_id discipline)
4345{
4346 int rc = 0;
4347 switch (discipline) {
4348 case QETH_DISCIPLINE_LAYER3:
4349 card->discipline.ccwgdriver = try_then_request_module(
4350 symbol_get(qeth_l3_ccwgroup_driver),
4351 "qeth_l3");
4352 break;
4353 case QETH_DISCIPLINE_LAYER2:
4354 card->discipline.ccwgdriver = try_then_request_module(
4355 symbol_get(qeth_l2_ccwgroup_driver),
4356 "qeth_l2");
4357 break;
4358 }
4359 if (!card->discipline.ccwgdriver) {
4360 dev_err(&card->gdev->dev, "There is no kernel module to "
4361 "support discipline %d\n", discipline);
4362 rc = -EINVAL;
4363 }
4364 return rc;
4365}
4366
4367void qeth_core_free_discipline(struct qeth_card *card)
4368{
4369 if (card->options.layer2)
4370 symbol_put(qeth_l2_ccwgroup_driver);
4371 else
4372 symbol_put(qeth_l3_ccwgroup_driver);
4373 card->discipline.ccwgdriver = NULL;
4374}
4375
4376static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4377{
4378 struct qeth_card *card;
4379 struct device *dev;
4380 int rc;
4381 unsigned long flags;
4382 char dbf_name[20];
4383
4384 QETH_DBF_TEXT(SETUP, 2, "probedev");
4385
4386 dev = &gdev->dev;
4387 if (!get_device(dev))
4388 return -ENODEV;
4389
4390 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4391
4392 card = qeth_alloc_card();
4393 if (!card) {
4394 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4395 rc = -ENOMEM;
4396 goto err_dev;
4397 }
4398
4399 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4400 dev_name(&gdev->dev));
4401 card->debug = debug_register(dbf_name, 2, 1, 8);
4402 if (!card->debug) {
4403 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4404 rc = -ENOMEM;
4405 goto err_card;
4406 }
4407 debug_register_view(card->debug, &debug_hex_ascii_view);
4408
4409 card->read.ccwdev = gdev->cdev[0];
4410 card->write.ccwdev = gdev->cdev[1];
4411 card->data.ccwdev = gdev->cdev[2];
4412 dev_set_drvdata(&gdev->dev, card);
4413 card->gdev = gdev;
4414 gdev->cdev[0]->handler = qeth_irq;
4415 gdev->cdev[1]->handler = qeth_irq;
4416 gdev->cdev[2]->handler = qeth_irq;
4417
4418 rc = qeth_determine_card_type(card);
4419 if (rc) {
4420 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4421 goto err_dbf;
4422 }
4423 rc = qeth_setup_card(card);
4424 if (rc) {
4425 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4426 goto err_dbf;
4427 }
4428
4429 if (card->info.type == QETH_CARD_TYPE_OSN)
4430 rc = qeth_core_create_osn_attributes(dev);
4431 else
4432 rc = qeth_core_create_device_attributes(dev);
4433 if (rc)
4434 goto err_dbf;
4435 switch (card->info.type) {
4436 case QETH_CARD_TYPE_OSN:
4437 case QETH_CARD_TYPE_OSM:
4438 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4439 if (rc)
4440 goto err_attr;
4441 rc = card->discipline.ccwgdriver->probe(card->gdev);
4442 if (rc)
4443 goto err_disc;
4444 case QETH_CARD_TYPE_OSD:
4445 case QETH_CARD_TYPE_OSX:
4446 default:
4447 break;
4448 }
4449
4450 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4451 list_add_tail(&card->list, &qeth_core_card_list.list);
4452 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4453
4454 qeth_determine_capabilities(card);
4455 return 0;
4456
4457err_disc:
4458 qeth_core_free_discipline(card);
4459err_attr:
4460 if (card->info.type == QETH_CARD_TYPE_OSN)
4461 qeth_core_remove_osn_attributes(dev);
4462 else
4463 qeth_core_remove_device_attributes(dev);
4464err_dbf:
4465 debug_unregister(card->debug);
4466err_card:
4467 qeth_core_free_card(card);
4468err_dev:
4469 put_device(dev);
4470 return rc;
4471}
4472
4473static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4474{
4475 unsigned long flags;
4476 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4477
4478 QETH_DBF_TEXT(SETUP, 2, "removedv");
4479
4480 if (card->info.type == QETH_CARD_TYPE_OSN) {
4481 qeth_core_remove_osn_attributes(&gdev->dev);
4482 } else {
4483 qeth_core_remove_device_attributes(&gdev->dev);
4484 }
4485
4486 if (card->discipline.ccwgdriver) {
4487 card->discipline.ccwgdriver->remove(gdev);
4488 qeth_core_free_discipline(card);
4489 }
4490
4491 debug_unregister(card->debug);
4492 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4493 list_del(&card->list);
4494 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4495 qeth_core_free_card(card);
4496 dev_set_drvdata(&gdev->dev, NULL);
4497 put_device(&gdev->dev);
4498 return;
4499}
4500
4501static int qeth_core_set_online(struct ccwgroup_device *gdev)
4502{
4503 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4504 int rc = 0;
4505 int def_discipline;
4506
4507 if (!card->discipline.ccwgdriver) {
4508 if (card->info.type == QETH_CARD_TYPE_IQD)
4509 def_discipline = QETH_DISCIPLINE_LAYER3;
4510 else
4511 def_discipline = QETH_DISCIPLINE_LAYER2;
4512 rc = qeth_core_load_discipline(card, def_discipline);
4513 if (rc)
4514 goto err;
4515 rc = card->discipline.ccwgdriver->probe(card->gdev);
4516 if (rc)
4517 goto err;
4518 }
4519 rc = card->discipline.ccwgdriver->set_online(gdev);
4520err:
4521 return rc;
4522}
4523
4524static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4525{
4526 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4527 return card->discipline.ccwgdriver->set_offline(gdev);
4528}
4529
4530static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4531{
4532 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4533 if (card->discipline.ccwgdriver &&
4534 card->discipline.ccwgdriver->shutdown)
4535 card->discipline.ccwgdriver->shutdown(gdev);
4536}
4537
4538static int qeth_core_prepare(struct ccwgroup_device *gdev)
4539{
4540 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4541 if (card->discipline.ccwgdriver &&
4542 card->discipline.ccwgdriver->prepare)
4543 return card->discipline.ccwgdriver->prepare(gdev);
4544 return 0;
4545}
4546
4547static void qeth_core_complete(struct ccwgroup_device *gdev)
4548{
4549 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4550 if (card->discipline.ccwgdriver &&
4551 card->discipline.ccwgdriver->complete)
4552 card->discipline.ccwgdriver->complete(gdev);
4553}
4554
4555static int qeth_core_freeze(struct ccwgroup_device *gdev)
4556{
4557 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4558 if (card->discipline.ccwgdriver &&
4559 card->discipline.ccwgdriver->freeze)
4560 return card->discipline.ccwgdriver->freeze(gdev);
4561 return 0;
4562}
4563
4564static int qeth_core_thaw(struct ccwgroup_device *gdev)
4565{
4566 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4567 if (card->discipline.ccwgdriver &&
4568 card->discipline.ccwgdriver->thaw)
4569 return card->discipline.ccwgdriver->thaw(gdev);
4570 return 0;
4571}
4572
4573static int qeth_core_restore(struct ccwgroup_device *gdev)
4574{
4575 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4576 if (card->discipline.ccwgdriver &&
4577 card->discipline.ccwgdriver->restore)
4578 return card->discipline.ccwgdriver->restore(gdev);
4579 return 0;
4580}
4581
4582static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4583 .driver = {
4584 .owner = THIS_MODULE,
4585 .name = "qeth",
4586 },
4587 .driver_id = 0xD8C5E3C8,
4588 .probe = qeth_core_probe_device,
4589 .remove = qeth_core_remove_device,
4590 .set_online = qeth_core_set_online,
4591 .set_offline = qeth_core_set_offline,
4592 .shutdown = qeth_core_shutdown,
4593 .prepare = qeth_core_prepare,
4594 .complete = qeth_core_complete,
4595 .freeze = qeth_core_freeze,
4596 .thaw = qeth_core_thaw,
4597 .restore = qeth_core_restore,
4598};
4599
4600static ssize_t
4601qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4602 size_t count)
4603{
4604 int err;
4605 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4606 qeth_core_ccwgroup_driver.driver_id);
4607 if (err)
4608 return err;
4609 else
4610 return count;
4611}
4612
4613static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4614
4615static struct {
4616 const char str[ETH_GSTRING_LEN];
4617} qeth_ethtool_stats_keys[] = {
4618{"rx skbs"},
4619 {"rx buffers"},
4620 {"tx skbs"},
4621 {"tx buffers"},
4622 {"tx skbs no packing"},
4623 {"tx buffers no packing"},
4624 {"tx skbs packing"},
4625 {"tx buffers packing"},
4626 {"tx sg skbs"},
4627 {"tx sg frags"},
4628{"rx sg skbs"},
4629 {"rx sg frags"},
4630 {"rx sg page allocs"},
4631 {"tx large kbytes"},
4632 {"tx large count"},
4633 {"tx pk state ch n->p"},
4634 {"tx pk state ch p->n"},
4635 {"tx pk watermark low"},
4636 {"tx pk watermark high"},
4637 {"queue 0 buffer usage"},
4638{"queue 1 buffer usage"},
4639 {"queue 2 buffer usage"},
4640 {"queue 3 buffer usage"},
4641 {"rx poll time"},
4642 {"rx poll count"},
4643 {"rx do_QDIO time"},
4644 {"rx do_QDIO count"},
4645 {"tx handler time"},
4646 {"tx handler count"},
4647 {"tx time"},
4648{"tx count"},
4649 {"tx do_QDIO time"},
4650 {"tx do_QDIO count"},
4651 {"tx csum"},
4652 {"tx lin"},
4653};
4654
4655int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4656{
4657 switch (stringset) {
4658 case ETH_SS_STATS:
4659 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4660 default:
4661 return -EINVAL;
4662 }
4663}
4664EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4665
4666void qeth_core_get_ethtool_stats(struct net_device *dev,
4667 struct ethtool_stats *stats, u64 *data)
4668{
4669 struct qeth_card *card = dev->ml_priv;
4670 data[0] = card->stats.rx_packets -
4671 card->perf_stats.initial_rx_packets;
4672 data[1] = card->perf_stats.bufs_rec;
4673 data[2] = card->stats.tx_packets -
4674 card->perf_stats.initial_tx_packets;
4675 data[3] = card->perf_stats.bufs_sent;
4676 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4677 - card->perf_stats.skbs_sent_pack;
4678 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4679 data[6] = card->perf_stats.skbs_sent_pack;
4680 data[7] = card->perf_stats.bufs_sent_pack;
4681 data[8] = card->perf_stats.sg_skbs_sent;
4682 data[9] = card->perf_stats.sg_frags_sent;
4683 data[10] = card->perf_stats.sg_skbs_rx;
4684 data[11] = card->perf_stats.sg_frags_rx;
4685 data[12] = card->perf_stats.sg_alloc_page_rx;
4686 data[13] = (card->perf_stats.large_send_bytes >> 10);
4687 data[14] = card->perf_stats.large_send_cnt;
4688 data[15] = card->perf_stats.sc_dp_p;
4689 data[16] = card->perf_stats.sc_p_dp;
4690 data[17] = QETH_LOW_WATERMARK_PACK;
4691 data[18] = QETH_HIGH_WATERMARK_PACK;
4692 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4693 data[20] = (card->qdio.no_out_queues > 1) ?
4694 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4695 data[21] = (card->qdio.no_out_queues > 2) ?
4696 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4697 data[22] = (card->qdio.no_out_queues > 3) ?
4698 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4699 data[23] = card->perf_stats.inbound_time;
4700 data[24] = card->perf_stats.inbound_cnt;
4701 data[25] = card->perf_stats.inbound_do_qdio_time;
4702 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4703 data[27] = card->perf_stats.outbound_handler_time;
4704 data[28] = card->perf_stats.outbound_handler_cnt;
4705 data[29] = card->perf_stats.outbound_time;
4706 data[30] = card->perf_stats.outbound_cnt;
4707 data[31] = card->perf_stats.outbound_do_qdio_time;
4708 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4709 data[33] = card->perf_stats.tx_csum;
4710 data[34] = card->perf_stats.tx_lin;
4711}
4712EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4713
4714void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4715{
4716 switch (stringset) {
4717 case ETH_SS_STATS:
4718 memcpy(data, &qeth_ethtool_stats_keys,
4719 sizeof(qeth_ethtool_stats_keys));
4720 break;
4721 default:
4722 WARN_ON(1);
4723 break;
4724 }
4725}
4726EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4727
4728void qeth_core_get_drvinfo(struct net_device *dev,
4729 struct ethtool_drvinfo *info)
4730{
4731 struct qeth_card *card = dev->ml_priv;
4732 if (card->options.layer2)
4733 strcpy(info->driver, "qeth_l2");
4734 else
4735 strcpy(info->driver, "qeth_l3");
4736
4737 strcpy(info->version, "1.0");
4738 strcpy(info->fw_version, card->info.mcl_level);
4739 sprintf(info->bus_info, "%s/%s/%s",
4740 CARD_RDEV_ID(card),
4741 CARD_WDEV_ID(card),
4742 CARD_DDEV_ID(card));
4743}
4744EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4745
4746int qeth_core_ethtool_get_settings(struct net_device *netdev,
4747 struct ethtool_cmd *ecmd)
4748{
4749 struct qeth_card *card = netdev->ml_priv;
4750 enum qeth_link_types link_type;
4751
4752 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4753 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4754 else
4755 link_type = card->info.link_type;
4756
4757 ecmd->transceiver = XCVR_INTERNAL;
4758 ecmd->supported = SUPPORTED_Autoneg;
4759 ecmd->advertising = ADVERTISED_Autoneg;
4760 ecmd->duplex = DUPLEX_FULL;
4761 ecmd->autoneg = AUTONEG_ENABLE;
4762
4763 switch (link_type) {
4764 case QETH_LINK_TYPE_FAST_ETH:
4765 case QETH_LINK_TYPE_LANE_ETH100:
4766 ecmd->supported |= SUPPORTED_10baseT_Half |
4767 SUPPORTED_10baseT_Full |
4768 SUPPORTED_100baseT_Half |
4769 SUPPORTED_100baseT_Full |
4770 SUPPORTED_TP;
4771 ecmd->advertising |= ADVERTISED_10baseT_Half |
4772 ADVERTISED_10baseT_Full |
4773 ADVERTISED_100baseT_Half |
4774 ADVERTISED_100baseT_Full |
4775 ADVERTISED_TP;
4776 ecmd->speed = SPEED_100;
4777 ecmd->port = PORT_TP;
4778 break;
4779
4780 case QETH_LINK_TYPE_GBIT_ETH:
4781 case QETH_LINK_TYPE_LANE_ETH1000:
4782 ecmd->supported |= SUPPORTED_10baseT_Half |
4783 SUPPORTED_10baseT_Full |
4784 SUPPORTED_100baseT_Half |
4785 SUPPORTED_100baseT_Full |
4786 SUPPORTED_1000baseT_Half |
4787 SUPPORTED_1000baseT_Full |
4788 SUPPORTED_FIBRE;
4789 ecmd->advertising |= ADVERTISED_10baseT_Half |
4790 ADVERTISED_10baseT_Full |
4791 ADVERTISED_100baseT_Half |
4792 ADVERTISED_100baseT_Full |
4793 ADVERTISED_1000baseT_Half |
4794 ADVERTISED_1000baseT_Full |
4795 ADVERTISED_FIBRE;
4796 ecmd->speed = SPEED_1000;
4797 ecmd->port = PORT_FIBRE;
4798 break;
4799
4800 case QETH_LINK_TYPE_10GBIT_ETH:
4801 ecmd->supported |= SUPPORTED_10baseT_Half |
4802 SUPPORTED_10baseT_Full |
4803 SUPPORTED_100baseT_Half |
4804 SUPPORTED_100baseT_Full |
4805 SUPPORTED_1000baseT_Half |
4806 SUPPORTED_1000baseT_Full |
4807 SUPPORTED_10000baseT_Full |
4808 SUPPORTED_FIBRE;
4809 ecmd->advertising |= ADVERTISED_10baseT_Half |
4810 ADVERTISED_10baseT_Full |
4811 ADVERTISED_100baseT_Half |
4812 ADVERTISED_100baseT_Full |
4813 ADVERTISED_1000baseT_Half |
4814 ADVERTISED_1000baseT_Full |
4815 ADVERTISED_10000baseT_Full |
4816 ADVERTISED_FIBRE;
4817 ecmd->speed = SPEED_10000;
4818 ecmd->port = PORT_FIBRE;
4819 break;
4820
4821 default:
4822 ecmd->supported |= SUPPORTED_10baseT_Half |
4823 SUPPORTED_10baseT_Full |
4824 SUPPORTED_TP;
4825 ecmd->advertising |= ADVERTISED_10baseT_Half |
4826 ADVERTISED_10baseT_Full |
4827 ADVERTISED_TP;
4828 ecmd->speed = SPEED_10;
4829 ecmd->port = PORT_TP;
4830 }
4831
4832 return 0;
4833}
4834EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4835
4836static int __init qeth_core_init(void)
4837{
4838 int rc;
4839
4840 pr_info("loading core functions\n");
4841 INIT_LIST_HEAD(&qeth_core_card_list.list);
4842 rwlock_init(&qeth_core_card_list.rwlock);
4843
4844 rc = qeth_register_dbf_views();
4845 if (rc)
4846 goto out_err;
4847 rc = ccw_driver_register(&qeth_ccw_driver);
4848 if (rc)
4849 goto ccw_err;
4850 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4851 if (rc)
4852 goto ccwgroup_err;
4853 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4854 &driver_attr_group);
4855 if (rc)
4856 goto driver_err;
4857 qeth_core_root_dev = root_device_register("qeth");
4858 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4859 if (rc)
4860 goto register_err;
4861
4862 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4863 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4864 if (!qeth_core_header_cache) {
4865 rc = -ENOMEM;
4866 goto slab_err;
4867 }
4868
4869 return 0;
4870slab_err:
4871 root_device_unregister(qeth_core_root_dev);
4872register_err:
4873 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4874 &driver_attr_group);
4875driver_err:
4876 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4877ccwgroup_err:
4878 ccw_driver_unregister(&qeth_ccw_driver);
4879ccw_err:
4880 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4881 qeth_unregister_dbf_views();
4882out_err:
4883 pr_err("Initializing the qeth device driver failed\n");
4884 return rc;
4885}
4886
4887static void __exit qeth_core_exit(void)
4888{
4889 root_device_unregister(qeth_core_root_dev);
4890 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4891 &driver_attr_group);
4892 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4893 ccw_driver_unregister(&qeth_ccw_driver);
4894 kmem_cache_destroy(qeth_core_header_cache);
4895 qeth_unregister_dbf_views();
4896 pr_info("core functions removed\n");
4897}
4898
4899module_init(qeth_core_init);
4900module_exit(qeth_core_exit);
4901MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4902MODULE_DESCRIPTION("qeth core functions");
4903MODULE_LICENSE("GPL");
4904
