LXR linux/drivers/usb/musb/musb

   1/*
   2 * MUSB OTG driver defines
   3 *
   4 * Copyright 2005 Mentor Graphics Corporation
   5 * Copyright (C) 2005-2006 by Texas Instruments
   6 * Copyright (C) 2006-2007 Nokia Corporation
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License
  10 * version 2 as published by the Free Software Foundation.
  11 *
  12 * This program is distributed in the hope that it will be useful, but
  13 * WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20 * 02110-1301 USA
  21 *
  22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 *
  33 */
  34
  35#ifndef __MUSB_CORE_H__
  36#define __MUSB_CORE_H__
  37
  38#include <linux/slab.h>
  39#include <linux/list.h>
  40#include <linux/interrupt.h>
  41#include <linux/errno.h>
  42#include <linux/timer.h>
  43#include <linux/clk.h>
  44#include <linux/device.h>
  45#include <linux/usb/ch9.h>
  46#include <linux/usb/gadget.h>
  47#include <linux/usb.h>
  48#include <linux/usb/otg.h>
  49#include <linux/usb/musb.h>
  50
  51struct musb;
  52struct musb_hw_ep;
  53struct musb_ep;
  54
  55/* Helper defines for struct musb->hwvers */
  56#define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  57#define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  58#define MUSB_HWVERS_RC          0x8000
  59#define MUSB_HWVERS_1300        0x52C
  60#define MUSB_HWVERS_1400        0x590
  61#define MUSB_HWVERS_1800        0x720
  62#define MUSB_HWVERS_1900        0x784
  63#define MUSB_HWVERS_2000        0x800
  64
  65#include "musb_debug.h"
  66#include "musb_dma.h"
  67
  68#include "musb_io.h"
  69#include "musb_regs.h"
  70
  71#include "musb_gadget.h"
  72#include <linux/usb/hcd.h>
  73#include "musb_host.h"
  74
  75#define is_peripheral_enabled(musb)     ((musb)->board_mode != MUSB_HOST)
  76#define is_host_enabled(musb)           ((musb)->board_mode != MUSB_PERIPHERAL)
  77#define is_otg_enabled(musb)            ((musb)->board_mode == MUSB_OTG)
  78
  79/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  80 * OTG or host-only go to A_IDLE when ID is sensed.
  81 */
  82#define is_peripheral_active(m)         (!(m)->is_host)
  83#define is_host_active(m)               ((m)->is_host)
  84
  85#ifndef CONFIG_HAVE_CLK
  86/* Dummy stub for clk framework */
  87#define clk_get(dev, id)        NULL
  88#define clk_put(clock)          do {} while (0)
  89#define clk_enable(clock)       do {} while (0)
  90#define clk_disable(clock)      do {} while (0)
  91#endif
  92
  93#ifdef CONFIG_PROC_FS
  94#include <linux/fs.h>
  95#define MUSB_CONFIG_PROC_FS
  96#endif
  97
  98/****************************** PERIPHERAL ROLE *****************************/
  99
 100#define is_peripheral_capable() (1)
 101
 102extern irqreturn_t musb_g_ep0_irq(struct musb *);
 103extern void musb_g_tx(struct musb *, u8);
 104extern void musb_g_rx(struct musb *, u8);
 105extern void musb_g_reset(struct musb *);
 106extern void musb_g_suspend(struct musb *);
 107extern void musb_g_resume(struct musb *);
 108extern void musb_g_wakeup(struct musb *);
 109extern void musb_g_disconnect(struct musb *);
 110
 111/****************************** HOST ROLE ***********************************/
 112
 113#define is_host_capable()       (1)
 114
 115extern irqreturn_t musb_h_ep0_irq(struct musb *);
 116extern void musb_host_tx(struct musb *, u8);
 117extern void musb_host_rx(struct musb *, u8);
 118
 119/****************************** CONSTANTS ********************************/
 120
 121#ifndef MUSB_C_NUM_EPS
 122#define MUSB_C_NUM_EPS ((u8)16)
 123#endif
 124
 125#ifndef MUSB_MAX_END0_PACKET
 126#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
 127#endif
 128
 129/* host side ep0 states */
 130enum musb_h_ep0_state {
 131        MUSB_EP0_IDLE,
 132        MUSB_EP0_START,                 /* expect ack of setup */
 133        MUSB_EP0_IN,                    /* expect IN DATA */
 134        MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
 135        MUSB_EP0_STATUS,                /* expect ack of STATUS */
 136} __attribute__ ((packed));
 137
 138/* peripheral side ep0 states */
 139enum musb_g_ep0_state {
 140        MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
 141        MUSB_EP0_STAGE_SETUP,           /* received SETUP */
 142        MUSB_EP0_STAGE_TX,              /* IN data */
 143        MUSB_EP0_STAGE_RX,              /* OUT data */
 144        MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
 145        MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
 146        MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
 147} __attribute__ ((packed));
 148
 149/*
 150 * OTG protocol constants.  See USB OTG 1.3 spec,
 151 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 152 */
 153#define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
 154#define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
 155#define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
 156#define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
 157
 158
 159/*************************** REGISTER ACCESS ********************************/
 160
 161/* Endpoint registers (other than dynfifo setup) can be accessed either
 162 * directly with the "flat" model, or after setting up an index register.
 163 */
 164
 165#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
 166                || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
 167                || defined(CONFIG_ARCH_OMAP4)
 168/* REVISIT indexed access seemed to
 169 * misbehave (on DaVinci) for at least peripheral IN ...
 170 */
 171#define MUSB_FLAT_REG
 172#endif
 173
 174/* TUSB mapping: "flat" plus ep0 special cases */
 175#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 176        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 177#define musb_ep_select(_mbase, _epnum) \
 178        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 179#define MUSB_EP_OFFSET                  MUSB_TUSB_OFFSET
 180
 181/* "flat" mapping: each endpoint has its own i/o address */
 182#elif   defined(MUSB_FLAT_REG)
 183#define musb_ep_select(_mbase, _epnum)  (((void)(_mbase)), ((void)(_epnum)))
 184#define MUSB_EP_OFFSET                  MUSB_FLAT_OFFSET
 185
 186/* "indexed" mapping: INDEX register controls register bank select */
 187#else
 188#define musb_ep_select(_mbase, _epnum) \
 189        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 190#define MUSB_EP_OFFSET                  MUSB_INDEXED_OFFSET
 191#endif
 192
 193/****************************** FUNCTIONS ********************************/
 194
 195#define MUSB_HST_MODE(_musb)\
 196        { (_musb)->is_host = true; }
 197#define MUSB_DEV_MODE(_musb) \
 198        { (_musb)->is_host = false; }
 199
 200#define test_devctl_hst_mode(_x) \
 201        (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 202
 203#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 204
 205/******************************** TYPES *************************************/
 206
 207/**
 208 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 209 * @init:       turns on clocks, sets up platform-specific registers, etc
 210 * @exit:       undoes @init
 211 * @set_mode:   forcefully changes operating mode
 212 * @try_ilde:   tries to idle the IP
 213 * @vbus_status: returns vbus status if possible
 214 * @set_vbus:   forces vbus status
 215 * @adjust_channel_params: pre check for standard dma channel_program func
 216 */
 217struct musb_platform_ops {
 218        int     (*init)(struct musb *musb);
 219        int     (*exit)(struct musb *musb);
 220
 221        void    (*enable)(struct musb *musb);
 222        void    (*disable)(struct musb *musb);
 223
 224        int     (*set_mode)(struct musb *musb, u8 mode);
 225        void    (*try_idle)(struct musb *musb, unsigned long timeout);
 226
 227        int     (*vbus_status)(struct musb *musb);
 228        void    (*set_vbus)(struct musb *musb, int on);
 229
 230        int     (*adjust_channel_params)(struct dma_channel *channel,
 231                                u16 packet_sz, u8 *mode,
 232                                dma_addr_t *dma_addr, u32 *len);
 233};
 234
 235/*
 236 * struct musb_hw_ep - endpoint hardware (bidirectional)
 237 *
 238 * Ordered slightly for better cacheline locality.
 239 */
 240struct musb_hw_ep {
 241        struct musb             *musb;
 242        void __iomem            *fifo;
 243        void __iomem            *regs;
 244
 245#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 246        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 247        void __iomem            *conf;
 248#endif
 249
 250        /* index in musb->endpoints[]  */
 251        u8                      epnum;
 252
 253        /* hardware configuration, possibly dynamic */
 254        bool                    is_shared_fifo;
 255        bool                    tx_double_buffered;
 256        bool                    rx_double_buffered;
 257        u16                     max_packet_sz_tx;
 258        u16                     max_packet_sz_rx;
 259
 260        struct dma_channel      *tx_channel;
 261        struct dma_channel      *rx_channel;
 262
 263#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 264        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 265        /* TUSB has "asynchronous" and "synchronous" dma modes */
 266        dma_addr_t              fifo_async;
 267        dma_addr_t              fifo_sync;
 268        void __iomem            *fifo_sync_va;
 269#endif
 270
 271        void __iomem            *target_regs;
 272
 273        /* currently scheduled peripheral endpoint */
 274        struct musb_qh          *in_qh;
 275        struct musb_qh          *out_qh;
 276
 277        u8                      rx_reinit;
 278        u8                      tx_reinit;
 279
 280        /* peripheral side */
 281        struct musb_ep          ep_in;                  /* TX */
 282        struct musb_ep          ep_out;                 /* RX */
 283};
 284
 285static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 286{
 287        return next_request(&hw_ep->ep_in);
 288}
 289
 290static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 291{
 292        return next_request(&hw_ep->ep_out);
 293}
 294
 295struct musb_csr_regs {
 296        /* FIFO registers */
 297        u16 txmaxp, txcsr, rxmaxp, rxcsr;
 298        u16 rxfifoadd, txfifoadd;
 299        u8 txtype, txinterval, rxtype, rxinterval;
 300        u8 rxfifosz, txfifosz;
 301        u8 txfunaddr, txhubaddr, txhubport;
 302        u8 rxfunaddr, rxhubaddr, rxhubport;
 303};
 304
 305struct musb_context_registers {
 306
 307        u8 power;
 308        u16 intrtxe, intrrxe;
 309        u8 intrusbe;
 310        u16 frame;
 311        u8 index, testmode;
 312
 313        u8 devctl, busctl, misc;
 314
 315        struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 316};
 317
 318/*
 319 * struct musb - Driver instance data.
 320 */
 321struct musb {
 322        /* device lock */
 323        spinlock_t              lock;
 324
 325        const struct musb_platform_ops *ops;
 326        struct musb_context_registers context;
 327
 328        irqreturn_t             (*isr)(int, void *);
 329        struct work_struct      irq_work;
 330        u16                     hwvers;
 331
 332/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 333#define MUSB_PORT_STAT_RESUME   (1 << 31)
 334
 335        u32                     port1_status;
 336
 337        unsigned long           rh_timer;
 338
 339        enum musb_h_ep0_state   ep0_stage;
 340
 341        /* bulk traffic normally dedicates endpoint hardware, and each
 342         * direction has its own ring of host side endpoints.
 343         * we try to progress the transfer at the head of each endpoint's
 344         * queue until it completes or NAKs too much; then we try the next
 345         * endpoint.
 346         */
 347        struct musb_hw_ep       *bulk_ep;
 348
 349        struct list_head        control;        /* of musb_qh */
 350        struct list_head        in_bulk;        /* of musb_qh */
 351        struct list_head        out_bulk;       /* of musb_qh */
 352
 353        struct timer_list       otg_timer;
 354        struct notifier_block   nb;
 355
 356        struct dma_controller   *dma_controller;
 357
 358        struct device           *controller;
 359        void __iomem            *ctrl_base;
 360        void __iomem            *mregs;
 361
 362#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 363        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 364        dma_addr_t              async;
 365        dma_addr_t              sync;
 366        void __iomem            *sync_va;
 367#endif
 368
 369        /* passed down from chip/board specific irq handlers */
 370        u8                      int_usb;
 371        u16                     int_rx;
 372        u16                     int_tx;
 373
 374        struct otg_transceiver  *xceiv;
 375
 376        int nIrq;
 377        unsigned                irq_wake:1;
 378
 379        struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 380#define control_ep              endpoints
 381
 382#define VBUSERR_RETRY_COUNT     3
 383        u16                     vbuserr_retry;
 384        u16 epmask;
 385        u8 nr_endpoints;
 386
 387        u8 board_mode;          /* enum musb_mode */
 388        int                     (*board_set_power)(int state);
 389
 390        u8                      min_power;      /* vbus for periph, in mA/2 */
 391
 392        bool                    is_host;
 393
 394        int                     a_wait_bcon;    /* VBUS timeout in msecs */
 395        unsigned long           idle_timeout;   /* Next timeout in jiffies */
 396
 397        /* active means connected and not suspended */
 398        unsigned                is_active:1;
 399
 400        unsigned is_multipoint:1;
 401        unsigned ignore_disconnect:1;   /* during bus resets */
 402
 403        unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 404        unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 405        unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 406
 407        unsigned                bulk_split:1;
 408#define can_bulk_split(musb,type) \
 409        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 410
 411        unsigned                bulk_combine:1;
 412#define can_bulk_combine(musb,type) \
 413        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 414
 415        /* is_suspended means USB B_PERIPHERAL suspend */
 416        unsigned                is_suspended:1;
 417
 418        /* may_wakeup means remote wakeup is enabled */
 419        unsigned                may_wakeup:1;
 420
 421        /* is_self_powered is reported in device status and the
 422         * config descriptor.  is_bus_powered means B_PERIPHERAL
 423         * draws some VBUS current; both can be true.
 424         */
 425        unsigned                is_self_powered:1;
 426        unsigned                is_bus_powered:1;
 427
 428        unsigned                set_address:1;
 429        unsigned                test_mode:1;
 430        unsigned                softconnect:1;
 431
 432        u8                      address;
 433        u8                      test_mode_nr;
 434        u16                     ackpend;                /* ep0 */
 435        enum musb_g_ep0_state   ep0_state;
 436        struct usb_gadget       g;                      /* the gadget */
 437        struct usb_gadget_driver *gadget_driver;        /* its driver */
 438
 439        /*
 440         * FIXME: Remove this flag.
 441         *
 442         * This is only added to allow Blackfin to work
 443         * with current driver. For some unknown reason
 444         * Blackfin doesn't work with double buffering
 445         * and that's enabled by default.
 446         *
 447         * We added this flag to forcefully disable double
 448         * buffering until we get it working.
 449         */
 450        unsigned                double_buffer_not_ok:1 __deprecated;
 451
 452        struct musb_hdrc_config *config;
 453
 454#ifdef MUSB_CONFIG_PROC_FS
 455        struct proc_dir_entry *proc_entry;
 456#endif
 457};
 458
 459static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 460{
 461        return container_of(g, struct musb, g);
 462}
 463
 464#ifdef CONFIG_BLACKFIN
 465static inline int musb_read_fifosize(struct musb *musb,
 466                struct musb_hw_ep *hw_ep, u8 epnum)
 467{
 468        musb->nr_endpoints++;
 469        musb->epmask |= (1 << epnum);
 470
 471        if (epnum < 5) {
 472                hw_ep->max_packet_sz_tx = 128;
 473                hw_ep->max_packet_sz_rx = 128;
 474        } else {
 475                hw_ep->max_packet_sz_tx = 1024;
 476                hw_ep->max_packet_sz_rx = 1024;
 477        }
 478        hw_ep->is_shared_fifo = false;
 479
 480        return 0;
 481}
 482
 483static inline void musb_configure_ep0(struct musb *musb)
 484{
 485        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 486        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 487        musb->endpoints[0].is_shared_fifo = true;
 488}
 489
 490#else
 491
 492static inline int musb_read_fifosize(struct musb *musb,
 493                struct musb_hw_ep *hw_ep, u8 epnum)
 494{
 495        void *mbase = musb->mregs;
 496        u8 reg = 0;
 497
 498        /* read from core using indexed model */
 499        reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
 500        /* 0's returned when no more endpoints */
 501        if (!reg)
 502                return -ENODEV;
 503
 504        musb->nr_endpoints++;
 505        musb->epmask |= (1 << epnum);
 506
 507        hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 508
 509        /* shared TX/RX FIFO? */
 510        if ((reg & 0xf0) == 0xf0) {
 511                hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 512                hw_ep->is_shared_fifo = true;
 513                return 0;
 514        } else {
 515                hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 516                hw_ep->is_shared_fifo = false;
 517        }
 518
 519        return 0;
 520}
 521
 522static inline void musb_configure_ep0(struct musb *musb)
 523{
 524        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 525        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 526        musb->endpoints[0].is_shared_fifo = true;
 527}
 528#endif /* CONFIG_BLACKFIN */
 529
 530
 531/***************************** Glue it together *****************************/
 532
 533extern const char musb_driver_name[];
 534
 535extern void musb_start(struct musb *musb);
 536extern void musb_stop(struct musb *musb);
 537
 538extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 539extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 540
 541extern void musb_load_testpacket(struct musb *);
 542
 543extern irqreturn_t musb_interrupt(struct musb *);
 544
 545extern void musb_hnp_stop(struct musb *musb);
 546
 547static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 548{
 549        if (musb->ops->set_vbus)
 550                musb->ops->set_vbus(musb, is_on);
 551}
 552
 553static inline void musb_platform_enable(struct musb *musb)
 554{
 555        if (musb->ops->enable)
 556                musb->ops->enable(musb);
 557}
 558
 559static inline void musb_platform_disable(struct musb *musb)
 560{
 561        if (musb->ops->disable)
 562                musb->ops->disable(musb);
 563}
 564
 565static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 566{
 567        if (!musb->ops->set_mode)
 568                return 0;
 569
 570        return musb->ops->set_mode(musb, mode);
 571}
 572
 573static inline void musb_platform_try_idle(struct musb *musb,
 574                unsigned long timeout)
 575{
 576        if (musb->ops->try_idle)
 577                musb->ops->try_idle(musb, timeout);
 578}
 579
 580static inline int musb_platform_get_vbus_status(struct musb *musb)
 581{
 582        if (!musb->ops->vbus_status)
 583                return 0;
 584
 585        return musb->ops->vbus_status(musb);
 586}
 587
 588static inline int musb_platform_init(struct musb *musb)
 589{
 590        if (!musb->ops->init)
 591                return -EINVAL;
 592
 593        return musb->ops->init(musb);
 594}
 595
 596static inline int musb_platform_exit(struct musb *musb)
 597{
 598        if (!musb->ops->exit)
 599                return -EINVAL;
 600
 601        return musb->ops->exit(musb);
 602}
 603
 604#endif  /* __MUSB_CORE_H__ */
 605