linux/sound/soc/codecs/wm8991.c
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   1/*
   2 * wm8991.c  --  WM8991 ALSA Soc Audio driver
   3 *
   4 * Copyright 2007-2010 Wolfson Microelectronics PLC.
   5 * Author: Graeme Gregory
   6 *         linux@wolfsonmicro.com
   7 *
   8 *  This program is free software; you can redistribute  it and/or modify it
   9 *  under  the terms of  the GNU General  Public License as published by the
  10 *  Free Software Foundation;  either version 2 of the  License, or (at your
  11 *  option) any later version.
  12 */
  13
  14#include <linux/module.h>
  15#include <linux/moduleparam.h>
  16#include <linux/kernel.h>
  17#include <linux/init.h>
  18#include <linux/delay.h>
  19#include <linux/pm.h>
  20#include <linux/i2c.h>
  21#include <linux/platform_device.h>
  22#include <linux/slab.h>
  23#include <sound/core.h>
  24#include <sound/pcm.h>
  25#include <sound/pcm_params.h>
  26#include <sound/soc.h>
  27#include <sound/soc-dapm.h>
  28#include <sound/initval.h>
  29#include <sound/tlv.h>
  30#include <asm/div64.h>
  31
  32#include "wm8991.h"
  33
  34struct wm8991_priv {
  35        enum snd_soc_control_type control_type;
  36        unsigned int pcmclk;
  37};
  38
  39static const u16 wm8991_reg_defs[] = {
  40        0x8991,     /* R0  - Reset */
  41        0x0000,     /* R1  - Power Management (1) */
  42        0x6000,     /* R2  - Power Management (2) */
  43        0x0000,     /* R3  - Power Management (3) */
  44        0x4050,     /* R4  - Audio Interface (1) */
  45        0x4000,     /* R5  - Audio Interface (2) */
  46        0x01C8,     /* R6  - Clocking (1) */
  47        0x0000,     /* R7  - Clocking (2) */
  48        0x0040,     /* R8  - Audio Interface (3) */
  49        0x0040,     /* R9  - Audio Interface (4) */
  50        0x0004,     /* R10 - DAC CTRL */
  51        0x00C0,     /* R11 - Left DAC Digital Volume */
  52        0x00C0,     /* R12 - Right DAC Digital Volume */
  53        0x0000,     /* R13 - Digital Side Tone */
  54        0x0100,     /* R14 - ADC CTRL */
  55        0x00C0,     /* R15 - Left ADC Digital Volume */
  56        0x00C0,     /* R16 - Right ADC Digital Volume */
  57        0x0000,     /* R17 */
  58        0x0000,     /* R18 - GPIO CTRL 1 */
  59        0x1000,     /* R19 - GPIO1 & GPIO2 */
  60        0x1010,     /* R20 - GPIO3 & GPIO4 */
  61        0x1010,     /* R21 - GPIO5 & GPIO6 */
  62        0x8000,     /* R22 - GPIOCTRL 2 */
  63        0x0800,     /* R23 - GPIO_POL */
  64        0x008B,     /* R24 - Left Line Input 1&2 Volume */
  65        0x008B,     /* R25 - Left Line Input 3&4 Volume */
  66        0x008B,     /* R26 - Right Line Input 1&2 Volume */
  67        0x008B,     /* R27 - Right Line Input 3&4 Volume */
  68        0x0000,     /* R28 - Left Output Volume */
  69        0x0000,     /* R29 - Right Output Volume */
  70        0x0066,     /* R30 - Line Outputs Volume */
  71        0x0022,     /* R31 - Out3/4 Volume */
  72        0x0079,     /* R32 - Left OPGA Volume */
  73        0x0079,     /* R33 - Right OPGA Volume */
  74        0x0003,     /* R34 - Speaker Volume */
  75        0x0003,     /* R35 - ClassD1 */
  76        0x0000,     /* R36 */
  77        0x0100,     /* R37 - ClassD3 */
  78        0x0000,     /* R38 */
  79        0x0000,     /* R39 - Input Mixer1 */
  80        0x0000,     /* R40 - Input Mixer2 */
  81        0x0000,     /* R41 - Input Mixer3 */
  82        0x0000,     /* R42 - Input Mixer4 */
  83        0x0000,     /* R43 - Input Mixer5 */
  84        0x0000,     /* R44 - Input Mixer6 */
  85        0x0000,     /* R45 - Output Mixer1 */
  86        0x0000,     /* R46 - Output Mixer2 */
  87        0x0000,     /* R47 - Output Mixer3 */
  88        0x0000,     /* R48 - Output Mixer4 */
  89        0x0000,     /* R49 - Output Mixer5 */
  90        0x0000,     /* R50 - Output Mixer6 */
  91        0x0180,     /* R51 - Out3/4 Mixer */
  92        0x0000,     /* R52 - Line Mixer1 */
  93        0x0000,     /* R53 - Line Mixer2 */
  94        0x0000,     /* R54 - Speaker Mixer */
  95        0x0000,     /* R55 - Additional Control */
  96        0x0000,     /* R56 - AntiPOP1 */
  97        0x0000,     /* R57 - AntiPOP2 */
  98        0x0000,     /* R58 - MICBIAS */
  99        0x0000,     /* R59 */
 100        0x0008,     /* R60 - PLL1 */
 101        0x0031,     /* R61 - PLL2 */
 102        0x0026,     /* R62 - PLL3 */
 103};
 104
 105#define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
 106
 107static const unsigned int rec_mix_tlv[] = {
 108        TLV_DB_RANGE_HEAD(1),
 109        0, 7, TLV_DB_LINEAR_ITEM(-1500, 600),
 110};
 111
 112static const unsigned int in_pga_tlv[] = {
 113        TLV_DB_RANGE_HEAD(1),
 114        0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000),
 115};
 116
 117static const unsigned int out_mix_tlv[] = {
 118        TLV_DB_RANGE_HEAD(1),
 119        0, 7, TLV_DB_LINEAR_ITEM(0, -2100),
 120};
 121
 122static const unsigned int out_pga_tlv[] = {
 123        TLV_DB_RANGE_HEAD(1),
 124        0, 127, TLV_DB_LINEAR_ITEM(-7300, 600),
 125};
 126
 127static const unsigned int out_omix_tlv[] = {
 128        TLV_DB_RANGE_HEAD(1),
 129        0, 7, TLV_DB_LINEAR_ITEM(-600, 0),
 130};
 131
 132static const unsigned int out_dac_tlv[] = {
 133        TLV_DB_RANGE_HEAD(1),
 134        0, 255, TLV_DB_LINEAR_ITEM(-7163, 0),
 135};
 136
 137static const unsigned int in_adc_tlv[] = {
 138        TLV_DB_RANGE_HEAD(1),
 139        0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763),
 140};
 141
 142static const unsigned int out_sidetone_tlv[] = {
 143        TLV_DB_RANGE_HEAD(1),
 144        0, 31, TLV_DB_LINEAR_ITEM(-3600, 0),
 145};
 146
 147static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
 148                                      struct snd_ctl_elem_value *ucontrol)
 149{
 150        struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 151        int reg = kcontrol->private_value & 0xff;
 152        int ret;
 153        u16 val;
 154
 155        ret = snd_soc_put_volsw(kcontrol, ucontrol);
 156        if (ret < 0)
 157                return ret;
 158
 159        /* now hit the volume update bits (always bit 8) */
 160        val = snd_soc_read(codec, reg);
 161        return snd_soc_write(codec, reg, val | 0x0100);
 162}
 163
 164static const char *wm8991_digital_sidetone[] =
 165{"None", "Left ADC", "Right ADC", "Reserved"};
 166
 167static const struct soc_enum wm8991_left_digital_sidetone_enum =
 168        SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
 169                        WM8991_ADC_TO_DACL_SHIFT,
 170                        WM8991_ADC_TO_DACL_MASK,
 171                        wm8991_digital_sidetone);
 172
 173static const struct soc_enum wm8991_right_digital_sidetone_enum =
 174        SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
 175                        WM8991_ADC_TO_DACR_SHIFT,
 176                        WM8991_ADC_TO_DACR_MASK,
 177                        wm8991_digital_sidetone);
 178
 179static const char *wm8991_adcmode[] =
 180{"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
 181
 182static const struct soc_enum wm8991_right_adcmode_enum =
 183        SOC_ENUM_SINGLE(WM8991_ADC_CTRL,
 184                        WM8991_ADC_HPF_CUT_SHIFT,
 185                        WM8991_ADC_HPF_CUT_MASK,
 186                        wm8991_adcmode);
 187
 188static const struct snd_kcontrol_new wm8991_snd_controls[] = {
 189        /* INMIXL */
 190        SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
 191        SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
 192        /* INMIXR */
 193        SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
 194        SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
 195
 196        /* LOMIX */
 197        SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
 198                WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
 199        SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
 200                WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
 201        SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
 202                WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
 203        SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
 204                WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
 205        SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
 206                WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
 207        SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
 208                WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
 209
 210        /* ROMIX */
 211        SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
 212                WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
 213        SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
 214                WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
 215        SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
 216                WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
 217        SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
 218                WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
 219        SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
 220                WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
 221        SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
 222                WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
 223
 224        /* LOUT */
 225        SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
 226                WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
 227        SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
 228
 229        /* ROUT */
 230        SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
 231                WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
 232        SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
 233
 234        /* LOPGA */
 235        SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
 236                WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
 237        SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
 238                WM8991_LOPGAZC_BIT, 1, 0),
 239
 240        /* ROPGA */
 241        SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
 242                WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
 243        SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
 244                WM8991_ROPGAZC_BIT, 1, 0),
 245
 246        SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 247                WM8991_LONMUTE_BIT, 1, 0),
 248        SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 249                WM8991_LOPMUTE_BIT, 1, 0),
 250        SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
 251                WM8991_LOATTN_BIT, 1, 0),
 252        SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 253                WM8991_RONMUTE_BIT, 1, 0),
 254        SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 255                WM8991_ROPMUTE_BIT, 1, 0),
 256        SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
 257                WM8991_ROATTN_BIT, 1, 0),
 258
 259        SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
 260                WM8991_OUT3MUTE_BIT, 1, 0),
 261        SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
 262                WM8991_OUT3ATTN_BIT, 1, 0),
 263
 264        SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
 265                WM8991_OUT4MUTE_BIT, 1, 0),
 266        SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
 267                WM8991_OUT4ATTN_BIT, 1, 0),
 268
 269        SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
 270                WM8991_CDMODE_BIT, 1, 0),
 271
 272        SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
 273                WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
 274        SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
 275                WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
 276        SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
 277                WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
 278
 279        SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
 280                WM8991_LEFT_DAC_DIGITAL_VOLUME,
 281                WM8991_DACL_VOL_SHIFT,
 282                WM8991_DACL_VOL_MASK,
 283                0,
 284                out_dac_tlv),
 285
 286        SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
 287                WM8991_RIGHT_DAC_DIGITAL_VOLUME,
 288                WM8991_DACR_VOL_SHIFT,
 289                WM8991_DACR_VOL_MASK,
 290                0,
 291                out_dac_tlv),
 292
 293        SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
 294        SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
 295
 296        SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
 297                WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
 298                out_sidetone_tlv),
 299        SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
 300                WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
 301                out_sidetone_tlv),
 302
 303        SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
 304                WM8991_ADC_HPF_ENA_BIT, 1, 0),
 305
 306        SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
 307
 308        SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
 309                WM8991_LEFT_ADC_DIGITAL_VOLUME,
 310                WM8991_ADCL_VOL_SHIFT,
 311                WM8991_ADCL_VOL_MASK,
 312                0,
 313                in_adc_tlv),
 314
 315        SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
 316                WM8991_RIGHT_ADC_DIGITAL_VOLUME,
 317                WM8991_ADCR_VOL_SHIFT,
 318                WM8991_ADCR_VOL_MASK,
 319                0,
 320                in_adc_tlv),
 321
 322        SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
 323                WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 324                WM8991_LIN12VOL_SHIFT,
 325                WM8991_LIN12VOL_MASK,
 326                0,
 327                in_pga_tlv),
 328
 329        SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 330                WM8991_LI12ZC_BIT, 1, 0),
 331
 332        SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 333                WM8991_LI12MUTE_BIT, 1, 0),
 334
 335        SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
 336                WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 337                WM8991_LIN34VOL_SHIFT,
 338                WM8991_LIN34VOL_MASK,
 339                0,
 340                in_pga_tlv),
 341
 342        SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 343                WM8991_LI34ZC_BIT, 1, 0),
 344
 345        SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 346                WM8991_LI34MUTE_BIT, 1, 0),
 347
 348        SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
 349                WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 350                WM8991_RIN12VOL_SHIFT,
 351                WM8991_RIN12VOL_MASK,
 352                0,
 353                in_pga_tlv),
 354
 355        SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 356                WM8991_RI12ZC_BIT, 1, 0),
 357
 358        SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 359                WM8991_RI12MUTE_BIT, 1, 0),
 360
 361        SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
 362                WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 363                WM8991_RIN34VOL_SHIFT,
 364                WM8991_RIN34VOL_MASK,
 365                0,
 366                in_pga_tlv),
 367
 368        SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 369                WM8991_RI34ZC_BIT, 1, 0),
 370
 371        SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 372                WM8991_RI34MUTE_BIT, 1, 0),
 373};
 374
 375/*
 376 * _DAPM_ Controls
 377 */
 378static int inmixer_event(struct snd_soc_dapm_widget *w,
 379                         struct snd_kcontrol *kcontrol, int event)
 380{
 381        u16 reg, fakepower;
 382
 383        reg = snd_soc_read(w->codec, WM8991_POWER_MANAGEMENT_2);
 384        fakepower = snd_soc_read(w->codec, WM8991_INTDRIVBITS);
 385
 386        if (fakepower & ((1 << WM8991_INMIXL_PWR_BIT) |
 387                         (1 << WM8991_AINLMUX_PWR_BIT)))
 388                reg |= WM8991_AINL_ENA;
 389        else
 390                reg &= ~WM8991_AINL_ENA;
 391
 392        if (fakepower & ((1 << WM8991_INMIXR_PWR_BIT) |
 393                         (1 << WM8991_AINRMUX_PWR_BIT)))
 394                reg |= WM8991_AINR_ENA;
 395        else
 396                reg &= ~WM8991_AINL_ENA;
 397
 398        snd_soc_write(w->codec, WM8991_POWER_MANAGEMENT_2, reg);
 399        return 0;
 400}
 401
 402static int outmixer_event(struct snd_soc_dapm_widget *w,
 403                          struct snd_kcontrol *kcontrol, int event)
 404{
 405        u32 reg_shift = kcontrol->private_value & 0xfff;
 406        int ret = 0;
 407        u16 reg;
 408
 409        switch (reg_shift) {
 410        case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
 411                reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1);
 412                if (reg & WM8991_LDLO) {
 413                        printk(KERN_WARNING
 414                               "Cannot set as Output Mixer 1 LDLO Set\n");
 415                        ret = -1;
 416                }
 417                break;
 418
 419        case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
 420                reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2);
 421                if (reg & WM8991_RDRO) {
 422                        printk(KERN_WARNING
 423                               "Cannot set as Output Mixer 2 RDRO Set\n");
 424                        ret = -1;
 425                }
 426                break;
 427
 428        case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
 429                reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
 430                if (reg & WM8991_LDSPK) {
 431                        printk(KERN_WARNING
 432                               "Cannot set as Speaker Mixer LDSPK Set\n");
 433                        ret = -1;
 434                }
 435                break;
 436
 437        case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
 438                reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
 439                if (reg & WM8991_RDSPK) {
 440                        printk(KERN_WARNING
 441                               "Cannot set as Speaker Mixer RDSPK Set\n");
 442                        ret = -1;
 443                }
 444                break;
 445        }
 446
 447        return ret;
 448}
 449
 450/* INMIX dB values */
 451static const unsigned int in_mix_tlv[] = {
 452        TLV_DB_RANGE_HEAD(1),
 453        0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
 454};
 455
 456/* Left In PGA Connections */
 457static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
 458        SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
 459        SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
 460};
 461
 462static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
 463        SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
 464        SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
 465};
 466
 467/* Right In PGA Connections */
 468static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
 469        SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
 470        SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
 471};
 472
 473static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
 474        SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
 475        SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
 476};
 477
 478/* INMIXL */
 479static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
 480        SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
 481                WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
 482        SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
 483                7, 0, in_mix_tlv),
 484        SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
 485                1, 0),
 486        SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
 487                1, 0),
 488};
 489
 490/* INMIXR */
 491static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
 492        SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
 493                WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
 494        SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
 495                7, 0, in_mix_tlv),
 496        SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
 497                1, 0),
 498        SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
 499                1, 0),
 500};
 501
 502/* AINLMUX */
 503static const char *wm8991_ainlmux[] =
 504{"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
 505
 506static const struct soc_enum wm8991_ainlmux_enum =
 507        SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
 508                        ARRAY_SIZE(wm8991_ainlmux), wm8991_ainlmux);
 509
 510static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
 511        SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
 512
 513/* DIFFINL */
 514
 515/* AINRMUX */
 516static const char *wm8991_ainrmux[] =
 517{"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
 518
 519static const struct soc_enum wm8991_ainrmux_enum =
 520        SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
 521                        ARRAY_SIZE(wm8991_ainrmux), wm8991_ainrmux);
 522
 523static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
 524        SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
 525
 526/* RXVOICE */
 527static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
 528        SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
 529                WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
 530        SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
 531                WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
 532};
 533
 534/* LOMIX */
 535static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
 536        SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
 537                WM8991_LRBLO_BIT, 1, 0),
 538        SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
 539                WM8991_LLBLO_BIT, 1, 0),
 540        SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
 541                WM8991_LRI3LO_BIT, 1, 0),
 542        SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
 543                WM8991_LLI3LO_BIT, 1, 0),
 544        SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
 545                WM8991_LR12LO_BIT, 1, 0),
 546        SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
 547                WM8991_LL12LO_BIT, 1, 0),
 548        SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
 549                WM8991_LDLO_BIT, 1, 0),
 550};
 551
 552/* ROMIX */
 553static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
 554        SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
 555                WM8991_RLBRO_BIT, 1, 0),
 556        SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
 557                WM8991_RRBRO_BIT, 1, 0),
 558        SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
 559                WM8991_RLI3RO_BIT, 1, 0),
 560        SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
 561                WM8991_RRI3RO_BIT, 1, 0),
 562        SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
 563                WM8991_RL12RO_BIT, 1, 0),
 564        SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
 565                WM8991_RR12RO_BIT, 1, 0),
 566        SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
 567                WM8991_RDRO_BIT, 1, 0),
 568};
 569
 570/* LONMIX */
 571static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
 572        SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
 573                WM8991_LLOPGALON_BIT, 1, 0),
 574        SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
 575                WM8991_LROPGALON_BIT, 1, 0),
 576        SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
 577                WM8991_LOPLON_BIT, 1, 0),
 578};
 579
 580/* LOPMIX */
 581static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
 582        SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
 583                WM8991_LR12LOP_BIT, 1, 0),
 584        SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
 585                WM8991_LL12LOP_BIT, 1, 0),
 586        SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
 587                WM8991_LLOPGALOP_BIT, 1, 0),
 588};
 589
 590/* RONMIX */
 591static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
 592        SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
 593                WM8991_RROPGARON_BIT, 1, 0),
 594        SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
 595                WM8991_RLOPGARON_BIT, 1, 0),
 596        SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
 597                WM8991_ROPRON_BIT, 1, 0),
 598};
 599
 600/* ROPMIX */
 601static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
 602        SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
 603                WM8991_RL12ROP_BIT, 1, 0),
 604        SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
 605                WM8991_RR12ROP_BIT, 1, 0),
 606        SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
 607                WM8991_RROPGAROP_BIT, 1, 0),
 608};
 609
 610/* OUT3MIX */
 611static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
 612        SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
 613                WM8991_LI4O3_BIT, 1, 0),
 614        SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
 615                WM8991_LPGAO3_BIT, 1, 0),
 616};
 617
 618/* OUT4MIX */
 619static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
 620        SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
 621                WM8991_RPGAO4_BIT, 1, 0),
 622        SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
 623                WM8991_RI4O4_BIT, 1, 0),
 624};
 625
 626/* SPKMIX */
 627static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
 628        SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
 629                WM8991_LI2SPK_BIT, 1, 0),
 630        SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
 631                WM8991_LB2SPK_BIT, 1, 0),
 632        SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
 633                WM8991_LOPGASPK_BIT, 1, 0),
 634        SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
 635                WM8991_LDSPK_BIT, 1, 0),
 636        SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
 637                WM8991_RDSPK_BIT, 1, 0),
 638        SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
 639                WM8991_ROPGASPK_BIT, 1, 0),
 640        SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
 641                WM8991_RL12ROP_BIT, 1, 0),
 642        SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
 643                WM8991_RI2SPK_BIT, 1, 0),
 644};
 645
 646static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
 647        /* Input Side */
 648        /* Input Lines */
 649        SND_SOC_DAPM_INPUT("LIN1"),
 650        SND_SOC_DAPM_INPUT("LIN2"),
 651        SND_SOC_DAPM_INPUT("LIN3"),
 652        SND_SOC_DAPM_INPUT("LIN4RXN"),
 653        SND_SOC_DAPM_INPUT("RIN3"),
 654        SND_SOC_DAPM_INPUT("RIN4RXP"),
 655        SND_SOC_DAPM_INPUT("RIN1"),
 656        SND_SOC_DAPM_INPUT("RIN2"),
 657        SND_SOC_DAPM_INPUT("Internal ADC Source"),
 658
 659        /* DACs */
 660        SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
 661                WM8991_ADCL_ENA_BIT, 0),
 662        SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
 663                WM8991_ADCR_ENA_BIT, 0),
 664
 665        /* Input PGAs */
 666        SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
 667                0, &wm8991_dapm_lin12_pga_controls[0],
 668                ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
 669        SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
 670                0, &wm8991_dapm_lin34_pga_controls[0],
 671                ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
 672        SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
 673                0, &wm8991_dapm_rin12_pga_controls[0],
 674                ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
 675        SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
 676                0, &wm8991_dapm_rin34_pga_controls[0],
 677                ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
 678
 679        /* INMIXL */
 680        SND_SOC_DAPM_MIXER_E("INMIXL", WM8991_INTDRIVBITS, WM8991_INMIXL_PWR_BIT, 0,
 681                &wm8991_dapm_inmixl_controls[0],
 682                ARRAY_SIZE(wm8991_dapm_inmixl_controls),
 683                inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 684
 685        /* AINLMUX */
 686        SND_SOC_DAPM_MUX_E("AINLMUX", WM8991_INTDRIVBITS, WM8991_AINLMUX_PWR_BIT, 0,
 687                &wm8991_dapm_ainlmux_controls, inmixer_event,
 688                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 689
 690        /* INMIXR */
 691        SND_SOC_DAPM_MIXER_E("INMIXR", WM8991_INTDRIVBITS, WM8991_INMIXR_PWR_BIT, 0,
 692                &wm8991_dapm_inmixr_controls[0],
 693                ARRAY_SIZE(wm8991_dapm_inmixr_controls),
 694                inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 695
 696        /* AINRMUX */
 697        SND_SOC_DAPM_MUX_E("AINRMUX", WM8991_INTDRIVBITS, WM8991_AINRMUX_PWR_BIT, 0,
 698                &wm8991_dapm_ainrmux_controls, inmixer_event,
 699                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 700
 701        /* Output Side */
 702        /* DACs */
 703        SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
 704                WM8991_DACL_ENA_BIT, 0),
 705        SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
 706                WM8991_DACR_ENA_BIT, 0),
 707
 708        /* LOMIX */
 709        SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
 710                0, &wm8991_dapm_lomix_controls[0],
 711                ARRAY_SIZE(wm8991_dapm_lomix_controls),
 712                outmixer_event, SND_SOC_DAPM_PRE_REG),
 713
 714        /* LONMIX */
 715        SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
 716                &wm8991_dapm_lonmix_controls[0],
 717                ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
 718
 719        /* LOPMIX */
 720        SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
 721                &wm8991_dapm_lopmix_controls[0],
 722                ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
 723
 724        /* OUT3MIX */
 725        SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
 726                &wm8991_dapm_out3mix_controls[0],
 727                ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
 728
 729        /* SPKMIX */
 730        SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
 731                &wm8991_dapm_spkmix_controls[0],
 732                ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
 733                SND_SOC_DAPM_PRE_REG),
 734
 735        /* OUT4MIX */
 736        SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
 737                &wm8991_dapm_out4mix_controls[0],
 738                ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
 739
 740        /* ROPMIX */
 741        SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
 742                &wm8991_dapm_ropmix_controls[0],
 743                ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
 744
 745        /* RONMIX */
 746        SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
 747                &wm8991_dapm_ronmix_controls[0],
 748                ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
 749
 750        /* ROMIX */
 751        SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
 752                0, &wm8991_dapm_romix_controls[0],
 753                ARRAY_SIZE(wm8991_dapm_romix_controls),
 754                outmixer_event, SND_SOC_DAPM_PRE_REG),
 755
 756        /* LOUT PGA */
 757        SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
 758                NULL, 0),
 759
 760        /* ROUT PGA */
 761        SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
 762                NULL, 0),
 763
 764        /* LOPGA */
 765        SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
 766                NULL, 0),
 767
 768        /* ROPGA */
 769        SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
 770                NULL, 0),
 771
 772        /* MICBIAS */
 773        SND_SOC_DAPM_MICBIAS("MICBIAS", WM8991_POWER_MANAGEMENT_1,
 774                WM8991_MICBIAS_ENA_BIT, 0),
 775
 776        SND_SOC_DAPM_OUTPUT("LON"),
 777        SND_SOC_DAPM_OUTPUT("LOP"),
 778        SND_SOC_DAPM_OUTPUT("OUT3"),
 779        SND_SOC_DAPM_OUTPUT("LOUT"),
 780        SND_SOC_DAPM_OUTPUT("SPKN"),
 781        SND_SOC_DAPM_OUTPUT("SPKP"),
 782        SND_SOC_DAPM_OUTPUT("ROUT"),
 783        SND_SOC_DAPM_OUTPUT("OUT4"),
 784        SND_SOC_DAPM_OUTPUT("ROP"),
 785        SND_SOC_DAPM_OUTPUT("RON"),
 786        SND_SOC_DAPM_OUTPUT("OUT"),
 787
 788        SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
 789};
 790
 791static const struct snd_soc_dapm_route audio_map[] = {
 792        /* Make DACs turn on when playing even if not mixed into any outputs */
 793        {"Internal DAC Sink", NULL, "Left DAC"},
 794        {"Internal DAC Sink", NULL, "Right DAC"},
 795
 796        /* Make ADCs turn on when recording even if not mixed from any inputs */
 797        {"Left ADC", NULL, "Internal ADC Source"},
 798        {"Right ADC", NULL, "Internal ADC Source"},
 799
 800        /* Input Side */
 801        /* LIN12 PGA */
 802        {"LIN12 PGA", "LIN1 Switch", "LIN1"},
 803        {"LIN12 PGA", "LIN2 Switch", "LIN2"},
 804        /* LIN34 PGA */
 805        {"LIN34 PGA", "LIN3 Switch", "LIN3"},
 806        {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
 807        /* INMIXL */
 808        {"INMIXL", "Record Left Volume", "LOMIX"},
 809        {"INMIXL", "LIN2 Volume", "LIN2"},
 810        {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
 811        {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
 812        /* AINLMUX */
 813        {"AINLMUX", "INMIXL Mix", "INMIXL"},
 814        {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
 815        {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
 816        {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
 817        {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
 818        /* ADC */
 819        {"Left ADC", NULL, "AINLMUX"},
 820
 821        /* RIN12 PGA */
 822        {"RIN12 PGA", "RIN1 Switch", "RIN1"},
 823        {"RIN12 PGA", "RIN2 Switch", "RIN2"},
 824        /* RIN34 PGA */
 825        {"RIN34 PGA", "RIN3 Switch", "RIN3"},
 826        {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
 827        /* INMIXL */
 828        {"INMIXR", "Record Right Volume", "ROMIX"},
 829        {"INMIXR", "RIN2 Volume", "RIN2"},
 830        {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
 831        {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
 832        /* AINRMUX */
 833        {"AINRMUX", "INMIXR Mix", "INMIXR"},
 834        {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
 835        {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
 836        {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
 837        {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
 838        /* ADC */
 839        {"Right ADC", NULL, "AINRMUX"},
 840
 841        /* LOMIX */
 842        {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
 843        {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
 844        {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
 845        {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
 846        {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
 847        {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
 848        {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
 849
 850        /* ROMIX */
 851        {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
 852        {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
 853        {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
 854        {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
 855        {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
 856        {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
 857        {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
 858
 859        /* SPKMIX */
 860        {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
 861        {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
 862        {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
 863        {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
 864        {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
 865        {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
 866        {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
 867        {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
 868
 869        /* LONMIX */
 870        {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
 871        {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
 872        {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
 873
 874        /* LOPMIX */
 875        {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
 876        {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
 877        {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
 878
 879        /* OUT3MIX */
 880        {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
 881        {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
 882
 883        /* OUT4MIX */
 884        {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
 885        {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
 886
 887        /* RONMIX */
 888        {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
 889        {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
 890        {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
 891
 892        /* ROPMIX */
 893        {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
 894        {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
 895        {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
 896
 897        /* Out Mixer PGAs */
 898        {"LOPGA", NULL, "LOMIX"},
 899        {"ROPGA", NULL, "ROMIX"},
 900
 901        {"LOUT PGA", NULL, "LOMIX"},
 902        {"ROUT PGA", NULL, "ROMIX"},
 903
 904        /* Output Pins */
 905        {"LON", NULL, "LONMIX"},
 906        {"LOP", NULL, "LOPMIX"},
 907        {"OUT", NULL, "OUT3MIX"},
 908        {"LOUT", NULL, "LOUT PGA"},
 909        {"SPKN", NULL, "SPKMIX"},
 910        {"ROUT", NULL, "ROUT PGA"},
 911        {"OUT4", NULL, "OUT4MIX"},
 912        {"ROP", NULL, "ROPMIX"},
 913        {"RON", NULL, "RONMIX"},
 914};
 915
 916/* PLL divisors */
 917struct _pll_div {
 918        u32 div2;
 919        u32 n;
 920        u32 k;
 921};
 922
 923/* The size in bits of the pll divide multiplied by 10
 924 * to allow rounding later */
 925#define FIXED_PLL_SIZE ((1 << 16) * 10)
 926
 927static void pll_factors(struct _pll_div *pll_div, unsigned int target,
 928                        unsigned int source)
 929{
 930        u64 Kpart;
 931        unsigned int K, Ndiv, Nmod;
 932
 933
 934        Ndiv = target / source;
 935        if (Ndiv < 6) {
 936                source >>= 1;
 937                pll_div->div2 = 1;
 938                Ndiv = target / source;
 939        } else
 940                pll_div->div2 = 0;
 941
 942        if ((Ndiv < 6) || (Ndiv > 12))
 943                printk(KERN_WARNING
 944                       "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
 945
 946        pll_div->n = Ndiv;
 947        Nmod = target % source;
 948        Kpart = FIXED_PLL_SIZE * (long long)Nmod;
 949
 950        do_div(Kpart, source);
 951
 952        K = Kpart & 0xFFFFFFFF;
 953
 954        /* Check if we need to round */
 955        if ((K % 10) >= 5)
 956                K += 5;
 957
 958        /* Move down to proper range now rounding is done */
 959        K /= 10;
 960
 961        pll_div->k = K;
 962}
 963
 964static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
 965                              int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
 966{
 967        u16 reg;
 968        struct snd_soc_codec *codec = codec_dai->codec;
 969        struct _pll_div pll_div;
 970
 971        if (freq_in && freq_out) {
 972                pll_factors(&pll_div, freq_out * 4, freq_in);
 973
 974                /* Turn on PLL */
 975                reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
 976                reg |= WM8991_PLL_ENA;
 977                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
 978
 979                /* sysclk comes from PLL */
 980                reg = snd_soc_read(codec, WM8991_CLOCKING_2);
 981                snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
 982
 983                /* set up N , fractional mode and pre-divisor if necessary */
 984                snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
 985                              (pll_div.div2 ? WM8991_PRESCALE : 0));
 986                snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
 987                snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
 988        } else {
 989                /* Turn on PLL */
 990                reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
 991                reg &= ~WM8991_PLL_ENA;
 992                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
 993        }
 994        return 0;
 995}
 996
 997/*
 998 * Set's ADC and Voice DAC format.
 999 */
1000static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
1001                              unsigned int fmt)
1002{
1003        struct snd_soc_codec *codec = codec_dai->codec;
1004        u16 audio1, audio3;
1005
1006        audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1007        audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
1008
1009        /* set master/slave audio interface */
1010        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1011        case SND_SOC_DAIFMT_CBS_CFS:
1012                audio3 &= ~WM8991_AIF_MSTR1;
1013                break;
1014        case SND_SOC_DAIFMT_CBM_CFM:
1015                audio3 |= WM8991_AIF_MSTR1;
1016                break;
1017        default:
1018                return -EINVAL;
1019        }
1020
1021        audio1 &= ~WM8991_AIF_FMT_MASK;
1022
1023        /* interface format */
1024        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1025        case SND_SOC_DAIFMT_I2S:
1026                audio1 |= WM8991_AIF_TMF_I2S;
1027                audio1 &= ~WM8991_AIF_LRCLK_INV;
1028                break;
1029        case SND_SOC_DAIFMT_RIGHT_J:
1030                audio1 |= WM8991_AIF_TMF_RIGHTJ;
1031                audio1 &= ~WM8991_AIF_LRCLK_INV;
1032                break;
1033        case SND_SOC_DAIFMT_LEFT_J:
1034                audio1 |= WM8991_AIF_TMF_LEFTJ;
1035                audio1 &= ~WM8991_AIF_LRCLK_INV;
1036                break;
1037        case SND_SOC_DAIFMT_DSP_A:
1038                audio1 |= WM8991_AIF_TMF_DSP;
1039                audio1 &= ~WM8991_AIF_LRCLK_INV;
1040                break;
1041        case SND_SOC_DAIFMT_DSP_B:
1042                audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1043                break;
1044        default:
1045                return -EINVAL;
1046        }
1047
1048        snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1049        snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1050        return 0;
1051}
1052
1053static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1054                                 int div_id, int div)
1055{
1056        struct snd_soc_codec *codec = codec_dai->codec;
1057        u16 reg;
1058
1059        switch (div_id) {
1060        case WM8991_MCLK_DIV:
1061                reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1062                      ~WM8991_MCLK_DIV_MASK;
1063                snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1064                break;
1065        case WM8991_DACCLK_DIV:
1066                reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1067                      ~WM8991_DAC_CLKDIV_MASK;
1068                snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1069                break;
1070        case WM8991_ADCCLK_DIV:
1071                reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1072                      ~WM8991_ADC_CLKDIV_MASK;
1073                snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1074                break;
1075        case WM8991_BCLK_DIV:
1076                reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1077                      ~WM8991_BCLK_DIV_MASK;
1078                snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1079                break;
1080        default:
1081                return -EINVAL;
1082        }
1083
1084        return 0;
1085}
1086
1087/*
1088 * Set PCM DAI bit size and sample rate.
1089 */
1090static int wm8991_hw_params(struct snd_pcm_substream *substream,
1091                            struct snd_pcm_hw_params *params,
1092                            struct snd_soc_dai *dai)
1093{
1094        struct snd_soc_codec *codec = dai->codec;
1095        u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1096
1097        audio1 &= ~WM8991_AIF_WL_MASK;
1098        /* bit size */
1099        switch (params_format(params)) {
1100        case SNDRV_PCM_FORMAT_S16_LE:
1101                break;
1102        case SNDRV_PCM_FORMAT_S20_3LE:
1103                audio1 |= WM8991_AIF_WL_20BITS;
1104                break;
1105        case SNDRV_PCM_FORMAT_S24_LE:
1106                audio1 |= WM8991_AIF_WL_24BITS;
1107                break;
1108        case SNDRV_PCM_FORMAT_S32_LE:
1109                audio1 |= WM8991_AIF_WL_32BITS;
1110                break;
1111        }
1112
1113        snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1114        return 0;
1115}
1116
1117static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1118{
1119        struct snd_soc_codec *codec = dai->codec;
1120        u16 val;
1121
1122        val  = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1123        if (mute)
1124                snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1125        else
1126                snd_soc_write(codec, WM8991_DAC_CTRL, val);
1127        return 0;
1128}
1129
1130static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1131                                 enum snd_soc_bias_level level)
1132{
1133        u16 val;
1134
1135        switch (level) {
1136        case SND_SOC_BIAS_ON:
1137                break;
1138
1139        case SND_SOC_BIAS_PREPARE:
1140                /* VMID=2*50k */
1141                val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1142                      ~WM8991_VMID_MODE_MASK;
1143                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1144                break;
1145
1146        case SND_SOC_BIAS_STANDBY:
1147                if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1148                        snd_soc_cache_sync(codec);
1149                        /* Enable all output discharge bits */
1150                        snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1151                                      WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1152                                      WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1153                                      WM8991_DIS_ROUT);
1154
1155                        /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1156                        snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1157                                      WM8991_BUFDCOPEN | WM8991_POBCTRL |
1158                                      WM8991_VMIDTOG);
1159
1160                        /* Delay to allow output caps to discharge */
1161                        msleep(300);
1162
1163                        /* Disable VMIDTOG */
1164                        snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1165                                      WM8991_BUFDCOPEN | WM8991_POBCTRL);
1166
1167                        /* disable all output discharge bits */
1168                        snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1169
1170                        /* Enable outputs */
1171                        snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1172
1173                        msleep(50);
1174
1175                        /* Enable VMID at 2x50k */
1176                        snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1177
1178                        msleep(100);
1179
1180                        /* Enable VREF */
1181                        snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1182
1183                        msleep(600);
1184
1185                        /* Enable BUFIOEN */
1186                        snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1187                                      WM8991_BUFDCOPEN | WM8991_POBCTRL |
1188                                      WM8991_BUFIOEN);
1189
1190                        /* Disable outputs */
1191                        snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1192
1193                        /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1194                        snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1195                }
1196
1197                /* VMID=2*250k */
1198                val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1199                      ~WM8991_VMID_MODE_MASK;
1200                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1201                break;
1202
1203        case SND_SOC_BIAS_OFF:
1204                /* Enable POBCTRL and SOFT_ST */
1205                snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1206                              WM8991_POBCTRL | WM8991_BUFIOEN);
1207
1208                /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1209                snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1210                              WM8991_BUFDCOPEN | WM8991_POBCTRL |
1211                              WM8991_BUFIOEN);
1212
1213                /* mute DAC */
1214                val = snd_soc_read(codec, WM8991_DAC_CTRL);
1215                snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1216
1217                /* Enable any disabled outputs */
1218                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1219
1220                /* Disable VMID */
1221                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1222
1223                msleep(300);
1224
1225                /* Enable all output discharge bits */
1226                snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1227                              WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1228                              WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1229                              WM8991_DIS_ROUT);
1230
1231                /* Disable VREF */
1232                snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1233
1234                /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1235                snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
1236                codec->cache_sync = 1;
1237                break;
1238        }
1239
1240        codec->dapm.bias_level = level;
1241        return 0;
1242}
1243
1244static int wm8991_suspend(struct snd_soc_codec *codec, pm_message_t state)
1245{
1246        wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1247        return 0;
1248}
1249
1250static int wm8991_resume(struct snd_soc_codec *codec)
1251{
1252        wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1253        return 0;
1254}
1255
1256/* power down chip */
1257static int wm8991_remove(struct snd_soc_codec *codec)
1258{
1259        wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1260        return 0;
1261}
1262
1263static int wm8991_probe(struct snd_soc_codec *codec)
1264{
1265        struct wm8991_priv *wm8991;
1266        int ret;
1267        unsigned int reg;
1268
1269        wm8991 = snd_soc_codec_get_drvdata(codec);
1270
1271        ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type);
1272        if (ret < 0) {
1273                dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1274                return ret;
1275        }
1276
1277        ret = wm8991_reset(codec);
1278        if (ret < 0) {
1279                dev_err(codec->dev, "Failed to issue reset\n");
1280                return ret;
1281        }
1282
1283        wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1284
1285        reg = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_4);
1286        snd_soc_write(codec, WM8991_AUDIO_INTERFACE_4, reg | WM8991_ALRCGPIO1);
1287
1288        reg = snd_soc_read(codec, WM8991_GPIO1_GPIO2) &
1289              ~WM8991_GPIO1_SEL_MASK;
1290        snd_soc_write(codec, WM8991_GPIO1_GPIO2, reg | 1);
1291
1292        reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1);
1293        snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, reg | WM8991_VREF_ENA|
1294                      WM8991_VMID_MODE_MASK);
1295
1296        reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
1297        snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg | WM8991_OPCLK_ENA);
1298
1299        snd_soc_write(codec, WM8991_DAC_CTRL, 0);
1300        snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
1301        snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
1302
1303        snd_soc_add_controls(codec, wm8991_snd_controls,
1304                             ARRAY_SIZE(wm8991_snd_controls));
1305
1306        snd_soc_dapm_new_controls(&codec->dapm, wm8991_dapm_widgets,
1307                                  ARRAY_SIZE(wm8991_dapm_widgets));
1308        snd_soc_dapm_add_routes(&codec->dapm, audio_map,
1309                                ARRAY_SIZE(audio_map));
1310        return 0;
1311}
1312
1313#define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1314                        SNDRV_PCM_FMTBIT_S24_LE)
1315
1316static struct snd_soc_dai_ops wm8991_ops = {
1317        .hw_params = wm8991_hw_params,
1318        .digital_mute = wm8991_mute,
1319        .set_fmt = wm8991_set_dai_fmt,
1320        .set_clkdiv = wm8991_set_dai_clkdiv,
1321        .set_pll = wm8991_set_dai_pll
1322};
1323
1324/*
1325 * The WM8991 supports 2 different and mutually exclusive DAI
1326 * configurations.
1327 *
1328 * 1. ADC/DAC on Primary Interface
1329 * 2. ADC on Primary Interface/DAC on secondary
1330 */
1331static struct snd_soc_dai_driver wm8991_dai = {
1332        /* ADC/DAC on primary */
1333        .name = "wm8991",
1334        .id = 1,
1335        .playback = {
1336                .stream_name = "Playback",
1337                .channels_min = 1,
1338                .channels_max = 2,
1339                .rates = SNDRV_PCM_RATE_8000_96000,
1340                .formats = WM8991_FORMATS
1341        },
1342        .capture = {
1343                .stream_name = "Capture",
1344                .channels_min = 1,
1345                .channels_max = 2,
1346                .rates = SNDRV_PCM_RATE_8000_96000,
1347                .formats = WM8991_FORMATS
1348        },
1349        .ops = &wm8991_ops
1350};
1351
1352static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1353        .probe = wm8991_probe,
1354        .remove = wm8991_remove,
1355        .suspend = wm8991_suspend,
1356        .resume = wm8991_resume,
1357        .set_bias_level = wm8991_set_bias_level,
1358        .reg_cache_size = WM8991_MAX_REGISTER + 1,
1359        .reg_word_size = sizeof(u16),
1360        .reg_cache_default = wm8991_reg_defs
1361};
1362
1363static __devinit int wm8991_i2c_probe(struct i2c_client *i2c,
1364                                      const struct i2c_device_id *id)
1365{
1366        struct wm8991_priv *wm8991;
1367        int ret;
1368
1369        wm8991 = kzalloc(sizeof *wm8991, GFP_KERNEL);
1370        if (!wm8991)
1371                return -ENOMEM;
1372
1373        wm8991->control_type = SND_SOC_I2C;
1374        i2c_set_clientdata(i2c, wm8991);
1375
1376        ret = snd_soc_register_codec(&i2c->dev,
1377                                     &soc_codec_dev_wm8991, &wm8991_dai, 1);
1378        if (ret < 0)
1379                kfree(wm8991);
1380        return ret;
1381}
1382
1383static __devexit int wm8991_i2c_remove(struct i2c_client *client)
1384{
1385        snd_soc_unregister_codec(&client->dev);
1386        kfree(i2c_get_clientdata(client));
1387        return 0;
1388}
1389
1390static const struct i2c_device_id wm8991_i2c_id[] = {
1391        { "wm8991", 0 },
1392        { }
1393};
1394MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1395
1396static struct i2c_driver wm8991_i2c_driver = {
1397        .driver = {
1398                .name = "wm8991",
1399                .owner = THIS_MODULE,
1400        },
1401        .probe = wm8991_i2c_probe,
1402        .remove = __devexit_p(wm8991_i2c_remove),
1403        .id_table = wm8991_i2c_id,
1404};
1405
1406static int __init wm8991_modinit(void)
1407{
1408        int ret;
1409        ret = i2c_add_driver(&wm8991_i2c_driver);
1410        if (ret != 0) {
1411                printk(KERN_ERR "Failed to register WM8991 I2C driver: %d\n",
1412                       ret);
1413        }
1414        return 0;
1415}
1416module_init(wm8991_modinit);
1417
1418static void __exit wm8991_exit(void)
1419{
1420        i2c_del_driver(&wm8991_i2c_driver);
1421}
1422module_exit(wm8991_exit);
1423
1424MODULE_DESCRIPTION("ASoC WM8991 driver");
1425MODULE_AUTHOR("Graeme Gregory");
1426MODULE_LICENSE("GPL");
1427