LXR linux/arch/alpha/kernel/head.S

   1/*
   2 * arch/alpha/kernel/head.S
   3 *
   4 * initial boot stuff.. At this point, the bootloader has already
   5 * switched into OSF/1 PAL-code, and loaded us at the correct address
   6 * (START_ADDR).  So there isn't much left for us to do: just set up
   7 * the kernel global pointer and jump to the kernel entry-point.
   8 */
   9
  10#include <linux/init.h>
  11#include <asm/asm-offsets.h>
  12#include <asm/pal.h>
  13#include <asm/setup.h>
  14
  15__HEAD
  16.globl _stext
  17        .set noreorder
  18        .globl  __start
  19        .ent    __start
  20_stext:
  21__start:
  22        .prologue 0
  23        br      $27,1f
  241:      ldgp    $29,0($27)
  25        /* We need to get current_task_info loaded up...  */
  26        lda     $8,init_thread_union
  27        /* ... and find our stack ... */
  28        lda     $30,0x4000 - SIZEOF_PT_REGS($8)
  29        /* ... and then we can start the kernel.  */
  30        jsr     $26,start_kernel
  31        call_pal PAL_halt
  32        .end __start
  33
  34#ifdef CONFIG_SMP
  35        .align 3
  36        .globl  __smp_callin
  37        .ent    __smp_callin
  38        /* On entry here from SRM console, the HWPCB of the per-cpu
  39           slot for this processor has been loaded.  We've arranged
  40           for the UNIQUE value for this process to contain the PCBB
  41           of the target idle task.  */
  42__smp_callin:
  43        .prologue 1
  44        ldgp    $29,0($27)      # First order of business, load the GP.
  45
  46        call_pal PAL_rduniq     # Grab the target PCBB.
  47        mov     $0,$16          # Install it.
  48        call_pal PAL_swpctx
  49
  50        lda     $8,0x3fff       # Find "current".
  51        bic     $30,$8,$8
  52        
  53        jsr     $26,smp_callin
  54        call_pal PAL_halt
  55        .end __smp_callin
  56#endif /* CONFIG_SMP */
  57
  58        #
  59        # The following two functions are needed for supporting SRM PALcode
  60        # on the PC164 (at least), since that PALcode manages the interrupt
  61        # masking, and we cannot duplicate the effort without causing problems
  62        #
  63
  64        .align 3
  65        .globl  cserve_ena
  66        .ent    cserve_ena
  67cserve_ena:
  68        .prologue 0
  69        bis     $16,$16,$17
  70        lda     $16,52($31)
  71        call_pal PAL_cserve
  72        ret     ($26)
  73        .end    cserve_ena
  74
  75        .align 3
  76        .globl  cserve_dis
  77        .ent    cserve_dis
  78cserve_dis:
  79        .prologue 0
  80        bis     $16,$16,$17
  81        lda     $16,53($31)
  82        call_pal PAL_cserve
  83        ret     ($26)
  84        .end    cserve_dis
  85
  86        #
  87        # It is handy, on occasion, to make halt actually just loop. 
  88        # Putting it here means we dont have to recompile the whole
  89        # kernel.
  90        #
  91
  92        .align 3
  93        .globl  halt
  94        .ent    halt
  95halt:
  96        .prologue 0
  97        call_pal PAL_halt
  98        .end    halt
  99