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12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/spi/spi.h>
19
20#include <linux/platform_data/omap-wd-timer.h>
21
22#include <asm/mach/map.h>
23
24#include <mach/tc.h>
25#include <mach/mux.h>
26
27#include <mach/omap7xx.h>
28#include <mach/camera.h>
29#include <mach/hardware.h>
30
31#include "common.h"
32#include "clock.h"
33#include "dma.h"
34#include "mmc.h"
35#include "sram.h"
36
37#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
38
39static struct platform_device omap_pcm = {
40 .name = "omap-pcm-audio",
41 .id = -1,
42};
43
44static void omap_init_audio(void)
45{
46 platform_device_register(&omap_pcm);
47}
48
49#else
50static inline void omap_init_audio(void) {}
51#endif
52
53
54
55#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
56
57#define OMAP_RTC_BASE 0xfffb4800
58
59static struct resource rtc_resources[] = {
60 {
61 .start = OMAP_RTC_BASE,
62 .end = OMAP_RTC_BASE + 0x5f,
63 .flags = IORESOURCE_MEM,
64 },
65 {
66 .start = INT_RTC_TIMER,
67 .flags = IORESOURCE_IRQ,
68 },
69 {
70 .start = INT_RTC_ALARM,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static struct platform_device omap_rtc_device = {
76 .name = "omap_rtc",
77 .id = -1,
78 .num_resources = ARRAY_SIZE(rtc_resources),
79 .resource = rtc_resources,
80};
81
82static void omap_init_rtc(void)
83{
84 (void) platform_device_register(&omap_rtc_device);
85}
86#else
87static inline void omap_init_rtc(void) {}
88#endif
89
90static inline void omap_init_mbox(void) { }
91
92
93
94#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
95
96static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
97 int controller_nr)
98{
99 if (controller_nr == 0) {
100 if (cpu_is_omap7xx()) {
101 omap_cfg_reg(MMC_7XX_CMD);
102 omap_cfg_reg(MMC_7XX_CLK);
103 omap_cfg_reg(MMC_7XX_DAT0);
104 } else {
105 omap_cfg_reg(MMC_CMD);
106 omap_cfg_reg(MMC_CLK);
107 omap_cfg_reg(MMC_DAT0);
108 }
109
110 if (cpu_is_omap1710()) {
111 omap_cfg_reg(M15_1710_MMC_CLKI);
112 omap_cfg_reg(P19_1710_MMC_CMDDIR);
113 omap_cfg_reg(P20_1710_MMC_DATDIR0);
114 }
115 if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
116 omap_cfg_reg(MMC_DAT1);
117
118 if (!mmc_controller->slots[0].nomux)
119 omap_cfg_reg(MMC_DAT2);
120 omap_cfg_reg(MMC_DAT3);
121 }
122 }
123
124
125 if (cpu_is_omap16xx() && controller_nr == 1) {
126 if (!mmc_controller->slots[1].nomux) {
127 omap_cfg_reg(Y8_1610_MMC2_CMD);
128 omap_cfg_reg(Y10_1610_MMC2_CLK);
129 omap_cfg_reg(R18_1610_MMC2_CLKIN);
130 omap_cfg_reg(W8_1610_MMC2_DAT0);
131 if (mmc_controller->slots[1].wires == 4) {
132 omap_cfg_reg(V8_1610_MMC2_DAT1);
133 omap_cfg_reg(W15_1610_MMC2_DAT2);
134 omap_cfg_reg(R10_1610_MMC2_DAT3);
135 }
136
137
138 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
139 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
140 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
141 }
142
143
144 if (cpu_is_omap1710())
145 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
146 MOD_CONF_CTRL_1);
147 }
148}
149
150#define OMAP_MMC_NR_RES 4
151
152
153
154
155static int __init omap_mmc_add(const char *name, int id, unsigned long base,
156 unsigned long size, unsigned int irq,
157 unsigned rx_req, unsigned tx_req,
158 struct omap_mmc_platform_data *data)
159{
160 struct platform_device *pdev;
161 struct resource res[OMAP_MMC_NR_RES];
162 int ret;
163
164 pdev = platform_device_alloc(name, id);
165 if (!pdev)
166 return -ENOMEM;
167
168 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
169 res[0].start = base;
170 res[0].end = base + size - 1;
171 res[0].flags = IORESOURCE_MEM;
172 res[1].start = res[1].end = irq;
173 res[1].flags = IORESOURCE_IRQ;
174 res[2].start = rx_req;
175 res[2].name = "rx";
176 res[2].flags = IORESOURCE_DMA;
177 res[3].start = tx_req;
178 res[3].name = "tx";
179 res[3].flags = IORESOURCE_DMA;
180
181 if (cpu_is_omap7xx())
182 data->slots[0].features = MMC_OMAP7XX;
183 if (cpu_is_omap15xx())
184 data->slots[0].features = MMC_OMAP15XX;
185 if (cpu_is_omap16xx())
186 data->slots[0].features = MMC_OMAP16XX;
187
188 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
189 if (ret == 0)
190 ret = platform_device_add_data(pdev, data, sizeof(*data));
191 if (ret)
192 goto fail;
193
194 ret = platform_device_add(pdev);
195 if (ret)
196 goto fail;
197
198
199 data->dev = &pdev->dev;
200 return 0;
201
202fail:
203 platform_device_put(pdev);
204 return ret;
205}
206
207void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
208 int nr_controllers)
209{
210 int i;
211
212 for (i = 0; i < nr_controllers; i++) {
213 unsigned long base, size;
214 unsigned rx_req, tx_req;
215 unsigned int irq = 0;
216
217 if (!mmc_data[i])
218 continue;
219
220 omap1_mmc_mux(mmc_data[i], i);
221
222 switch (i) {
223 case 0:
224 base = OMAP1_MMC1_BASE;
225 irq = INT_MMC;
226 rx_req = OMAP_DMA_MMC_RX;
227 tx_req = OMAP_DMA_MMC_TX;
228 break;
229 case 1:
230 if (!cpu_is_omap16xx())
231 return;
232 base = OMAP1_MMC2_BASE;
233 irq = INT_1610_MMC2;
234 rx_req = OMAP_DMA_MMC2_RX;
235 tx_req = OMAP_DMA_MMC2_TX;
236 break;
237 default:
238 continue;
239 }
240 size = OMAP1_MMC_SIZE;
241
242 omap_mmc_add("mmci-omap", i, base, size, irq,
243 rx_req, tx_req, mmc_data[i]);
244 }
245}
246
247#endif
248
249
250
251
252#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)
253
254struct platform_device omap_spi1 = {
255 .name = "omap1_spi100k",
256 .id = 1,
257};
258
259struct platform_device omap_spi2 = {
260 .name = "omap1_spi100k",
261 .id = 2,
262};
263
264static void omap_init_spi100k(void)
265{
266 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
267 if (omap_spi1.dev.platform_data)
268 platform_device_register(&omap_spi1);
269
270 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
271 if (omap_spi2.dev.platform_data)
272 platform_device_register(&omap_spi2);
273}
274
275#else
276static inline void omap_init_spi100k(void)
277{
278}
279#endif
280
281
282#define OMAP1_CAMERA_BASE 0xfffb6800
283#define OMAP1_CAMERA_IOSIZE 0x1c
284
285static struct resource omap1_camera_resources[] = {
286 [0] = {
287 .start = OMAP1_CAMERA_BASE,
288 .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
289 .flags = IORESOURCE_MEM,
290 },
291 [1] = {
292 .start = INT_CAMERA,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
298
299static struct platform_device omap1_camera_device = {
300 .name = "omap1-camera",
301 .id = 0,
302 .dev = {
303 .dma_mask = &omap1_camera_dma_mask,
304 .coherent_dma_mask = DMA_BIT_MASK(32),
305 },
306 .num_resources = ARRAY_SIZE(omap1_camera_resources),
307 .resource = omap1_camera_resources,
308};
309
310void __init omap1_camera_init(void *info)
311{
312 struct platform_device *dev = &omap1_camera_device;
313 int ret;
314
315 dev->dev.platform_data = info;
316
317 ret = platform_device_register(dev);
318 if (ret)
319 dev_err(&dev->dev, "unable to register device: %d\n", ret);
320}
321
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324
325static inline void omap_init_sti(void) {}
326
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333
334#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
335
336#define OMAP_UWIRE_BASE 0xfffb3000
337
338static struct resource uwire_resources[] = {
339 {
340 .start = OMAP_UWIRE_BASE,
341 .end = OMAP_UWIRE_BASE + 0x20,
342 .flags = IORESOURCE_MEM,
343 },
344};
345
346static struct platform_device omap_uwire_device = {
347 .name = "omap_uwire",
348 .id = -1,
349 .num_resources = ARRAY_SIZE(uwire_resources),
350 .resource = uwire_resources,
351};
352
353static void omap_init_uwire(void)
354{
355
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363 (void) platform_device_register(&omap_uwire_device);
364}
365#else
366static inline void omap_init_uwire(void) {}
367#endif
368
369
370#define OMAP1_RNG_BASE 0xfffe5000
371
372static struct resource omap1_rng_resources[] = {
373 {
374 .start = OMAP1_RNG_BASE,
375 .end = OMAP1_RNG_BASE + 0x4f,
376 .flags = IORESOURCE_MEM,
377 },
378};
379
380static struct platform_device omap1_rng_device = {
381 .name = "omap_rng",
382 .id = -1,
383 .num_resources = ARRAY_SIZE(omap1_rng_resources),
384 .resource = omap1_rng_resources,
385};
386
387static void omap1_init_rng(void)
388{
389 if (!cpu_is_omap16xx())
390 return;
391
392 (void) platform_device_register(&omap1_rng_device);
393}
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417static int __init omap1_init_devices(void)
418{
419 if (!cpu_class_is_omap1())
420 return -ENODEV;
421
422 omap_sram_init();
423 omap1_clk_late_init();
424
425
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428
429 omap_init_audio();
430 omap_init_mbox();
431 omap_init_rtc();
432 omap_init_spi100k();
433 omap_init_sti();
434 omap_init_uwire();
435 omap1_init_rng();
436
437 return 0;
438}
439arch_initcall(omap1_init_devices);
440
441#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
442
443static struct resource wdt_resources[] = {
444 {
445 .start = 0xfffeb000,
446 .end = 0xfffeb07F,
447 .flags = IORESOURCE_MEM,
448 },
449};
450
451static struct platform_device omap_wdt_device = {
452 .name = "omap_wdt",
453 .id = -1,
454 .num_resources = ARRAY_SIZE(wdt_resources),
455 .resource = wdt_resources,
456};
457
458static int __init omap_init_wdt(void)
459{
460 struct omap_wd_timer_platform_data pdata;
461 int ret;
462
463 if (!cpu_is_omap16xx())
464 return -ENODEV;
465
466 pdata.read_reset_sources = omap1_get_reset_sources;
467
468 ret = platform_device_register(&omap_wdt_device);
469 if (!ret) {
470 ret = platform_device_add_data(&omap_wdt_device, &pdata,
471 sizeof(pdata));
472 if (ret)
473 platform_device_del(&omap_wdt_device);
474 }
475
476 return ret;
477}
478subsys_initcall(omap_init_wdt);
479#endif
480