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19#include <linux/types.h>
20#include <linux/gpio.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/device.h>
24#include <linux/errno.h>
25#include <linux/io.h>
26
27#include <asm/irq.h>
28#include <asm/mach/irq.h>
29
30#include <mach/hardware.h>
31
32#include "iomap.h"
33#include "common.h"
34#include "fpga.h"
35
36static void fpga_mask_irq(struct irq_data *d)
37{
38 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
39
40 if (irq < 8)
41 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
42 & ~(1 << irq)), OMAP1510_FPGA_IMR_LO);
43 else if (irq < 16)
44 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
45 & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
46 else
47 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
48 & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
49}
50
51
52static inline u32 get_fpga_unmasked_irqs(void)
53{
54 return
55 ((__raw_readb(OMAP1510_FPGA_ISR_LO) &
56 __raw_readb(OMAP1510_FPGA_IMR_LO))) |
57 ((__raw_readb(OMAP1510_FPGA_ISR_HI) &
58 __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) |
59 ((__raw_readb(INNOVATOR_FPGA_ISR2) &
60 __raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
61}
62
63
64static void fpga_ack_irq(struct irq_data *d)
65{
66
67}
68
69static void fpga_unmask_irq(struct irq_data *d)
70{
71 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
72
73 if (irq < 8)
74 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
75 OMAP1510_FPGA_IMR_LO);
76 else if (irq < 16)
77 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
78 | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
79 else
80 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
81 | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
82}
83
84static void fpga_mask_ack_irq(struct irq_data *d)
85{
86 fpga_mask_irq(d);
87 fpga_ack_irq(d);
88}
89
90static void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
91{
92 u32 stat;
93 int fpga_irq;
94
95 stat = get_fpga_unmasked_irqs();
96
97 if (!stat)
98 return;
99
100 for (fpga_irq = OMAP_FPGA_IRQ_BASE;
101 (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
102 fpga_irq++, stat >>= 1) {
103 if (stat & 1) {
104 generic_handle_irq(fpga_irq);
105 }
106 }
107}
108
109static struct irq_chip omap_fpga_irq_ack = {
110 .name = "FPGA-ack",
111 .irq_ack = fpga_mask_ack_irq,
112 .irq_mask = fpga_mask_irq,
113 .irq_unmask = fpga_unmask_irq,
114};
115
116
117static struct irq_chip omap_fpga_irq = {
118 .name = "FPGA",
119 .irq_ack = fpga_ack_irq,
120 .irq_mask = fpga_mask_irq,
121 .irq_unmask = fpga_unmask_irq,
122};
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147void omap1510_fpga_init_irq(void)
148{
149 int i, res;
150
151 __raw_writeb(0, OMAP1510_FPGA_IMR_LO);
152 __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
153 __raw_writeb(0, INNOVATOR_FPGA_IMR2);
154
155 for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
156
157 if (i == OMAP1510_INT_FPGA_TS) {
158
159
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161
162 irq_set_chip(i, &omap_fpga_irq_ack);
163 }
164 else {
165
166
167
168
169 irq_set_chip(i, &omap_fpga_irq);
170 }
171
172 irq_set_handler(i, handle_edge_irq);
173 set_irq_flags(i, IRQF_VALID);
174 }
175
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182
183 res = gpio_request(13, "FPGA irq");
184 if (res) {
185 pr_err("%s failed to get gpio\n", __func__);
186 return;
187 }
188 gpio_direction_input(13);
189 irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
190 irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
191}
192