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23#include <linux/init.h>
24#include <linux/suspend.h>
25#include <linux/errno.h>
26#include <linux/time.h>
27#include <linux/device.h>
28#include <linux/syscore_ops.h>
29#include <linux/gpio.h>
30#include <linux/io.h>
31
32#include <asm/mach-types.h>
33
34#include <mach/hardware.h>
35#include <mach/regs-gpio.h>
36
37#include <plat/cpu.h>
38#include <plat/pm.h>
39
40#include "h1940.h"
41
42static void s3c2410_pm_prepare(void)
43{
44
45
46 __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);
47
48 S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
49 S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
50
51 if (machine_is_h1940()) {
52 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
53 unsigned long ptr;
54 unsigned long calc = 0;
55
56
57
58 for (ptr = 0; ptr < 0x40000; ptr += 0x400)
59 calc += __raw_readl(base+ptr);
60
61 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
62 }
63
64
65
66
67 if (machine_is_rx3715() || machine_is_rx1950()) {
68 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
69 unsigned long ptr;
70 unsigned long calc = 0;
71
72
73
74 for (ptr = 0; ptr < 0x40000; ptr += 0x4)
75 calc += __raw_readl(base+ptr);
76
77 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
78 }
79
80 if (machine_is_aml_m5900()) {
81 gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL);
82 gpio_free(S3C2410_GPF(2));
83 }
84
85 if (machine_is_rx1950()) {
86
87
88
89
90
91
92 s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
93 s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
94 s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
95 }
96}
97
98static void s3c2410_pm_resume(void)
99{
100 unsigned long tmp;
101
102
103
104 tmp = __raw_readl(S3C2410_GSTATUS2);
105 tmp &= S3C2410_GSTATUS2_OFFRESET;
106 __raw_writel(tmp, S3C2410_GSTATUS2);
107
108 if (machine_is_aml_m5900()) {
109 gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL);
110 gpio_free(S3C2410_GPF(2));
111 }
112}
113
114struct syscore_ops s3c2410_pm_syscore_ops = {
115 .resume = s3c2410_pm_resume,
116};
117
118static int s3c2410_pm_add(struct device *dev, struct subsys_interface *sif)
119{
120 pm_cpu_prep = s3c2410_pm_prepare;
121 pm_cpu_sleep = s3c2410_cpu_suspend;
122
123 return 0;
124}
125
126#if defined(CONFIG_CPU_S3C2410)
127static struct subsys_interface s3c2410_pm_interface = {
128 .name = "s3c2410_pm",
129 .subsys = &s3c2410_subsys,
130 .add_dev = s3c2410_pm_add,
131};
132
133
134
135static int __init s3c2410_pm_drvinit(void)
136{
137 return subsys_interface_register(&s3c2410_pm_interface);
138}
139
140arch_initcall(s3c2410_pm_drvinit);
141
142static struct subsys_interface s3c2410a_pm_interface = {
143 .name = "s3c2410a_pm",
144 .subsys = &s3c2410a_subsys,
145 .add_dev = s3c2410_pm_add,
146};
147
148static int __init s3c2410a_pm_drvinit(void)
149{
150 return subsys_interface_register(&s3c2410a_pm_interface);
151}
152
153arch_initcall(s3c2410a_pm_drvinit);
154#endif
155
156#if defined(CONFIG_CPU_S3C2440)
157static struct subsys_interface s3c2440_pm_interface = {
158 .name = "s3c2440_pm",
159 .subsys = &s3c2440_subsys,
160 .add_dev = s3c2410_pm_add,
161};
162
163static int __init s3c2440_pm_drvinit(void)
164{
165 return subsys_interface_register(&s3c2440_pm_interface);
166}
167
168arch_initcall(s3c2440_pm_drvinit);
169#endif
170
171#if defined(CONFIG_CPU_S3C2442)
172static struct subsys_interface s3c2442_pm_interface = {
173 .name = "s3c2442_pm",
174 .subsys = &s3c2442_subsys,
175 .add_dev = s3c2410_pm_add,
176};
177
178static int __init s3c2442_pm_drvinit(void)
179{
180 return subsys_interface_register(&s3c2442_pm_interface);
181}
182
183arch_initcall(s3c2442_pm_drvinit);
184#endif
185
