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13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/tty.h>
16#include <linux/platform_data/sa11x0-serial.h>
17#include <linux/platform_device.h>
18#include <linux/irq.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/partitions.h>
21#include <linux/gpio.h>
22#include <linux/leds.h>
23
24#include <mach/hardware.h>
25#include <asm/setup.h>
26
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/flash.h>
30#include <asm/mach/map.h>
31
32#include <mach/cerf.h>
33#include <linux/platform_data/mfd-mcp-sa11x0.h>
34#include <mach/irqs.h>
35#include "generic.h"
36
37static struct resource cerfuart2_resources[] = {
38 [0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
39};
40
41static struct platform_device cerfuart2_device = {
42 .name = "sa11x0-uart",
43 .id = 2,
44 .num_resources = ARRAY_SIZE(cerfuart2_resources),
45 .resource = cerfuart2_resources,
46};
47
48
49struct gpio_led cerf_gpio_leds[] = {
50 {
51 .name = "cerf:d0",
52 .default_trigger = "heartbeat",
53 .gpio = 0,
54 },
55 {
56 .name = "cerf:d1",
57 .default_trigger = "cpu0",
58 .gpio = 1,
59 },
60 {
61 .name = "cerf:d2",
62 .default_trigger = "default-on",
63 .gpio = 2,
64 },
65 {
66 .name = "cerf:d3",
67 .default_trigger = "default-on",
68 .gpio = 3,
69 },
70
71};
72
73static struct gpio_led_platform_data cerf_gpio_led_info = {
74 .leds = cerf_gpio_leds,
75 .num_leds = ARRAY_SIZE(cerf_gpio_leds),
76};
77
78static struct platform_device cerf_leds = {
79 .name = "leds-gpio",
80 .id = -1,
81 .dev = {
82 .platform_data = &cerf_gpio_led_info,
83 }
84};
85
86
87static struct platform_device *cerf_devices[] __initdata = {
88 &cerfuart2_device,
89 &cerf_leds,
90};
91
92#ifdef CONFIG_SA1100_CERF_FLASH_32MB
93# define CERF_FLASH_SIZE 0x02000000
94#elif defined CONFIG_SA1100_CERF_FLASH_16MB
95# define CERF_FLASH_SIZE 0x01000000
96#elif defined CONFIG_SA1100_CERF_FLASH_8MB
97# define CERF_FLASH_SIZE 0x00800000
98#else
99# error "Undefined flash size for CERF"
100#endif
101
102static struct mtd_partition cerf_partitions[] = {
103 {
104 .name = "Bootloader",
105 .size = 0x00020000,
106 .offset = 0x00000000,
107 }, {
108 .name = "Params",
109 .size = 0x00040000,
110 .offset = 0x00020000,
111 }, {
112 .name = "Kernel",
113 .size = 0x00100000,
114 .offset = 0x00060000,
115 }, {
116 .name = "Filesystem",
117 .size = CERF_FLASH_SIZE-0x00160000,
118 .offset = 0x00160000,
119 }
120};
121
122static struct flash_platform_data cerf_flash_data = {
123 .map_name = "cfi_probe",
124 .parts = cerf_partitions,
125 .nr_parts = ARRAY_SIZE(cerf_partitions),
126};
127
128static struct resource cerf_flash_resource =
129 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
130
131static void __init cerf_init_irq(void)
132{
133 sa1100_init_irq();
134 irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
135}
136
137static struct map_desc cerf_io_desc[] __initdata = {
138 {
139 .virtual = 0xf0000000,
140 .pfn = __phys_to_pfn(0x08000000),
141 .length = 0x00100000,
142 .type = MT_DEVICE
143 }
144};
145
146static void __init cerf_map_io(void)
147{
148 sa1100_map_io();
149 iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
150
151 sa1100_register_uart(0, 3);
152 sa1100_register_uart(1, 2);
153 sa1100_register_uart(2, 1);
154
155
156 GPDR |= CERF_GPIO_CF_RESET;
157}
158
159static struct mcp_plat_data cerf_mcp_data = {
160 .mccr0 = MCCR0_ADM,
161 .sclk_rate = 11981000,
162};
163
164static void __init cerf_init(void)
165{
166 sa11x0_ppc_configure_mcp();
167 platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
168 sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
169 sa11x0_register_mcp(&cerf_mcp_data);
170}
171
172MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
173
174 .map_io = cerf_map_io,
175 .nr_irqs = SA1100_NR_IRQS,
176 .init_irq = cerf_init_irq,
177 .init_time = sa1100_timer_init,
178 .init_machine = cerf_init,
179 .init_late = sa11x0_init_late,
180 .restart = sa11x0_restart,
181MACHINE_END
182