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24#include <linux/delay.h>
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/gpio.h>
31#include <linux/input.h>
32#include <linux/io.h>
33#include <linux/i2c.h>
34#include <linux/leds.h>
35#include <linux/mfd/tmio.h>
36#include <linux/mmc/host.h>
37#include <linux/mmc/sh_mmcif.h>
38#include <linux/mmc/sh_mobile_sdhi.h>
39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h>
42#include <linux/mtd/sh_flctl.h>
43#include <linux/pinctrl/machine.h>
44#include <linux/pm_clock.h>
45#include <linux/regulator/fixed.h>
46#include <linux/regulator/machine.h>
47#include <linux/smsc911x.h>
48#include <linux/sh_intc.h>
49#include <linux/tca6416_keypad.h>
50#include <linux/usb/renesas_usbhs.h>
51#include <linux/dma-mapping.h>
52
53#include <video/sh_mobile_hdmi.h>
54#include <video/sh_mobile_lcdc.h>
55#include <media/sh_mobile_ceu.h>
56#include <media/soc_camera.h>
57#include <media/soc_camera_platform.h>
58#include <sound/sh_fsi.h>
59#include <sound/simple_card.h>
60
61#include <mach/common.h>
62#include <mach/irqs.h>
63#include <mach/sh7372.h>
64
65#include <asm/mach/arch.h>
66#include <asm/mach-types.h>
67
68#include "sh-gpio.h"
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210static struct regulator_consumer_supply fixed1v8_power_consumers[] =
211{
212
213
214
215
216 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
217 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
218 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
219 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
220};
221
222static struct regulator_consumer_supply fixed3v3_power_consumers[] =
223{
224 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
225 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
226 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"),
227 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"),
228};
229
230
231static struct regulator_consumer_supply dummy_supplies[] = {
232 REGULATOR_SUPPLY("vddvario", "smsc911x"),
233 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
234};
235
236
237static struct mtd_partition nor_flash_partitions[] = {
238 {
239 .name = "loader",
240 .offset = 0x00000000,
241 .size = 512 * 1024,
242 .mask_flags = MTD_WRITEABLE,
243 },
244 {
245 .name = "bootenv",
246 .offset = MTDPART_OFS_APPEND,
247 .size = 512 * 1024,
248 .mask_flags = MTD_WRITEABLE,
249 },
250 {
251 .name = "kernel_ro",
252 .offset = MTDPART_OFS_APPEND,
253 .size = 8 * 1024 * 1024,
254 .mask_flags = MTD_WRITEABLE,
255 },
256 {
257 .name = "kernel",
258 .offset = MTDPART_OFS_APPEND,
259 .size = 8 * 1024 * 1024,
260 },
261 {
262 .name = "data",
263 .offset = MTDPART_OFS_APPEND,
264 .size = MTDPART_SIZ_FULL,
265 },
266};
267
268static struct physmap_flash_data nor_flash_data = {
269 .width = 2,
270 .parts = nor_flash_partitions,
271 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
272};
273
274static struct resource nor_flash_resources[] = {
275 [0] = {
276 .start = 0x20000000,
277 .end = 0x28000000 - 1,
278 .flags = IORESOURCE_MEM,
279 }
280};
281
282static struct platform_device nor_flash_device = {
283 .name = "physmap-flash",
284 .dev = {
285 .platform_data = &nor_flash_data,
286 },
287 .num_resources = ARRAY_SIZE(nor_flash_resources),
288 .resource = nor_flash_resources,
289};
290
291
292static struct resource smc911x_resources[] = {
293 {
294 .start = 0x14000000,
295 .end = 0x16000000 - 1,
296 .flags = IORESOURCE_MEM,
297 }, {
298 .start = evt2irq(0x02c0) ,
299 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
300 },
301};
302
303static struct smsc911x_platform_config smsc911x_info = {
304 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
305 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
306 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
307};
308
309static struct platform_device smc911x_device = {
310 .name = "smsc911x",
311 .id = -1,
312 .num_resources = ARRAY_SIZE(smc911x_resources),
313 .resource = smc911x_resources,
314 .dev = {
315 .platform_data = &smsc911x_info,
316 },
317};
318
319
320static struct sh_mobile_meram_info mackerel_meram_info = {
321 .addr_mode = SH_MOBILE_MERAM_MODE1,
322};
323
324static struct resource meram_resources[] = {
325 [0] = {
326 .name = "regs",
327 .start = 0xe8000000,
328 .end = 0xe807ffff,
329 .flags = IORESOURCE_MEM,
330 },
331 [1] = {
332 .name = "meram",
333 .start = 0xe8080000,
334 .end = 0xe81fffff,
335 .flags = IORESOURCE_MEM,
336 },
337};
338
339static struct platform_device meram_device = {
340 .name = "sh_mobile_meram",
341 .id = 0,
342 .num_resources = ARRAY_SIZE(meram_resources),
343 .resource = meram_resources,
344 .dev = {
345 .platform_data = &mackerel_meram_info,
346 },
347};
348
349
350static struct fb_videomode mackerel_lcdc_modes[] = {
351 {
352 .name = "WVGA Panel",
353 .xres = 800,
354 .yres = 480,
355 .left_margin = 220,
356 .right_margin = 110,
357 .hsync_len = 70,
358 .upper_margin = 20,
359 .lower_margin = 5,
360 .vsync_len = 5,
361 .sync = 0,
362 },
363};
364
365static int mackerel_set_brightness(int brightness)
366{
367 gpio_set_value(31, brightness);
368
369 return 0;
370}
371
372static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
373 .icb[0] = {
374 .meram_size = 0x40,
375 },
376 .icb[1] = {
377 .meram_size = 0x40,
378 },
379};
380
381static struct sh_mobile_lcdc_info lcdc_info = {
382 .meram_dev = &mackerel_meram_info,
383 .clock_source = LCDC_CLK_BUS,
384 .ch[0] = {
385 .chan = LCDC_CHAN_MAINLCD,
386 .fourcc = V4L2_PIX_FMT_RGB565,
387 .lcd_modes = mackerel_lcdc_modes,
388 .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
389 .interface_type = RGB24,
390 .clock_divider = 3,
391 .flags = 0,
392 .panel_cfg = {
393 .width = 152,
394 .height = 91,
395 },
396 .bl_info = {
397 .name = "sh_mobile_lcdc_bl",
398 .max_brightness = 1,
399 .set_brightness = mackerel_set_brightness,
400 },
401 .meram_cfg = &lcd_meram_cfg,
402 }
403};
404
405static struct resource lcdc_resources[] = {
406 [0] = {
407 .name = "LCDC",
408 .start = 0xfe940000,
409 .end = 0xfe943fff,
410 .flags = IORESOURCE_MEM,
411 },
412 [1] = {
413 .start = intcs_evt2irq(0x580),
414 .flags = IORESOURCE_IRQ,
415 },
416};
417
418static struct platform_device lcdc_device = {
419 .name = "sh_mobile_lcdc_fb",
420 .num_resources = ARRAY_SIZE(lcdc_resources),
421 .resource = lcdc_resources,
422 .dev = {
423 .platform_data = &lcdc_info,
424 .coherent_dma_mask = ~0,
425 },
426};
427
428
429static struct sh_mobile_hdmi_info hdmi_info = {
430 .flags = HDMI_SND_SRC_SPDIF,
431};
432
433static struct resource hdmi_resources[] = {
434 [0] = {
435 .name = "HDMI",
436 .start = 0xe6be0000,
437 .end = 0xe6be00ff,
438 .flags = IORESOURCE_MEM,
439 },
440 [1] = {
441
442 .start = evt2irq(0x17e0),
443 .flags = IORESOURCE_IRQ,
444 },
445};
446
447static struct platform_device hdmi_device = {
448 .name = "sh-mobile-hdmi",
449 .num_resources = ARRAY_SIZE(hdmi_resources),
450 .resource = hdmi_resources,
451 .id = -1,
452 .dev = {
453 .platform_data = &hdmi_info,
454 },
455};
456
457static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
458 .icb[0] = {
459 .meram_size = 0x100,
460 },
461 .icb[1] = {
462 .meram_size = 0x100,
463 },
464};
465
466static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
467 .meram_dev = &mackerel_meram_info,
468 .clock_source = LCDC_CLK_EXTERNAL,
469 .ch[0] = {
470 .chan = LCDC_CHAN_MAINLCD,
471 .fourcc = V4L2_PIX_FMT_RGB565,
472 .interface_type = RGB24,
473 .clock_divider = 1,
474 .flags = LCDC_FLAGS_DWPOL,
475 .meram_cfg = &hdmi_meram_cfg,
476 .tx_dev = &hdmi_device,
477 }
478};
479
480static struct resource hdmi_lcdc_resources[] = {
481 [0] = {
482 .name = "LCDC1",
483 .start = 0xfe944000,
484 .end = 0xfe947fff,
485 .flags = IORESOURCE_MEM,
486 },
487 [1] = {
488 .start = intcs_evt2irq(0x1780),
489 .flags = IORESOURCE_IRQ,
490 },
491};
492
493static struct platform_device hdmi_lcdc_device = {
494 .name = "sh_mobile_lcdc_fb",
495 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
496 .resource = hdmi_lcdc_resources,
497 .id = 1,
498 .dev = {
499 .platform_data = &hdmi_lcdc_info,
500 .coherent_dma_mask = ~0,
501 },
502};
503
504static struct asoc_simple_card_info fsi2_hdmi_info = {
505 .name = "HDMI",
506 .card = "FSI2B-HDMI",
507 .codec = "sh-mobile-hdmi",
508 .platform = "sh_fsi2",
509 .cpu_dai = {
510 .name = "fsib-dai",
511 .fmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF,
512 },
513 .codec_dai = {
514 .name = "sh_mobile_hdmi-hifi",
515 },
516};
517
518static struct platform_device fsi_hdmi_device = {
519 .name = "asoc-simple-card",
520 .id = 1,
521 .dev = {
522 .platform_data = &fsi2_hdmi_info,
523 },
524};
525
526static void __init hdmi_init_pm_clock(void)
527{
528 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
529 int ret;
530 long rate;
531
532 if (IS_ERR(hdmi_ick)) {
533 ret = PTR_ERR(hdmi_ick);
534 pr_err("Cannot get HDMI ICK: %d\n", ret);
535 goto out;
536 }
537
538 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
539 if (ret < 0) {
540 pr_err("Cannot set PLLC2 parent: %d, %d users\n",
541 ret, sh7372_pllc2_clk.usecount);
542 goto out;
543 }
544
545 pr_debug("PLLC2 initial frequency %lu\n",
546 clk_get_rate(&sh7372_pllc2_clk));
547
548 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
549 if (rate < 0) {
550 pr_err("Cannot get suitable rate: %ld\n", rate);
551 ret = rate;
552 goto out;
553 }
554
555 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
556 if (ret < 0) {
557 pr_err("Cannot set rate %ld: %d\n", rate, ret);
558 goto out;
559 }
560
561 pr_debug("PLLC2 set frequency %lu\n", rate);
562
563 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
564 if (ret < 0)
565 pr_err("Cannot set HDMI parent: %d\n", ret);
566
567out:
568 if (!IS_ERR(hdmi_ick))
569 clk_put(hdmi_ick);
570}
571
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575
576
577
578#define USBHS0_POLL_INTERVAL (HZ * 5)
579
580struct usbhs_private {
581 void __iomem *usbphyaddr;
582 void __iomem *usbcrcaddr;
583 struct renesas_usbhs_platform_info info;
584 struct delayed_work work;
585 struct platform_device *pdev;
586};
587
588#define usbhs_get_priv(pdev) \
589 container_of(renesas_usbhs_get_info(pdev), \
590 struct usbhs_private, info)
591
592#define usbhs_is_connected(priv) \
593 (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
594
595static int usbhs_get_vbus(struct platform_device *pdev)
596{
597 return usbhs_is_connected(usbhs_get_priv(pdev));
598}
599
600static int usbhs_phy_reset(struct platform_device *pdev)
601{
602 struct usbhs_private *priv = usbhs_get_priv(pdev);
603
604
605 __raw_writew(0x8a0a, priv->usbcrcaddr);
606
607 return 0;
608}
609
610static int usbhs0_get_id(struct platform_device *pdev)
611{
612 return USBHS_GADGET;
613}
614
615static void usbhs0_work_function(struct work_struct *work)
616{
617 struct usbhs_private *priv = container_of(work, struct usbhs_private,
618 work.work);
619
620 renesas_usbhs_call_notify_hotplug(priv->pdev);
621 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
622}
623
624static int usbhs0_hardware_init(struct platform_device *pdev)
625{
626 struct usbhs_private *priv = usbhs_get_priv(pdev);
627
628 priv->pdev = pdev;
629 INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
630 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
631 return 0;
632}
633
634static int usbhs0_hardware_exit(struct platform_device *pdev)
635{
636 struct usbhs_private *priv = usbhs_get_priv(pdev);
637
638 cancel_delayed_work_sync(&priv->work);
639
640 return 0;
641}
642
643static struct usbhs_private usbhs0_private = {
644 .usbcrcaddr = IOMEM(0xe605810c),
645 .info = {
646 .platform_callback = {
647 .hardware_init = usbhs0_hardware_init,
648 .hardware_exit = usbhs0_hardware_exit,
649 .phy_reset = usbhs_phy_reset,
650 .get_id = usbhs0_get_id,
651 .get_vbus = usbhs_get_vbus,
652 },
653 .driver_param = {
654 .buswait_bwait = 4,
655 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
656 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
657 },
658 },
659};
660
661static struct resource usbhs0_resources[] = {
662 [0] = {
663 .name = "USBHS0",
664 .start = 0xe6890000,
665 .end = 0xe68900e6 - 1,
666 .flags = IORESOURCE_MEM,
667 },
668 [1] = {
669 .start = evt2irq(0x1ca0) ,
670 .flags = IORESOURCE_IRQ,
671 },
672};
673
674static struct platform_device usbhs0_device = {
675 .name = "renesas_usbhs",
676 .id = 0,
677 .dev = {
678 .platform_data = &usbhs0_private.info,
679 },
680 .num_resources = ARRAY_SIZE(usbhs0_resources),
681 .resource = usbhs0_resources,
682};
683
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697
698
699#define IRQ8 evt2irq(0x0300)
700#define USB_PHY_MODE (1 << 4)
701#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
702#define USB_PHY_ON (1 << 1)
703#define USB_PHY_OFF (1 << 0)
704#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
705
706static irqreturn_t usbhs1_interrupt(int irq, void *data)
707{
708 struct platform_device *pdev = data;
709 struct usbhs_private *priv = usbhs_get_priv(pdev);
710
711 dev_dbg(&pdev->dev, "%s\n", __func__);
712
713 renesas_usbhs_call_notify_hotplug(pdev);
714
715
716 __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
717 priv->usbphyaddr);
718
719 return IRQ_HANDLED;
720}
721
722static int usbhs1_hardware_init(struct platform_device *pdev)
723{
724 struct usbhs_private *priv = usbhs_get_priv(pdev);
725 int ret;
726
727
728 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
729
730 ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
731 dev_name(&pdev->dev), pdev);
732 if (ret) {
733 dev_err(&pdev->dev, "request_irq err\n");
734 return ret;
735 }
736
737
738 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
739
740 return 0;
741}
742
743static int usbhs1_hardware_exit(struct platform_device *pdev)
744{
745 struct usbhs_private *priv = usbhs_get_priv(pdev);
746
747
748 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
749
750 free_irq(IRQ8, pdev);
751
752 return 0;
753}
754
755static int usbhs1_get_id(struct platform_device *pdev)
756{
757 return USBHS_HOST;
758}
759
760static u32 usbhs1_pipe_cfg[] = {
761 USB_ENDPOINT_XFER_CONTROL,
762 USB_ENDPOINT_XFER_ISOC,
763 USB_ENDPOINT_XFER_ISOC,
764 USB_ENDPOINT_XFER_BULK,
765 USB_ENDPOINT_XFER_BULK,
766 USB_ENDPOINT_XFER_BULK,
767 USB_ENDPOINT_XFER_INT,
768 USB_ENDPOINT_XFER_INT,
769 USB_ENDPOINT_XFER_INT,
770 USB_ENDPOINT_XFER_BULK,
771 USB_ENDPOINT_XFER_BULK,
772 USB_ENDPOINT_XFER_BULK,
773 USB_ENDPOINT_XFER_BULK,
774 USB_ENDPOINT_XFER_BULK,
775 USB_ENDPOINT_XFER_BULK,
776 USB_ENDPOINT_XFER_BULK,
777};
778
779static struct usbhs_private usbhs1_private = {
780 .usbphyaddr = IOMEM(0xe60581e2),
781 .usbcrcaddr = IOMEM(0xe6058130),
782 .info = {
783 .platform_callback = {
784 .hardware_init = usbhs1_hardware_init,
785 .hardware_exit = usbhs1_hardware_exit,
786 .get_id = usbhs1_get_id,
787 .phy_reset = usbhs_phy_reset,
788 },
789 .driver_param = {
790 .buswait_bwait = 4,
791 .has_otg = 1,
792 .pipe_type = usbhs1_pipe_cfg,
793 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
794 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
795 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
796 },
797 },
798};
799
800static struct resource usbhs1_resources[] = {
801 [0] = {
802 .name = "USBHS1",
803 .start = 0xe68b0000,
804 .end = 0xe68b00e6 - 1,
805 .flags = IORESOURCE_MEM,
806 },
807 [1] = {
808 .start = evt2irq(0x1ce0) ,
809 .flags = IORESOURCE_IRQ,
810 },
811};
812
813static struct platform_device usbhs1_device = {
814 .name = "renesas_usbhs",
815 .id = 1,
816 .dev = {
817 .platform_data = &usbhs1_private.info,
818 .dma_mask = &usbhs1_device.dev.coherent_dma_mask,
819 .coherent_dma_mask = DMA_BIT_MASK(32),
820 },
821 .num_resources = ARRAY_SIZE(usbhs1_resources),
822 .resource = usbhs1_resources,
823};
824
825
826static struct gpio_led mackerel_leds[] = {
827 {
828 .name = "led0",
829 .gpio = 0,
830 .default_state = LEDS_GPIO_DEFSTATE_ON,
831 },
832 {
833 .name = "led1",
834 .gpio = 1,
835 .default_state = LEDS_GPIO_DEFSTATE_ON,
836 },
837 {
838 .name = "led2",
839 .gpio = 2,
840 .default_state = LEDS_GPIO_DEFSTATE_ON,
841 },
842 {
843 .name = "led3",
844 .gpio = 159,
845 .default_state = LEDS_GPIO_DEFSTATE_ON,
846 }
847};
848
849static struct gpio_led_platform_data mackerel_leds_pdata = {
850 .leds = mackerel_leds,
851 .num_leds = ARRAY_SIZE(mackerel_leds),
852};
853
854static struct platform_device leds_device = {
855 .name = "leds-gpio",
856 .id = 0,
857 .dev = {
858 .platform_data = &mackerel_leds_pdata,
859 },
860};
861
862
863#define IRQ_FSI evt2irq(0x1840)
864static struct sh_fsi_platform_info fsi_info = {
865 .port_a = {
866 .tx_id = SHDMA_SLAVE_FSIA_TX,
867 .rx_id = SHDMA_SLAVE_FSIA_RX,
868 },
869 .port_b = {
870 .flags = SH_FSI_CLK_CPG |
871 SH_FSI_FMT_SPDIF,
872 }
873};
874
875static struct resource fsi_resources[] = {
876 [0] = {
877
878
879 .name = "FSI",
880 .start = 0xFE1F0000,
881 .end = 0xFE1F0400 - 1,
882 .flags = IORESOURCE_MEM,
883 },
884 [1] = {
885 .start = IRQ_FSI,
886 .flags = IORESOURCE_IRQ,
887 },
888};
889
890static struct platform_device fsi_device = {
891 .name = "sh_fsi2",
892 .id = -1,
893 .num_resources = ARRAY_SIZE(fsi_resources),
894 .resource = fsi_resources,
895 .dev = {
896 .platform_data = &fsi_info,
897 },
898};
899
900static struct asoc_simple_card_info fsi2_ak4643_info = {
901 .name = "AK4643",
902 .card = "FSI2A-AK4643",
903 .codec = "ak4642-codec.0-0013",
904 .platform = "sh_fsi2",
905 .daifmt = SND_SOC_DAIFMT_LEFT_J,
906 .cpu_dai = {
907 .name = "fsia-dai",
908 .fmt = SND_SOC_DAIFMT_CBS_CFS,
909 },
910 .codec_dai = {
911 .name = "ak4642-hifi",
912 .fmt = SND_SOC_DAIFMT_CBM_CFM,
913 .sysclk = 11289600,
914 },
915};
916
917static struct platform_device fsi_ak4643_device = {
918 .name = "asoc-simple-card",
919 .dev = {
920 .platform_data = &fsi2_ak4643_info,
921 },
922};
923
924
925static struct mtd_partition nand_partition_info[] = {
926 {
927 .name = "system",
928 .offset = 0,
929 .size = 128 * 1024 * 1024,
930 },
931 {
932 .name = "userdata",
933 .offset = MTDPART_OFS_APPEND,
934 .size = 256 * 1024 * 1024,
935 },
936 {
937 .name = "cache",
938 .offset = MTDPART_OFS_APPEND,
939 .size = 128 * 1024 * 1024,
940 },
941};
942
943static struct resource nand_flash_resources[] = {
944 [0] = {
945 .start = 0xe6a30000,
946 .end = 0xe6a3009b,
947 .flags = IORESOURCE_MEM,
948 },
949 [1] = {
950 .start = evt2irq(0x0d80),
951 .flags = IORESOURCE_IRQ,
952 },
953};
954
955static struct sh_flctl_platform_data nand_flash_data = {
956 .parts = nand_partition_info,
957 .nr_parts = ARRAY_SIZE(nand_partition_info),
958 .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
959 | SHBUSSEL | SEL_16BIT | SNAND_E,
960 .use_holden = 1,
961};
962
963static struct platform_device nand_flash_device = {
964 .name = "sh_flctl",
965 .resource = nand_flash_resources,
966 .num_resources = ARRAY_SIZE(nand_flash_resources),
967 .dev = {
968 .platform_data = &nand_flash_data,
969 },
970};
971
972
973static struct sh_mobile_sdhi_info sdhi0_info = {
974 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
975 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
976 .tmio_flags = TMIO_MMC_USE_GPIO_CD,
977 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
978 .cd_gpio = 172,
979};
980
981static struct resource sdhi0_resources[] = {
982 {
983 .name = "SDHI0",
984 .start = 0xe6850000,
985 .end = 0xe68500ff,
986 .flags = IORESOURCE_MEM,
987 }, {
988 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
989 .start = evt2irq(0x0e20) ,
990 .flags = IORESOURCE_IRQ,
991 }, {
992 .name = SH_MOBILE_SDHI_IRQ_SDIO,
993 .start = evt2irq(0x0e40) ,
994 .flags = IORESOURCE_IRQ,
995 },
996};
997
998static struct platform_device sdhi0_device = {
999 .name = "sh_mobile_sdhi",
1000 .num_resources = ARRAY_SIZE(sdhi0_resources),
1001 .resource = sdhi0_resources,
1002 .id = 0,
1003 .dev = {
1004 .platform_data = &sdhi0_info,
1005 },
1006};
1007
1008#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
1009
1010
1011
1012static struct sh_mobile_sdhi_info sdhi1_info = {
1013 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
1014 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
1015 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_USE_GPIO_CD,
1016 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
1017 MMC_CAP_NEEDS_POLL,
1018 .cd_gpio = 41,
1019};
1020
1021static struct resource sdhi1_resources[] = {
1022 {
1023 .name = "SDHI1",
1024 .start = 0xe6860000,
1025 .end = 0xe68600ff,
1026 .flags = IORESOURCE_MEM,
1027 }, {
1028 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
1029 .start = evt2irq(0x0ea0),
1030 .flags = IORESOURCE_IRQ,
1031 }, {
1032 .name = SH_MOBILE_SDHI_IRQ_SDIO,
1033 .start = evt2irq(0x0ec0),
1034 .flags = IORESOURCE_IRQ,
1035 },
1036};
1037
1038static struct platform_device sdhi1_device = {
1039 .name = "sh_mobile_sdhi",
1040 .num_resources = ARRAY_SIZE(sdhi1_resources),
1041 .resource = sdhi1_resources,
1042 .id = 1,
1043 .dev = {
1044 .platform_data = &sdhi1_info,
1045 },
1046};
1047#endif
1048
1049
1050
1051
1052
1053
1054
1055static struct sh_mobile_sdhi_info sdhi2_info = {
1056 .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
1057 .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
1058 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_USE_GPIO_CD,
1059 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
1060 MMC_CAP_NEEDS_POLL,
1061 .cd_gpio = 162,
1062};
1063
1064static struct resource sdhi2_resources[] = {
1065 {
1066 .name = "SDHI2",
1067 .start = 0xe6870000,
1068 .end = 0xe68700ff,
1069 .flags = IORESOURCE_MEM,
1070 }, {
1071 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
1072 .start = evt2irq(0x1220),
1073 .flags = IORESOURCE_IRQ,
1074 }, {
1075 .name = SH_MOBILE_SDHI_IRQ_SDIO,
1076 .start = evt2irq(0x1240),
1077 .flags = IORESOURCE_IRQ,
1078 },
1079};
1080
1081static struct platform_device sdhi2_device = {
1082 .name = "sh_mobile_sdhi",
1083 .num_resources = ARRAY_SIZE(sdhi2_resources),
1084 .resource = sdhi2_resources,
1085 .id = 2,
1086 .dev = {
1087 .platform_data = &sdhi2_info,
1088 },
1089};
1090
1091
1092#if IS_ENABLED(CONFIG_MMC_SH_MMCIF)
1093static struct resource sh_mmcif_resources[] = {
1094 [0] = {
1095 .name = "MMCIF",
1096 .start = 0xE6BD0000,
1097 .end = 0xE6BD00FF,
1098 .flags = IORESOURCE_MEM,
1099 },
1100 [1] = {
1101
1102 .start = evt2irq(0x1ac0),
1103 .flags = IORESOURCE_IRQ,
1104 },
1105 [2] = {
1106
1107 .start = evt2irq(0x1ae0),
1108 .flags = IORESOURCE_IRQ,
1109 },
1110};
1111
1112static struct sh_mmcif_plat_data sh_mmcif_plat = {
1113 .sup_pclk = 0,
1114 .caps = MMC_CAP_4_BIT_DATA |
1115 MMC_CAP_8_BIT_DATA |
1116 MMC_CAP_NEEDS_POLL,
1117 .use_cd_gpio = true,
1118
1119 .cd_gpio = 41,
1120 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
1121 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
1122};
1123
1124static struct platform_device sh_mmcif_device = {
1125 .name = "sh_mmcif",
1126 .id = 0,
1127 .dev = {
1128 .dma_mask = NULL,
1129 .coherent_dma_mask = 0xffffffff,
1130 .platform_data = &sh_mmcif_plat,
1131 },
1132 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1133 .resource = sh_mmcif_resources,
1134};
1135#endif
1136
1137static int mackerel_camera_add(struct soc_camera_device *icd);
1138static void mackerel_camera_del(struct soc_camera_device *icd);
1139
1140static int camera_set_capture(struct soc_camera_platform_info *info,
1141 int enable)
1142{
1143 return 0;
1144}
1145
1146static struct soc_camera_platform_info camera_info = {
1147 .format_name = "UYVY",
1148 .format_depth = 16,
1149 .format = {
1150 .code = V4L2_MBUS_FMT_UYVY8_2X8,
1151 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1152 .field = V4L2_FIELD_NONE,
1153 .width = 640,
1154 .height = 480,
1155 },
1156 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
1157 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1158 V4L2_MBUS_DATA_ACTIVE_HIGH,
1159 .mbus_type = V4L2_MBUS_PARALLEL,
1160 .set_capture = camera_set_capture,
1161};
1162
1163static struct soc_camera_link camera_link = {
1164 .bus_id = 0,
1165 .add_device = mackerel_camera_add,
1166 .del_device = mackerel_camera_del,
1167 .module_name = "soc_camera_platform",
1168 .priv = &camera_info,
1169};
1170
1171static struct platform_device *camera_device;
1172
1173static void mackerel_camera_release(struct device *dev)
1174{
1175 soc_camera_platform_release(&camera_device);
1176}
1177
1178static int mackerel_camera_add(struct soc_camera_device *icd)
1179{
1180 return soc_camera_platform_add(icd, &camera_device, &camera_link,
1181 mackerel_camera_release, 0);
1182}
1183
1184static void mackerel_camera_del(struct soc_camera_device *icd)
1185{
1186 soc_camera_platform_del(icd, camera_device, &camera_link);
1187}
1188
1189static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1190 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1191 .max_width = 8188,
1192 .max_height = 8188,
1193};
1194
1195static struct resource ceu_resources[] = {
1196 [0] = {
1197 .name = "CEU",
1198 .start = 0xfe910000,
1199 .end = 0xfe91009f,
1200 .flags = IORESOURCE_MEM,
1201 },
1202 [1] = {
1203 .start = intcs_evt2irq(0x880),
1204 .flags = IORESOURCE_IRQ,
1205 },
1206 [2] = {
1207
1208 },
1209};
1210
1211static struct platform_device ceu_device = {
1212 .name = "sh_mobile_ceu",
1213 .id = 0,
1214 .num_resources = ARRAY_SIZE(ceu_resources),
1215 .resource = ceu_resources,
1216 .dev = {
1217 .platform_data = &sh_mobile_ceu_info,
1218 .coherent_dma_mask = 0xffffffff,
1219 },
1220};
1221
1222static struct platform_device mackerel_camera = {
1223 .name = "soc-camera-pdrv",
1224 .id = 0,
1225 .dev = {
1226 .platform_data = &camera_link,
1227 },
1228};
1229
1230static struct platform_device *mackerel_devices[] __initdata = {
1231 &nor_flash_device,
1232 &smc911x_device,
1233 &lcdc_device,
1234 &usbhs0_device,
1235 &usbhs1_device,
1236 &leds_device,
1237 &fsi_device,
1238 &fsi_ak4643_device,
1239 &fsi_hdmi_device,
1240 &nand_flash_device,
1241 &sdhi0_device,
1242#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
1243 &sdhi1_device,
1244#else
1245 &sh_mmcif_device,
1246#endif
1247 &sdhi2_device,
1248 &ceu_device,
1249 &mackerel_camera,
1250 &hdmi_device,
1251 &hdmi_lcdc_device,
1252 &meram_device,
1253};
1254
1255
1256#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
1257{ \
1258 .type = ev_type, \
1259 .code = ev_code, \
1260 .active_low = act_low, \
1261}
1262
1263#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
1264
1265static struct tca6416_button mackerel_gpio_keys[] = {
1266 KEYPAD_BUTTON_LOW(KEY_HOME),
1267 KEYPAD_BUTTON_LOW(KEY_MENU),
1268 KEYPAD_BUTTON_LOW(KEY_BACK),
1269 KEYPAD_BUTTON_LOW(KEY_POWER),
1270};
1271
1272static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
1273 .buttons = mackerel_gpio_keys,
1274 .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
1275 .rep = 1,
1276 .use_polling = 0,
1277 .pinmask = 0x000F,
1278};
1279
1280
1281#define IRQ7 evt2irq(0x02e0)
1282#define IRQ9 evt2irq(0x0320)
1283
1284static struct i2c_board_info i2c0_devices[] = {
1285 {
1286 I2C_BOARD_INFO("ak4643", 0x13),
1287 },
1288
1289 {
1290 I2C_BOARD_INFO("tca6408-keys", 0x20),
1291 .platform_data = &mackerel_tca6416_keys_info,
1292 .irq = IRQ9,
1293 },
1294
1295 {
1296 I2C_BOARD_INFO("st1232-ts", 0x55),
1297 .irq = IRQ7,
1298 },
1299};
1300
1301#define IRQ21 evt2irq(0x32a0)
1302
1303static struct i2c_board_info i2c1_devices[] = {
1304
1305 {
1306 I2C_BOARD_INFO("adxl34x", 0x53),
1307 .irq = IRQ21,
1308 },
1309};
1310
1311static const struct pinctrl_map mackerel_pinctrl_map[] = {
1312
1313 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1314 "sdhi0_data4", "sdhi0"),
1315 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1316 "sdhi0_ctrl", "sdhi0"),
1317 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1318 "sdhi0_wp", "sdhi0"),
1319
1320#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
1321 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
1322 "sdhi1_data4", "sdhi1"),
1323 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
1324 "sdhi1_ctrl", "sdhi1"),
1325#else
1326
1327 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
1328 "mmc0_data8_0", "mmc0"),
1329 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
1330 "mmc0_ctrl_0", "mmc0"),
1331#endif
1332
1333 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
1334 "sdhi2_data4", "sdhi2"),
1335 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
1336 "sdhi2_ctrl", "sdhi2"),
1337};
1338
1339#define GPIO_PORT9CR IOMEM(0xE6051009)
1340#define GPIO_PORT10CR IOMEM(0xE605100A)
1341#define GPIO_PORT167CR IOMEM(0xE60520A7)
1342#define GPIO_PORT168CR IOMEM(0xE60520A8)
1343#define SRCR4 IOMEM(0xe61580bc)
1344#define USCCR1 IOMEM(0xE6058144)
1345static void __init mackerel_init(void)
1346{
1347 struct pm_domain_device domain_devices[] = {
1348 { "A4LC", &lcdc_device, },
1349 { "A4LC", &hdmi_lcdc_device, },
1350 { "A4LC", &meram_device, },
1351 { "A4MP", &fsi_device, },
1352 { "A3SP", &usbhs0_device, },
1353 { "A3SP", &usbhs1_device, },
1354 { "A3SP", &nand_flash_device, },
1355 { "A3SP", &sdhi0_device, },
1356#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
1357 { "A3SP", &sdhi1_device, },
1358#else
1359 { "A3SP", &sh_mmcif_device, },
1360#endif
1361 { "A3SP", &sdhi2_device, },
1362 { "A4R", &ceu_device, },
1363 };
1364 u32 srcr4;
1365 struct clk *clk;
1366
1367 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
1368 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
1369 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
1370 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
1371 regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
1372
1373
1374 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1375
1376 pinctrl_register_mappings(mackerel_pinctrl_map,
1377 ARRAY_SIZE(mackerel_pinctrl_map));
1378 sh7372_pinmux_init();
1379
1380
1381 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1382 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1383
1384
1385 gpio_request(GPIO_FN_CS5A, NULL);
1386 gpio_request(GPIO_FN_IRQ6_39, NULL);
1387
1388
1389 gpio_request(GPIO_FN_LCDD23, NULL);
1390 gpio_request(GPIO_FN_LCDD22, NULL);
1391 gpio_request(GPIO_FN_LCDD21, NULL);
1392 gpio_request(GPIO_FN_LCDD20, NULL);
1393 gpio_request(GPIO_FN_LCDD19, NULL);
1394 gpio_request(GPIO_FN_LCDD18, NULL);
1395 gpio_request(GPIO_FN_LCDD17, NULL);
1396 gpio_request(GPIO_FN_LCDD16, NULL);
1397 gpio_request(GPIO_FN_LCDD15, NULL);
1398 gpio_request(GPIO_FN_LCDD14, NULL);
1399 gpio_request(GPIO_FN_LCDD13, NULL);
1400 gpio_request(GPIO_FN_LCDD12, NULL);
1401 gpio_request(GPIO_FN_LCDD11, NULL);
1402 gpio_request(GPIO_FN_LCDD10, NULL);
1403 gpio_request(GPIO_FN_LCDD9, NULL);
1404 gpio_request(GPIO_FN_LCDD8, NULL);
1405 gpio_request(GPIO_FN_LCDD7, NULL);
1406 gpio_request(GPIO_FN_LCDD6, NULL);
1407 gpio_request(GPIO_FN_LCDD5, NULL);
1408 gpio_request(GPIO_FN_LCDD4, NULL);
1409 gpio_request(GPIO_FN_LCDD3, NULL);
1410 gpio_request(GPIO_FN_LCDD2, NULL);
1411 gpio_request(GPIO_FN_LCDD1, NULL);
1412 gpio_request(GPIO_FN_LCDD0, NULL);
1413 gpio_request(GPIO_FN_LCDDISP, NULL);
1414 gpio_request(GPIO_FN_LCDDCK, NULL);
1415
1416
1417 gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
1418
1419 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL);
1420
1421
1422 gpio_request(GPIO_FN_VBUS0_0, NULL);
1423 gpio_request_pulldown(GPIO_PORT168CR);
1424
1425
1426 gpio_request(GPIO_FN_VBUS0_1, NULL);
1427 gpio_request_pulldown(GPIO_PORT167CR);
1428 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1429
1430
1431 gpio_request(GPIO_FN_FSIAIBT, NULL);
1432 gpio_request(GPIO_FN_FSIAILR, NULL);
1433 gpio_request(GPIO_FN_FSIAISLD, NULL);
1434 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1435 gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL);
1436
1437 gpio_request(9, NULL);
1438 gpio_request(10, NULL);
1439 gpio_direction_none(GPIO_PORT9CR);
1440 gpio_direction_none(GPIO_PORT10CR);
1441
1442 intc_set_priority(IRQ_FSI, 3);
1443
1444
1445 gpio_request(GPIO_FN_FSIBCK, NULL);
1446 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1);
1447
1448
1449 clk = clk_get(NULL, "spu_clk");
1450 if (!IS_ERR(clk)) {
1451 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1452 clk_put(clk);
1453 }
1454
1455
1456 gpio_request(GPIO_FN_IRQ9_42, NULL);
1457 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
1458
1459
1460 gpio_request(GPIO_FN_IRQ7_40, NULL);
1461 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1462
1463
1464 gpio_request(GPIO_FN_IRQ21, NULL);
1465 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1466
1467
1468 gpio_request(GPIO_FN_IRQ26_172, NULL);
1469
1470
1471 gpio_request(GPIO_FN_D0_NAF0, NULL);
1472 gpio_request(GPIO_FN_D1_NAF1, NULL);
1473 gpio_request(GPIO_FN_D2_NAF2, NULL);
1474 gpio_request(GPIO_FN_D3_NAF3, NULL);
1475 gpio_request(GPIO_FN_D4_NAF4, NULL);
1476 gpio_request(GPIO_FN_D5_NAF5, NULL);
1477 gpio_request(GPIO_FN_D6_NAF6, NULL);
1478 gpio_request(GPIO_FN_D7_NAF7, NULL);
1479 gpio_request(GPIO_FN_D8_NAF8, NULL);
1480 gpio_request(GPIO_FN_D9_NAF9, NULL);
1481 gpio_request(GPIO_FN_D10_NAF10, NULL);
1482 gpio_request(GPIO_FN_D11_NAF11, NULL);
1483 gpio_request(GPIO_FN_D12_NAF12, NULL);
1484 gpio_request(GPIO_FN_D13_NAF13, NULL);
1485 gpio_request(GPIO_FN_D14_NAF14, NULL);
1486 gpio_request(GPIO_FN_D15_NAF15, NULL);
1487 gpio_request(GPIO_FN_FCE0, NULL);
1488 gpio_request(GPIO_FN_WE0_FWE, NULL);
1489 gpio_request(GPIO_FN_FRB, NULL);
1490 gpio_request(GPIO_FN_A4_FOE, NULL);
1491 gpio_request(GPIO_FN_A5_FCDE, NULL);
1492 gpio_request(GPIO_FN_RD_FSC, NULL);
1493
1494
1495 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1496 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1497
1498
1499 gpio_request(GPIO_FN_VIO_CLK, NULL);
1500 gpio_request(GPIO_FN_VIO_VD, NULL);
1501 gpio_request(GPIO_FN_VIO_HD, NULL);
1502 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1503 gpio_request(GPIO_FN_VIO_CKO, NULL);
1504 gpio_request(GPIO_FN_VIO_D7, NULL);
1505 gpio_request(GPIO_FN_VIO_D6, NULL);
1506 gpio_request(GPIO_FN_VIO_D5, NULL);
1507 gpio_request(GPIO_FN_VIO_D4, NULL);
1508 gpio_request(GPIO_FN_VIO_D3, NULL);
1509 gpio_request(GPIO_FN_VIO_D2, NULL);
1510 gpio_request(GPIO_FN_VIO_D1, NULL);
1511 gpio_request(GPIO_FN_VIO_D0, NULL);
1512
1513
1514 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1515 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1516
1517
1518 srcr4 = __raw_readl(SRCR4);
1519 __raw_writel(srcr4 | (1 << 13), SRCR4);
1520 udelay(50);
1521 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1522
1523 i2c_register_board_info(0, i2c0_devices,
1524 ARRAY_SIZE(i2c0_devices));
1525 i2c_register_board_info(1, i2c1_devices,
1526 ARRAY_SIZE(i2c1_devices));
1527
1528 sh7372_add_standard_devices();
1529
1530 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
1531
1532 rmobile_add_devices_to_domains(domain_devices,
1533 ARRAY_SIZE(domain_devices));
1534
1535 hdmi_init_pm_clock();
1536 sh7372_pm_init();
1537 pm_clk_add(&fsi_device.dev, "spu2");
1538 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
1539}
1540
1541static const char *mackerel_boards_compat_dt[] __initdata = {
1542 "renesas,mackerel",
1543 NULL,
1544};
1545
1546DT_MACHINE_START(MACKEREL_DT, "mackerel")
1547 .map_io = sh7372_map_io,
1548 .init_early = sh7372_add_early_devices,
1549 .init_irq = sh7372_init_irq,
1550 .handle_irq = shmobile_handle_irq_intc,
1551 .init_machine = mackerel_init,
1552 .init_late = sh7372_pm_init_late,
1553 .init_time = sh7372_earlytimer_init,
1554 .dt_compat = mackerel_boards_compat_dt,
1555MACHINE_END
1556