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11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/assembler.h>
14#include <asm/asm-offsets.h>
15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h>
18#include <asm/ptrace.h>
19
20#include "proc-macros.S"
21
22 .text
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30
31ENTRY(cpu_arm740_proc_init)
32ENTRY(cpu_arm740_do_idle)
33ENTRY(cpu_arm740_dcache_clean_area)
34ENTRY(cpu_arm740_switch_mm)
35 mov pc, lr
36
37
38
39
40ENTRY(cpu_arm740_proc_fin)
41 mrc p15, 0, r0, c1, c0, 0
42 bic r0, r0,
43 bic r0, r0,
44 mcr p15, 0, r0, c1, c0, 0 @ disable caches
45 mov pc, lr
46
47
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49
50
51
52 .pushsection .idmap.text, "ax"
53ENTRY(cpu_arm740_reset)
54 mov ip,
55 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
56 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
57 bic ip, ip,
58 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
59 mov pc, r0
60ENDPROC(cpu_arm740_reset)
61 .popsection
62
63 __CPUINIT
64
65 .type __arm740_setup,
66__arm740_setup:
67 mov r0,
68 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
69
70 mcr p15, 0, r0, c6, c3 @ disable area 3~7
71 mcr p15, 0, r0, c6, c4
72 mcr p15, 0, r0, c6, c5
73 mcr p15, 0, r0, c6, c6
74 mcr p15, 0, r0, c6, c7
75
76 mov r0,
77 mcr p15, 0, r0, c6, c0 @ set area 0, default
78
79 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
80 ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
81 mov r4,
821: add r4, r4,
83 movs r3, r3, lsr
84 bne 1b @ count not zero r-shift
85 orr r0, r0, r4, lsl
86 orr r0, r0,
87 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
88
89 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
90 ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
91 cmp r3,
92 moveq r0,
93 beq 2f
94 mov r4,
951: add r4, r4,
96 movs r3, r3, lsr
97 bne 1b @ count not zero r-shift
98 orr r0, r0, r4, lsl
99 orr r0, r0,
1002: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
101
102 mov r0,
103 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
104#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
105 mov r0,
106#else
107 mov r0,
108#endif
109 mcr p15, 0, r0, c3, c0
110
111 mov r0,
112 sub r0, r0,
113 mcr p15, 0, r0, c5, c0 @ all read/write access
114
115 mrc p15, 0, r0, c1, c0 @ get control register
116 bic r0, r0,
117 @ need some benchmark
118 orr r0, r0,
119
120 mov pc, lr
121
122 .size __arm740_setup, . - __arm740_setup
123
124 __INITDATA
125
126 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
127 define_processor_functions arm740, dabort=v4t_late_abort, pabort=legacy_pabort, nommu=1
128
129 .section ".rodata"
130
131 string cpu_arch_name, "armv4"
132 string cpu_elf_name, "v4"
133 string cpu_arm740_name, "ARM740T"
134
135 .align
136
137 .section ".proc.info.init",
138 .type __arm740_proc_info,
139__arm740_proc_info:
140 .long 0x41807400
141 .long 0xfffffff0
142 .long 0
143 .long 0
144 b __arm740_setup
145 .long cpu_arch_name
146 .long cpu_elf_name
147 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
148 .long cpu_arm740_name
149 .long arm740_processor_functions
150 .long 0
151 .long 0
152 .long v4_cache_fns @ cache model
153 .size __arm740_proc_info, . - __arm740_proc_info
154