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11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/assembler.h>
14#include <asm/hwcap.h>
15#include <asm/pgtable-hwdef.h>
16#include <asm/pgtable.h>
17#include <asm/ptrace.h>
18#include "proc-macros.S"
19
20
21#define CACHE_DLINESIZE 16
22#define CACHE_DSEGMENTS 4
23#define CACHE_DENTRIES 64
24
25 .text
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31
32ENTRY(cpu_arm940_proc_init)
33ENTRY(cpu_arm940_switch_mm)
34 mov pc, lr
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38
39ENTRY(cpu_arm940_proc_fin)
40 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
41 bic r0, r0,
42 bic r0, r0,
43 mcr p15, 0, r0, c1, c0, 0 @ disable caches
44 mov pc, lr
45
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49
50
51 .pushsection .idmap.text, "ax"
52ENTRY(cpu_arm940_reset)
53 mov ip,
54 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
55 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
56 mcr p15, 0, ip, c7, c10, 4 @ drain WB
57 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
58 bic ip, ip,
59 bic ip, ip,
60 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
61 mov pc, r0
62ENDPROC(cpu_arm940_reset)
63 .popsection
64
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66
67
68 .align 5
69ENTRY(cpu_arm940_do_idle)
70 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
71 mov pc, lr
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78ENTRY(arm940_flush_icache_all)
79 mov r0,
80 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
81 mov pc, lr
82ENDPROC(arm940_flush_icache_all)
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87ENTRY(arm940_flush_user_cache_all)
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95ENTRY(arm940_flush_kern_cache_all)
96 mov r2,
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109ENTRY(arm940_flush_user_cache_range)
110 mov ip,
111#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
112 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
113#else
114 mov r1,
1151: orr r3, r1,
1162: mcr p15, 0, r3, c7, c14, 2 @ clean/flush D index
117 subs r3, r3,
118 bcs 2b @ entries 63 to 0
119 subs r1, r1,
120 bcs 1b @ segments 3 to 0
121#endif
122 tst r2,
123 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
124 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
125 mov pc, lr
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137ENTRY(arm940_coherent_kern_range)
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150ENTRY(arm940_coherent_user_range)
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162ENTRY(arm940_flush_kern_dcache_area)
163 mov r0,
164 mov r1,
1651: orr r3, r1,
1662: mcr p15, 0, r3, c7, c14, 2 @ clean/flush D index
167 subs r3, r3,
168 bcs 2b @ entries 63 to 0
169 subs r1, r1,
170 bcs 1b @ segments 7 to 0
171 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
172 mcr p15, 0, r0, c7, c10, 4 @ drain WB
173 mov pc, lr
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184arm940_dma_inv_range:
185 mov ip,
186 mov r1,
1871: orr r3, r1,
1882: mcr p15, 0, r3, c7, c6, 2 @ flush D entry
189 subs r3, r3,
190 bcs 2b @ entries 63 to 0
191 subs r1, r1,
192 bcs 1b @ segments 7 to 0
193 mcr p15, 0, ip, c7, c10, 4 @ drain WB
194 mov pc, lr
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205arm940_dma_clean_range:
206ENTRY(cpu_arm940_dcache_clean_area)
207 mov ip,
208#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
209 mov r1,
2101: orr r3, r1,
2112: mcr p15, 0, r3, c7, c10, 2 @ clean D entry
212 subs r3, r3,
213 bcs 2b @ entries 63 to 0
214 subs r1, r1,
215 bcs 1b @ segments 7 to 0
216#endif
217 mcr p15, 0, ip, c7, c10, 4 @ drain WB
218 mov pc, lr
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229ENTRY(arm940_dma_flush_range)
230 mov ip,
231 mov r1,
2321: orr r3, r1,
2332:
234#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
235 mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry
236#else
237 mcr p15, 0, r3, c7, c6, 2 @ invalidate D entry
238#endif
239 subs r3, r3,
240 bcs 2b @ entries 63 to 0
241 subs r1, r1,
242 bcs 1b @ segments 7 to 0
243 mcr p15, 0, ip, c7, c10, 4 @ drain WB
244 mov pc, lr
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252ENTRY(arm940_dma_map_area)
253 add r1, r1, r0
254 cmp r2,
255 beq arm940_dma_clean_range
256 bcs arm940_dma_inv_range
257 b arm940_dma_flush_range
258ENDPROC(arm940_dma_map_area)
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266ENTRY(arm940_dma_unmap_area)
267 mov pc, lr
268ENDPROC(arm940_dma_unmap_area)
269
270 .globl arm940_flush_kern_cache_louis
271 .equ arm940_flush_kern_cache_louis, arm940_flush_kern_cache_all
272
273 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
274 define_cache_functions arm940
275
276 __CPUINIT
277
278 .type __arm940_setup,
279__arm940_setup:
280 mov r0,
281 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
282 mcr p15, 0, r0, c7, c6, 0 @ invalidate D cache
283 mcr p15, 0, r0, c7, c10, 4 @ drain WB
284
285 mcr p15, 0, r0, c6, c3, 0 @ disable data area 3~7
286 mcr p15, 0, r0, c6, c4, 0
287 mcr p15, 0, r0, c6, c5, 0
288 mcr p15, 0, r0, c6, c6, 0
289 mcr p15, 0, r0, c6, c7, 0
290
291 mcr p15, 0, r0, c6, c3, 1 @ disable instruction area 3~7
292 mcr p15, 0, r0, c6, c4, 1
293 mcr p15, 0, r0, c6, c5, 1
294 mcr p15, 0, r0, c6, c6, 1
295 mcr p15, 0, r0, c6, c7, 1
296
297 mov r0,
298 mcr p15, 0, r0, c6, c0, 0 @ set area 0, default
299 mcr p15, 0, r0, c6, c0, 1
300
301 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
302 ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
303 mov r2,
3041: add r2, r2,
305 mov r1, r1, lsr
306 bne 1b @ count not zero r-shift
307 orr r0, r0, r2, lsl
308 orr r0, r0,
309 mcr p15, 0, r0, c6, c1, 0 @ set area 1, RAM
310 mcr p15, 0, r0, c6, c1, 1
311
312 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
313 ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
314 mov r2,
3151: add r2, r2,
316 mov r1, r1, lsr
317 bne 1b @ count not zero r-shift
318 orr r0, r0, r2, lsl
319 orr r0, r0,
320 mcr p15, 0, r0, c6, c2, 0 @ set area 2, ROM/FLASH
321 mcr p15, 0, r0, c6, c2, 1
322
323 mov r0,
324 mcr p15, 0, r0, c2, c0, 0 @ Region 1&2 cacheable
325 mcr p15, 0, r0, c2, c0, 1
326#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
327 mov r0,
328#else
329 mov r0,
330#endif
331 mcr p15, 0, r0, c3, c0, 0
332
333 mov r0,
334 sub r0, r0,
335 mcr p15, 0, r0, c5, c0, 0 @ all read/write access
336 mcr p15, 0, r0, c5, c0, 1
337
338 mrc p15, 0, r0, c1, c0 @ get control register
339 orr r0, r0,
340 orr r0, r0,
341
342 mov pc, lr
343
344 .size __arm940_setup, . - __arm940_setup
345
346 __INITDATA
347
348 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
349 define_processor_functions arm940, dabort=nommu_early_abort, pabort=legacy_pabort, nommu=1
350
351 .section ".rodata"
352
353 string cpu_arch_name, "armv4t"
354 string cpu_elf_name, "v4"
355 string cpu_arm940_name, "ARM940T"
356
357 .align
358
359 .section ".proc.info.init",
360
361 .type __arm940_proc_info,
362__arm940_proc_info:
363 .long 0x41009400
364 .long 0xff00fff0
365 .long 0
366 b __arm940_setup
367 .long cpu_arch_name
368 .long cpu_elf_name
369 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
370 .long cpu_arm940_name
371 .long arm940_processor_functions
372 .long 0
373 .long 0
374 .long arm940_cache_fns
375 .size __arm940_proc_info, . - __arm940_proc_info
376
377