LXR linux/arch/blackfin/kernel/entry.S

   1/*
   2 * Copyright 2004-2009 Analog Devices Inc.
   3 *
   4 * Licensed under the GPL-2 or later
   5 */
   6
   7#include <linux/linkage.h>
   8#include <asm/thread_info.h>
   9#include <asm/errno.h>
  10#include <asm/blackfin.h>
  11#include <asm/asm-offsets.h>
  12
  13#include <asm/context.S>
  14
  15#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
  16.section .l1.text
  17#else
  18.text
  19#endif
  20
  21ENTRY(_ret_from_fork)
  22#ifdef CONFIG_IPIPE
  23        /*
  24         * Hw IRQs are off on entry, and we don't want the scheduling tail
  25         * code to starve high priority domains from interrupts while it
  26         * runs. Therefore we first stall the root stage to have the
  27         * virtual interrupt state reflect IMASK.
  28         */
  29        p0.l = ___ipipe_root_status;
  30        p0.h = ___ipipe_root_status;
  31        r4 = [p0];
  32        bitset(r4, 0);
  33        [p0] = r4;
  34        /*
  35         * Then we may enable hw IRQs, allowing preemption from high
  36         * priority domains. schedule_tail() will do local_irq_enable()
  37         * since Blackfin does not define __ARCH_WANT_UNLOCKED_CTXSW, so
  38         * there is no need to unstall the root domain by ourselves
  39         * afterwards.
  40         */
  41        p0.l = _bfin_irq_flags;
  42        p0.h = _bfin_irq_flags;
  43        r4 = [p0];
  44        sti r4;
  45#endif /* CONFIG_IPIPE */
  46        SP += -12;
  47        pseudo_long_call _schedule_tail, p5;
  48        SP += 12;
  49        p1 = [sp++];
  50        r0 = [sp++];
  51        cc = p1 == 0;
  52        if cc jump .Lfork;
  53        sp += -12;
  54        call (p1);
  55        sp += 12;
  56.Lfork:
  57        RESTORE_CONTEXT
  58        rti;
  59ENDPROC(_ret_from_fork)
  60