linux/arch/blackfin/mach-bf527/boards/ezkit.c
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   1/*
   2 * Copyright 2004-2009 Analog Devices Inc.
   3 *                2005 National ICT Australia (NICTA)
   4 *                      Aidan Williams <aidan@nicta.com.au>
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <linux/device.h>
  10#include <linux/export.h>
  11#include <linux/platform_device.h>
  12#include <linux/mtd/mtd.h>
  13#include <linux/mtd/partitions.h>
  14#include <linux/mtd/physmap.h>
  15#include <linux/spi/spi.h>
  16#include <linux/spi/flash.h>
  17#include <linux/i2c.h>
  18#include <linux/irq.h>
  19#include <linux/interrupt.h>
  20#include <linux/usb/musb.h>
  21#include <linux/leds.h>
  22#include <linux/input.h>
  23#include <asm/dma.h>
  24#include <asm/bfin5xx_spi.h>
  25#include <asm/reboot.h>
  26#include <asm/nand.h>
  27#include <asm/portmux.h>
  28#include <asm/dpmc.h>
  29#include <linux/spi/ad7877.h>
  30#include <asm/bfin_sport.h>
  31
  32/*
  33 * Name the Board for the /proc/cpuinfo
  34 */
  35#ifdef CONFIG_BFIN527_EZKIT_V2
  36const char bfin_board_name[] = "ADI BF527-EZKIT V2";
  37#else
  38const char bfin_board_name[] = "ADI BF527-EZKIT";
  39#endif
  40
  41/*
  42 *  Driver needs to know address, irq and flag pin.
  43 */
  44
  45#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  46#include <linux/usb/isp1760.h>
  47static struct resource bfin_isp1760_resources[] = {
  48        [0] = {
  49                .start  = 0x203C0000,
  50                .end    = 0x203C0000 + 0x000fffff,
  51                .flags  = IORESOURCE_MEM,
  52        },
  53        [1] = {
  54                .start  = IRQ_PF7,
  55                .end    = IRQ_PF7,
  56                .flags  = IORESOURCE_IRQ,
  57        },
  58};
  59
  60static struct isp1760_platform_data isp1760_priv = {
  61        .is_isp1761 = 0,
  62        .bus_width_16 = 1,
  63        .port1_otg = 0,
  64        .analog_oc = 0,
  65        .dack_polarity_high = 0,
  66        .dreq_polarity_high = 0,
  67};
  68
  69static struct platform_device bfin_isp1760_device = {
  70        .name           = "isp1760",
  71        .id             = 0,
  72        .dev = {
  73                .platform_data = &isp1760_priv,
  74        },
  75        .num_resources  = ARRAY_SIZE(bfin_isp1760_resources),
  76        .resource       = bfin_isp1760_resources,
  77};
  78#endif
  79
  80#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  81static struct resource musb_resources[] = {
  82        [0] = {
  83                .start  = 0xffc03800,
  84                .end    = 0xffc03cff,
  85                .flags  = IORESOURCE_MEM,
  86        },
  87        [1] = { /* general IRQ */
  88                .start  = IRQ_USB_INT0,
  89                .end    = IRQ_USB_INT0,
  90                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  91                .name   = "mc"
  92        },
  93        [2] = { /* DMA IRQ */
  94                .start  = IRQ_USB_DMA,
  95                .end    = IRQ_USB_DMA,
  96                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  97                .name   = "dma"
  98        },
  99};
 100
 101static struct musb_hdrc_config musb_config = {
 102        .multipoint     = 0,
 103        .dyn_fifo       = 0,
 104        .soft_con       = 1,
 105        .dma            = 1,
 106        .num_eps        = 8,
 107        .dma_channels   = 8,
 108        .gpio_vrsel     = GPIO_PG13,
 109        /* Some custom boards need to be active low, just set it to "0"
 110         * if it is the case.
 111         */
 112        .gpio_vrsel_active      = 1,
 113        .clkin          = 24,           /* musb CLKIN in MHZ */
 114};
 115
 116static struct musb_hdrc_platform_data musb_plat = {
 117#if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
 118        .mode           = MUSB_OTG,
 119#elif defined(CONFIG_USB_MUSB_HDRC)
 120        .mode           = MUSB_HOST,
 121#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 122        .mode           = MUSB_PERIPHERAL,
 123#endif
 124        .config         = &musb_config,
 125};
 126
 127static u64 musb_dmamask = ~(u32)0;
 128
 129static struct platform_device musb_device = {
 130        .name           = "musb-blackfin",
 131        .id             = 0,
 132        .dev = {
 133                .dma_mask               = &musb_dmamask,
 134                .coherent_dma_mask      = 0xffffffff,
 135                .platform_data          = &musb_plat,
 136        },
 137        .num_resources  = ARRAY_SIZE(musb_resources),
 138        .resource       = musb_resources,
 139};
 140#endif
 141
 142#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
 143
 144static struct resource bf52x_t350mcqb_resources[] = {
 145        {
 146                .start = IRQ_PPI_ERROR,
 147                .end = IRQ_PPI_ERROR,
 148                .flags = IORESOURCE_IRQ,
 149        },
 150};
 151
 152static struct platform_device bf52x_t350mcqb_device = {
 153        .name           = "bfin-t350mcqb",
 154        .id             = -1,
 155        .num_resources  = ARRAY_SIZE(bf52x_t350mcqb_resources),
 156        .resource       = bf52x_t350mcqb_resources,
 157};
 158#endif
 159
 160#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 161#include <asm/bfin-lq035q1.h>
 162
 163static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 164        .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 165        .ppi_mode = USE_RGB565_8_BIT_PPI,
 166};
 167
 168static struct resource bfin_lq035q1_resources[] = {
 169        {
 170                .start = IRQ_PPI_ERROR,
 171                .end = IRQ_PPI_ERROR,
 172                .flags = IORESOURCE_IRQ,
 173        },
 174};
 175
 176static struct platform_device bfin_lq035q1_device = {
 177        .name           = "bfin-lq035q1",
 178        .id             = -1,
 179        .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 180        .resource       = bfin_lq035q1_resources,
 181        .dev            = {
 182                .platform_data = &bfin_lq035q1_data,
 183        },
 184};
 185#endif
 186
 187#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 188static struct mtd_partition ezkit_partitions[] = {
 189        {
 190                .name       = "bootloader(nor)",
 191                .size       = 0x40000,
 192                .offset     = 0,
 193        }, {
 194                .name       = "linux kernel(nor)",
 195                .size       = 0x1C0000,
 196                .offset     = MTDPART_OFS_APPEND,
 197        }, {
 198                .name       = "file system(nor)",
 199                .size       = MTDPART_SIZ_FULL,
 200                .offset     = MTDPART_OFS_APPEND,
 201        }
 202};
 203
 204static struct physmap_flash_data ezkit_flash_data = {
 205        .width      = 2,
 206        .parts      = ezkit_partitions,
 207        .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 208};
 209
 210static struct resource ezkit_flash_resource = {
 211        .start = 0x20000000,
 212        .end   = 0x203fffff,
 213        .flags = IORESOURCE_MEM,
 214};
 215
 216static struct platform_device ezkit_flash_device = {
 217        .name          = "physmap-flash",
 218        .id            = 0,
 219        .dev = {
 220                .platform_data = &ezkit_flash_data,
 221        },
 222        .num_resources = 1,
 223        .resource      = &ezkit_flash_resource,
 224};
 225#endif
 226
 227#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 228static struct mtd_partition partition_info[] = {
 229        {
 230                .name = "bootloader(nand)",
 231                .offset = 0,
 232                .size = 0x40000,
 233        }, {
 234                .name = "linux kernel(nand)",
 235                .offset = MTDPART_OFS_APPEND,
 236                .size = 4 * 1024 * 1024,
 237        },
 238        {
 239                .name = "file system(nand)",
 240                .offset = MTDPART_OFS_APPEND,
 241                .size = MTDPART_SIZ_FULL,
 242        },
 243};
 244
 245static struct bf5xx_nand_platform bf5xx_nand_platform = {
 246        .data_width = NFC_NWIDTH_8,
 247        .partitions = partition_info,
 248        .nr_partitions = ARRAY_SIZE(partition_info),
 249        .rd_dly = 3,
 250        .wr_dly = 3,
 251};
 252
 253static struct resource bf5xx_nand_resources[] = {
 254        {
 255                .start = NFC_CTL,
 256                .end = NFC_DATA_RD + 2,
 257                .flags = IORESOURCE_MEM,
 258        },
 259        {
 260                .start = CH_NFC,
 261                .end = CH_NFC,
 262                .flags = IORESOURCE_IRQ,
 263        },
 264};
 265
 266static struct platform_device bf5xx_nand_device = {
 267        .name = "bf5xx-nand",
 268        .id = 0,
 269        .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 270        .resource = bf5xx_nand_resources,
 271        .dev = {
 272                .platform_data = &bf5xx_nand_platform,
 273        },
 274};
 275#endif
 276
 277#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 278static struct resource bfin_pcmcia_cf_resources[] = {
 279        {
 280                .start = 0x20310000, /* IO PORT */
 281                .end = 0x20312000,
 282                .flags = IORESOURCE_MEM,
 283        }, {
 284                .start = 0x20311000, /* Attribute Memory */
 285                .end = 0x20311FFF,
 286                .flags = IORESOURCE_MEM,
 287        }, {
 288                .start = IRQ_PF4,
 289                .end = IRQ_PF4,
 290                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 291        }, {
 292                .start = 6, /* Card Detect PF6 */
 293                .end = 6,
 294                .flags = IORESOURCE_IRQ,
 295        },
 296};
 297
 298static struct platform_device bfin_pcmcia_cf_device = {
 299        .name = "bfin_cf_pcmcia",
 300        .id = -1,
 301        .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
 302        .resource = bfin_pcmcia_cf_resources,
 303};
 304#endif
 305
 306#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 307static struct platform_device rtc_device = {
 308        .name = "rtc-bfin",
 309        .id   = -1,
 310};
 311#endif
 312
 313#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 314#include <linux/smc91x.h>
 315
 316static struct smc91x_platdata smc91x_info = {
 317        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 318        .leda = RPC_LED_100_10,
 319        .ledb = RPC_LED_TX_RX,
 320};
 321
 322static struct resource smc91x_resources[] = {
 323        {
 324                .name = "smc91x-regs",
 325                .start = 0x20300300,
 326                .end = 0x20300300 + 16,
 327                .flags = IORESOURCE_MEM,
 328        }, {
 329
 330                .start = IRQ_PF7,
 331                .end = IRQ_PF7,
 332                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 333        },
 334};
 335static struct platform_device smc91x_device = {
 336        .name = "smc91x",
 337        .id = 0,
 338        .num_resources = ARRAY_SIZE(smc91x_resources),
 339        .resource = smc91x_resources,
 340        .dev    = {
 341                .platform_data  = &smc91x_info,
 342        },
 343};
 344#endif
 345
 346#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
 347static struct resource dm9000_resources[] = {
 348        [0] = {
 349                .start  = 0x203FB800,
 350                .end    = 0x203FB800 + 1,
 351                .flags  = IORESOURCE_MEM,
 352        },
 353        [1] = {
 354                .start  = 0x203FB800 + 4,
 355                .end    = 0x203FB800 + 5,
 356                .flags  = IORESOURCE_MEM,
 357        },
 358        [2] = {
 359                .start  = IRQ_PF9,
 360                .end    = IRQ_PF9,
 361                .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
 362        },
 363};
 364
 365static struct platform_device dm9000_device = {
 366        .name           = "dm9000",
 367        .id             = -1,
 368        .num_resources  = ARRAY_SIZE(dm9000_resources),
 369        .resource       = dm9000_resources,
 370};
 371#endif
 372
 373#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 374#include <linux/bfin_mac.h>
 375static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 376
 377static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 378        {
 379                .addr = 1,
 380                .irq = IRQ_MAC_PHYINT,
 381        },
 382};
 383
 384static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 385        .phydev_number = 1,
 386        .phydev_data = bfin_phydev_data,
 387        .phy_mode = PHY_INTERFACE_MODE_RMII,
 388        .mac_peripherals = bfin_mac_peripherals,
 389};
 390
 391static struct platform_device bfin_mii_bus = {
 392        .name = "bfin_mii_bus",
 393        .dev = {
 394                .platform_data = &bfin_mii_bus_data,
 395        }
 396};
 397
 398static struct platform_device bfin_mac_device = {
 399        .name = "bfin_mac",
 400        .dev = {
 401                .platform_data = &bfin_mii_bus,
 402        }
 403};
 404#endif
 405
 406#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 407static struct resource net2272_bfin_resources[] = {
 408        {
 409                .start = 0x20300000,
 410                .end = 0x20300000 + 0x100,
 411                .flags = IORESOURCE_MEM,
 412        }, {
 413                .start = 1,
 414                .flags = IORESOURCE_BUS,
 415        }, {
 416                .start = IRQ_PF7,
 417                .end = IRQ_PF7,
 418                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 419        },
 420};
 421
 422static struct platform_device net2272_bfin_device = {
 423        .name = "net2272",
 424        .id = -1,
 425        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 426        .resource = net2272_bfin_resources,
 427};
 428#endif
 429
 430#if defined(CONFIG_MTD_M25P80) \
 431        || defined(CONFIG_MTD_M25P80_MODULE)
 432static struct mtd_partition bfin_spi_flash_partitions[] = {
 433        {
 434                .name = "bootloader(spi)",
 435                .size = 0x00040000,
 436                .offset = 0,
 437                .mask_flags = MTD_CAP_ROM
 438        }, {
 439                .name = "linux kernel(spi)",
 440                .size = MTDPART_SIZ_FULL,
 441                .offset = MTDPART_OFS_APPEND,
 442        }
 443};
 444
 445static struct flash_platform_data bfin_spi_flash_data = {
 446        .name = "m25p80",
 447        .parts = bfin_spi_flash_partitions,
 448        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 449        .type = "m25p16",
 450};
 451
 452/* SPI flash chip (m25p64) */
 453static struct bfin5xx_spi_chip spi_flash_chip_info = {
 454        .enable_dma = 0,         /* use dma transfer with this chip*/
 455};
 456#endif
 457
 458#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 459static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 460        .enable_dma = 0,
 461};
 462#endif
 463
 464#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 465static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 466        .model                  = 7877,
 467        .vref_delay_usecs       = 50,   /* internal, no capacitor */
 468        .x_plate_ohms           = 419,
 469        .y_plate_ohms           = 486,
 470        .pressure_max           = 1000,
 471        .pressure_min           = 0,
 472        .stopacq_polarity       = 1,
 473        .first_conversion_delay = 3,
 474        .acquisition_time       = 1,
 475        .averaging              = 1,
 476        .pen_down_acc_interval  = 1,
 477};
 478#endif
 479
 480#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 481#include <linux/spi/ad7879.h>
 482static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 483        .model                  = 7879, /* Model = AD7879 */
 484        .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 485        .pressure_max           = 10000,
 486        .pressure_min           = 0,
 487        .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 488        .acquisition_time       = 1,    /* 4us acquisition time per sample */
 489        .median                 = 2,    /* do 8 measurements */
 490        .averaging              = 1,    /* take the average of 4 middle samples */
 491        .pen_down_acc_interval  = 255,  /* 9.4 ms */
 492        .gpio_export            = 0,    /* Export GPIO to gpiolib */
 493};
 494#endif
 495
 496#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
 497        defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 498
 499static const u16 bfin_snd_pin[][7] = {
 500        {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 501                P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
 502        {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 503                P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_TFS, 0},
 504};
 505
 506static struct bfin_snd_platform_data bfin_snd_data[] = {
 507        {
 508                .pin_req = &bfin_snd_pin[0][0],
 509        },
 510        {
 511                .pin_req = &bfin_snd_pin[1][0],
 512        },
 513};
 514
 515#define BFIN_SND_RES(x) \
 516        [x] = { \
 517                { \
 518                        .start = SPORT##x##_TCR1, \
 519                        .end = SPORT##x##_TCR1, \
 520                        .flags = IORESOURCE_MEM \
 521                }, \
 522                { \
 523                        .start = CH_SPORT##x##_RX, \
 524                        .end = CH_SPORT##x##_RX, \
 525                        .flags = IORESOURCE_DMA, \
 526                }, \
 527                { \
 528                        .start = CH_SPORT##x##_TX, \
 529                        .end = CH_SPORT##x##_TX, \
 530                        .flags = IORESOURCE_DMA, \
 531                }, \
 532                { \
 533                        .start = IRQ_SPORT##x##_ERROR, \
 534                        .end = IRQ_SPORT##x##_ERROR, \
 535                        .flags = IORESOURCE_IRQ, \
 536                } \
 537        }
 538
 539static struct resource bfin_snd_resources[][4] = {
 540        BFIN_SND_RES(0),
 541        BFIN_SND_RES(1),
 542};
 543#endif
 544
 545#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 546static struct platform_device bfin_i2s_pcm = {
 547        .name = "bfin-i2s-pcm-audio",
 548        .id = -1,
 549};
 550#endif
 551
 552#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 553static struct platform_device bfin_tdm_pcm = {
 554        .name = "bfin-tdm-pcm-audio",
 555        .id = -1,
 556};
 557#endif
 558
 559#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
 560static struct platform_device bfin_ac97_pcm = {
 561        .name = "bfin-ac97-pcm-audio",
 562        .id = -1,
 563};
 564#endif
 565
 566#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 567static struct platform_device bfin_i2s = {
 568        .name = "bfin-i2s",
 569        .id = CONFIG_SND_BF5XX_SPORT_NUM,
 570        .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
 571        .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
 572        .dev = {
 573                .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
 574        },
 575};
 576#endif
 577
 578#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 579static struct platform_device bfin_tdm = {
 580        .name = "bfin-tdm",
 581        .id = CONFIG_SND_BF5XX_SPORT_NUM,
 582        .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
 583        .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
 584        .dev = {
 585                .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
 586        },
 587};
 588#endif
 589
 590#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
 591                || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
 592static const char * const ad1836_link[] = {
 593        "bfin-tdm.0",
 594        "spi0.4",
 595};
 596static struct platform_device bfin_ad1836_machine = {
 597        .name = "bfin-snd-ad1836",
 598        .id = -1,
 599        .dev = {
 600                .platform_data = (void *)ad1836_link,
 601        },
 602};
 603#endif
 604
 605static struct spi_board_info bfin_spi_board_info[] __initdata = {
 606#if defined(CONFIG_MTD_M25P80) \
 607        || defined(CONFIG_MTD_M25P80_MODULE)
 608        {
 609                /* the modalias must be the same as spi device driver name */
 610                .modalias = "m25p80", /* Name of spi_driver for this device */
 611                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 612                .bus_num = 0, /* Framework bus number */
 613                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 614                .platform_data = &bfin_spi_flash_data,
 615                .controller_data = &spi_flash_chip_info,
 616                .mode = SPI_MODE_3,
 617        },
 618#endif
 619
 620#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
 621        || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
 622        {
 623                .modalias = "ad183x",
 624                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 625                .bus_num = 0,
 626                .chip_select = 4,
 627                .platform_data = "ad1836",
 628                .mode = SPI_MODE_3,
 629        },
 630#endif
 631#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 632        {
 633                .modalias = "mmc_spi",
 634                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 635                .bus_num = 0,
 636                .chip_select = 3,
 637                .controller_data = &mmc_spi_chip_info,
 638                .mode = SPI_MODE_0,
 639        },
 640#endif
 641
 642#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 643        {
 644                .modalias               = "ad7877",
 645                .platform_data          = &bfin_ad7877_ts_info,
 646                .irq                    = IRQ_PF8,
 647                .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 648                .bus_num        = 0,
 649                .chip_select  = 2,
 650        },
 651#endif
 652#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 653        {
 654                .modalias = "ad7879",
 655                .platform_data = &bfin_ad7879_ts_info,
 656                .irq = IRQ_PF8,
 657                .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 658                .bus_num = 0,
 659                .chip_select = 3,
 660                .mode = SPI_CPHA | SPI_CPOL,
 661        },
 662#endif
 663#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 664        {
 665                .modalias = "spidev",
 666                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 667                .bus_num = 0,
 668                .chip_select = 1,
 669        },
 670#endif
 671#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 672        {
 673                .modalias = "bfin-lq035q1-spi",
 674                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 675                .bus_num = 0,
 676                .chip_select = 7,
 677                .mode = SPI_CPHA | SPI_CPOL,
 678        },
 679#endif
 680};
 681
 682#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 683/* SPI controller data */
 684static struct bfin5xx_spi_master bfin_spi0_info = {
 685        .num_chipselect = 8,
 686        .enable_dma = 1,  /* master has the ability to do dma transfer */
 687        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 688};
 689
 690/* SPI (0) */
 691static struct resource bfin_spi0_resource[] = {
 692        [0] = {
 693                .start = SPI0_REGBASE,
 694                .end   = SPI0_REGBASE + 0xFF,
 695                .flags = IORESOURCE_MEM,
 696                },
 697        [1] = {
 698                .start = CH_SPI,
 699                .end   = CH_SPI,
 700                .flags = IORESOURCE_DMA,
 701        },
 702        [2] = {
 703                .start = IRQ_SPI,
 704                .end   = IRQ_SPI,
 705                .flags = IORESOURCE_IRQ,
 706        },
 707};
 708
 709static struct platform_device bfin_spi0_device = {
 710        .name = "bfin-spi",
 711        .id = 0, /* Bus number */
 712        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 713        .resource = bfin_spi0_resource,
 714        .dev = {
 715                .platform_data = &bfin_spi0_info, /* Passed to driver */
 716        },
 717};
 718#endif  /* spi master and devices */
 719
 720#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 721#ifdef CONFIG_SERIAL_BFIN_UART0
 722static struct resource bfin_uart0_resources[] = {
 723        {
 724                .start = UART0_THR,
 725                .end = UART0_GCTL+2,
 726                .flags = IORESOURCE_MEM,
 727        },
 728        {
 729                .start = IRQ_UART0_TX,
 730                .end = IRQ_UART0_TX,
 731                .flags = IORESOURCE_IRQ,
 732        },
 733        {
 734                .start = IRQ_UART0_RX,
 735                .end = IRQ_UART0_RX,
 736                .flags = IORESOURCE_IRQ,
 737        },
 738        {
 739                .start = IRQ_UART0_ERROR,
 740                .end = IRQ_UART0_ERROR,
 741                .flags = IORESOURCE_IRQ,
 742        },
 743        {
 744                .start = CH_UART0_TX,
 745                .end = CH_UART0_TX,
 746                .flags = IORESOURCE_DMA,
 747        },
 748        {
 749                .start = CH_UART0_RX,
 750                .end = CH_UART0_RX,
 751                .flags = IORESOURCE_DMA,
 752        },
 753};
 754
 755static unsigned short bfin_uart0_peripherals[] = {
 756        P_UART0_TX, P_UART0_RX, 0
 757};
 758
 759static struct platform_device bfin_uart0_device = {
 760        .name = "bfin-uart",
 761        .id = 0,
 762        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 763        .resource = bfin_uart0_resources,
 764        .dev = {
 765                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 766        },
 767};
 768#endif
 769#ifdef CONFIG_SERIAL_BFIN_UART1
 770static struct resource bfin_uart1_resources[] = {
 771        {
 772                .start = UART1_THR,
 773                .end = UART1_GCTL+2,
 774                .flags = IORESOURCE_MEM,
 775        },
 776        {
 777                .start = IRQ_UART1_TX,
 778                .end = IRQ_UART1_TX,
 779                .flags = IORESOURCE_IRQ,
 780        },
 781        {
 782                .start = IRQ_UART1_RX,
 783                .end = IRQ_UART1_RX,
 784                .flags = IORESOURCE_IRQ,
 785        },
 786        {
 787                .start = IRQ_UART1_ERROR,
 788                .end = IRQ_UART1_ERROR,
 789                .flags = IORESOURCE_IRQ,
 790        },
 791        {
 792                .start = CH_UART1_TX,
 793                .end = CH_UART1_TX,
 794                .flags = IORESOURCE_DMA,
 795        },
 796        {
 797                .start = CH_UART1_RX,
 798                .end = CH_UART1_RX,
 799                .flags = IORESOURCE_DMA,
 800        },
 801#ifdef CONFIG_BFIN_UART1_CTSRTS
 802        {       /* CTS pin */
 803                .start = GPIO_PF9,
 804                .end = GPIO_PF9,
 805                .flags = IORESOURCE_IO,
 806        },
 807        {       /* RTS pin */
 808                .start = GPIO_PF10,
 809                .end = GPIO_PF10,
 810                .flags = IORESOURCE_IO,
 811        },
 812#endif
 813};
 814
 815static unsigned short bfin_uart1_peripherals[] = {
 816        P_UART1_TX, P_UART1_RX, 0
 817};
 818
 819static struct platform_device bfin_uart1_device = {
 820        .name = "bfin-uart",
 821        .id = 1,
 822        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 823        .resource = bfin_uart1_resources,
 824        .dev = {
 825                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 826        },
 827};
 828#endif
 829#endif
 830
 831#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 832#ifdef CONFIG_BFIN_SIR0
 833static struct resource bfin_sir0_resources[] = {
 834        {
 835                .start = 0xFFC00400,
 836                .end = 0xFFC004FF,
 837                .flags = IORESOURCE_MEM,
 838        },
 839        {
 840                .start = IRQ_UART0_RX,
 841                .end = IRQ_UART0_RX+1,
 842                .flags = IORESOURCE_IRQ,
 843        },
 844        {
 845                .start = CH_UART0_RX,
 846                .end = CH_UART0_RX+1,
 847                .flags = IORESOURCE_DMA,
 848        },
 849};
 850
 851static struct platform_device bfin_sir0_device = {
 852        .name = "bfin_sir",
 853        .id = 0,
 854        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 855        .resource = bfin_sir0_resources,
 856};
 857#endif
 858#ifdef CONFIG_BFIN_SIR1
 859static struct resource bfin_sir1_resources[] = {
 860        {
 861                .start = 0xFFC02000,
 862                .end = 0xFFC020FF,
 863                .flags = IORESOURCE_MEM,
 864        },
 865        {
 866                .start = IRQ_UART1_RX,
 867                .end = IRQ_UART1_RX+1,
 868                .flags = IORESOURCE_IRQ,
 869        },
 870        {
 871                .start = CH_UART1_RX,
 872                .end = CH_UART1_RX+1,
 873                .flags = IORESOURCE_DMA,
 874        },
 875};
 876
 877static struct platform_device bfin_sir1_device = {
 878        .name = "bfin_sir",
 879        .id = 1,
 880        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 881        .resource = bfin_sir1_resources,
 882};
 883#endif
 884#endif
 885
 886#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 887static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
 888
 889static struct resource bfin_twi0_resource[] = {
 890        [0] = {
 891                .start = TWI0_REGBASE,
 892                .end   = TWI0_REGBASE,
 893                .flags = IORESOURCE_MEM,
 894        },
 895        [1] = {
 896                .start = IRQ_TWI,
 897                .end   = IRQ_TWI,
 898                .flags = IORESOURCE_IRQ,
 899        },
 900};
 901
 902static struct platform_device i2c_bfin_twi_device = {
 903        .name = "i2c-bfin-twi",
 904        .id = 0,
 905        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 906        .resource = bfin_twi0_resource,
 907        .dev = {
 908                .platform_data = &bfin_twi0_pins,
 909        },
 910};
 911#endif
 912
 913#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
 914#include <linux/mfd/adp5520.h>
 915
 916        /*
 917         *  ADP5520/5501 LEDs Data
 918         */
 919
 920static struct led_info adp5520_leds[] = {
 921        {
 922                .name = "adp5520-led1",
 923                .default_trigger = "none",
 924                .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
 925        },
 926};
 927
 928static struct adp5520_leds_platform_data adp5520_leds_data = {
 929        .num_leds = ARRAY_SIZE(adp5520_leds),
 930        .leds = adp5520_leds,
 931        .fade_in = ADP5520_FADE_T_600ms,
 932        .fade_out = ADP5520_FADE_T_600ms,
 933        .led_on_time = ADP5520_LED_ONT_600ms,
 934};
 935
 936        /*
 937         *  ADP5520 Keypad Data
 938         */
 939
 940static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
 941        [ADP5520_KEY(3, 3)]     = KEY_1,
 942        [ADP5520_KEY(2, 3)]     = KEY_2,
 943        [ADP5520_KEY(1, 3)]     = KEY_3,
 944        [ADP5520_KEY(0, 3)]     = KEY_UP,
 945        [ADP5520_KEY(3, 2)]     = KEY_4,
 946        [ADP5520_KEY(2, 2)]     = KEY_5,
 947        [ADP5520_KEY(1, 2)]     = KEY_6,
 948        [ADP5520_KEY(0, 2)]     = KEY_DOWN,
 949        [ADP5520_KEY(3, 1)]     = KEY_7,
 950        [ADP5520_KEY(2, 1)]     = KEY_8,
 951        [ADP5520_KEY(1, 1)]     = KEY_9,
 952        [ADP5520_KEY(0, 1)]     = KEY_DOT,
 953        [ADP5520_KEY(3, 0)]     = KEY_BACKSPACE,
 954        [ADP5520_KEY(2, 0)]     = KEY_0,
 955        [ADP5520_KEY(1, 0)]     = KEY_HELP,
 956        [ADP5520_KEY(0, 0)]     = KEY_ENTER,
 957};
 958
 959static struct adp5520_keys_platform_data adp5520_keys_data = {
 960        .rows_en_mask   = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
 961        .cols_en_mask   = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
 962        .keymap         = adp5520_keymap,
 963        .keymapsize     = ARRAY_SIZE(adp5520_keymap),
 964        .repeat         = 0,
 965};
 966
 967        /*
 968         *  ADP5520/5501 Multifunction Device Init Data
 969         */
 970
 971static struct adp5520_platform_data adp5520_pdev_data = {
 972        .leds = &adp5520_leds_data,
 973        .keys = &adp5520_keys_data,
 974};
 975
 976#endif
 977
 978static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 979#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 980        {
 981                I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 982        },
 983#endif
 984#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 985        {
 986                I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 987                .irq = IRQ_PF8,
 988        },
 989#endif
 990#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 991        {
 992                I2C_BOARD_INFO("bfin-adv7393", 0x2B),
 993        },
 994#endif
 995#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
 996        {
 997                I2C_BOARD_INFO("ad7879", 0x2C),
 998                .irq = IRQ_PF8,
 999                .platform_data = (void *)&bfin_ad7879_ts_info,
1000        },
1001#endif
1002#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1003        {
1004                I2C_BOARD_INFO("pmic-adp5520", 0x32),
1005                .irq = IRQ_PF9,
1006                .platform_data = (void *)&adp5520_pdev_data,
1007        },
1008#endif
1009#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1010        {
1011                I2C_BOARD_INFO("ssm2602", 0x1b),
1012        },
1013#endif
1014#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1015        {
1016                I2C_BOARD_INFO("ad5252", 0x2f),
1017        },
1018#endif
1019#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
1020        {
1021                I2C_BOARD_INFO("adau1373", 0x1A),
1022        },
1023#endif
1024};
1025
1026#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1027#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1028static struct resource bfin_sport0_uart_resources[] = {
1029        {
1030                .start = SPORT0_TCR1,
1031                .end = SPORT0_MRCS3+4,
1032                .flags = IORESOURCE_MEM,
1033        },
1034        {
1035                .start = IRQ_SPORT0_RX,
1036                .end = IRQ_SPORT0_RX+1,
1037                .flags = IORESOURCE_IRQ,
1038        },
1039        {
1040                .start = IRQ_SPORT0_ERROR,
1041                .end = IRQ_SPORT0_ERROR,
1042                .flags = IORESOURCE_IRQ,
1043        },
1044};
1045
1046static unsigned short bfin_sport0_peripherals[] = {
1047        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1048        P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
1049};
1050
1051static struct platform_device bfin_sport0_uart_device = {
1052        .name = "bfin-sport-uart",
1053        .id = 0,
1054        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1055        .resource = bfin_sport0_uart_resources,
1056        .dev = {
1057                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1058        },
1059};
1060#endif
1061#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1062static struct resource bfin_sport1_uart_resources[] = {
1063        {
1064                .start = SPORT1_TCR1,
1065                .end = SPORT1_MRCS3+4,
1066                .flags = IORESOURCE_MEM,
1067        },
1068        {
1069                .start = IRQ_SPORT1_RX,
1070                .end = IRQ_SPORT1_RX+1,
1071                .flags = IORESOURCE_IRQ,
1072        },
1073        {
1074                .start = IRQ_SPORT1_ERROR,
1075                .end = IRQ_SPORT1_ERROR,
1076                .flags = IORESOURCE_IRQ,
1077        },
1078};
1079
1080static unsigned short bfin_sport1_peripherals[] = {
1081        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1082        P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
1083};
1084
1085static struct platform_device bfin_sport1_uart_device = {
1086        .name = "bfin-sport-uart",
1087        .id = 1,
1088        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1089        .resource = bfin_sport1_uart_resources,
1090        .dev = {
1091                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1092        },
1093};
1094#endif
1095#endif
1096
1097#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1098#include <linux/gpio_keys.h>
1099
1100static struct gpio_keys_button bfin_gpio_keys_table[] = {
1101        {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1102        {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1103};
1104
1105static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1106        .buttons        = bfin_gpio_keys_table,
1107        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
1108};
1109
1110static struct platform_device bfin_device_gpiokeys = {
1111        .name      = "gpio-keys",
1112        .dev = {
1113                .platform_data = &bfin_gpio_keys_data,
1114        },
1115};
1116#endif
1117
1118#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1119#include <asm/bfin_rotary.h>
1120
1121static struct bfin_rotary_platform_data bfin_rotary_data = {
1122        /*.rotary_up_key     = KEY_UP,*/
1123        /*.rotary_down_key   = KEY_DOWN,*/
1124        .rotary_rel_code   = REL_WHEEL,
1125        .rotary_button_key = KEY_ENTER,
1126        .debounce          = 10,        /* 0..17 */
1127        .mode              = ROT_QUAD_ENC | ROT_DEBE,
1128        .pm_wakeup         = 1,
1129};
1130
1131static struct resource bfin_rotary_resources[] = {
1132        {
1133                .start = IRQ_CNT,
1134                .end = IRQ_CNT,
1135                .flags = IORESOURCE_IRQ,
1136        },
1137};
1138
1139static struct platform_device bfin_rotary_device = {
1140        .name           = "bfin-rotary",
1141        .id             = -1,
1142        .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
1143        .resource       = bfin_rotary_resources,
1144        .dev            = {
1145                .platform_data = &bfin_rotary_data,
1146        },
1147};
1148#endif
1149
1150static const unsigned int cclk_vlev_datasheet[] =
1151{
1152        VRPAIR(VLEV_100, 400000000),
1153        VRPAIR(VLEV_105, 426000000),
1154        VRPAIR(VLEV_110, 500000000),
1155        VRPAIR(VLEV_115, 533000000),
1156        VRPAIR(VLEV_120, 600000000),
1157};
1158
1159static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1160        .tuple_tab = cclk_vlev_datasheet,
1161        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1162        .vr_settling_time = 25 /* us */,
1163};
1164
1165static struct platform_device bfin_dpmc = {
1166        .name = "bfin dpmc",
1167        .dev = {
1168                .platform_data = &bfin_dmpc_vreg_data,
1169        },
1170};
1171
1172static struct platform_device *stamp_devices[] __initdata = {
1173
1174        &bfin_dpmc,
1175
1176#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1177        &bf5xx_nand_device,
1178#endif
1179
1180#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1181        &bfin_pcmcia_cf_device,
1182#endif
1183
1184#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1185        &rtc_device,
1186#endif
1187
1188#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1189        &bfin_isp1760_device,
1190#endif
1191
1192#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1193        &musb_device,
1194#endif
1195
1196#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1197        &smc91x_device,
1198#endif
1199
1200#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1201        &dm9000_device,
1202#endif
1203
1204#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
1205        &bfin_mii_bus,
1206        &bfin_mac_device,
1207#endif
1208
1209#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1210        &net2272_bfin_device,
1211#endif
1212
1213#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1214        &bfin_spi0_device,
1215#endif
1216
1217#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1218        &bf52x_t350mcqb_device,
1219#endif
1220
1221#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1222        &bfin_lq035q1_device,
1223#endif
1224
1225#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1226#ifdef CONFIG_SERIAL_BFIN_UART0
1227        &bfin_uart0_device,
1228#endif
1229#ifdef CONFIG_SERIAL_BFIN_UART1
1230        &bfin_uart1_device,
1231#endif
1232#endif
1233
1234#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1235#ifdef CONFIG_BFIN_SIR0
1236        &bfin_sir0_device,
1237#endif
1238#ifdef CONFIG_BFIN_SIR1
1239        &bfin_sir1_device,
1240#endif
1241#endif
1242
1243#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1244        &i2c_bfin_twi_device,
1245#endif
1246
1247#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1248#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1249        &bfin_sport0_uart_device,
1250#endif
1251#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1252        &bfin_sport1_uart_device,
1253#endif
1254#endif
1255
1256#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1257        &bfin_device_gpiokeys,
1258#endif
1259
1260#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1261        &bfin_rotary_device,
1262#endif
1263
1264#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1265        &ezkit_flash_device,
1266#endif
1267
1268#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1269        &bfin_i2s_pcm,
1270#endif
1271
1272#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1273        &bfin_tdm_pcm,
1274#endif
1275
1276#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1277        &bfin_ac97_pcm,
1278#endif
1279
1280#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1281        &bfin_i2s,
1282#endif
1283
1284#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1285        &bfin_tdm,
1286#endif
1287
1288#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
1289        defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1290        &bfin_ad1836_machine,
1291#endif
1292};
1293
1294static int __init ezkit_init(void)
1295{
1296        printk(KERN_INFO "%s(): registering device resources\n", __func__);
1297        i2c_register_board_info(0, bfin_i2c_board_info,
1298                                ARRAY_SIZE(bfin_i2c_board_info));
1299        platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
1300        spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1301        return 0;
1302}
1303
1304arch_initcall(ezkit_init);
1305
1306static struct platform_device *ezkit_early_devices[] __initdata = {
1307#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1308#ifdef CONFIG_SERIAL_BFIN_UART0
1309        &bfin_uart0_device,
1310#endif
1311#ifdef CONFIG_SERIAL_BFIN_UART1
1312        &bfin_uart1_device,
1313#endif
1314#endif
1315
1316#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1317#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1318        &bfin_sport0_uart_device,
1319#endif
1320#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1321        &bfin_sport1_uart_device,
1322#endif
1323#endif
1324};
1325
1326void __init native_machine_early_platform_add_devices(void)
1327{
1328        printk(KERN_INFO "register early platform devices\n");
1329        early_platform_add_devices(ezkit_early_devices,
1330                ARRAY_SIZE(ezkit_early_devices));
1331}
1332
1333void native_machine_restart(char *cmd)
1334{
1335        /* workaround reboot hang when booting from SPI */
1336        if ((bfin_read_SYSCR() & 0x7) == 0x3)
1337                bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
1338}
1339
1340int bfin_get_ether_addr(char *addr)
1341{
1342        /* the MAC is stored in OTP memory page 0xDF */
1343        u32 ret;
1344        u64 otp_mac;
1345        u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1346
1347        ret = otp_read(0xDF, 0x00, &otp_mac);
1348        if (!(ret & 0x1)) {
1349                char *otp_mac_p = (char *)&otp_mac;
1350                for (ret = 0; ret < 6; ++ret)
1351                        addr[ret] = otp_mac_p[5 - ret];
1352        }
1353        return 0;
1354}
1355EXPORT_SYMBOL(bfin_get_ether_addr);
1356