LXR linux/arch/ia64/pci/fixup.c

   1/*
   2 * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
   3 * Derived from fixup.c of i386 tree.
   4 */
   5
   6#include <linux/pci.h>
   7#include <linux/init.h>
   8
   9#include <asm/machvec.h>
  10
  11/*
  12 * Fixup to mark boot BIOS video selected by BIOS before it changes
  13 *
  14 * From information provided by "Jon Smirl" <jonsmirl@gmail.com>
  15 *
  16 * The standard boot ROM sequence for an x86 machine uses the BIOS
  17 * to select an initial video card for boot display. This boot video
  18 * card will have it's BIOS copied to C0000 in system RAM.
  19 * IORESOURCE_ROM_SHADOW is used to associate the boot video
  20 * card with this copy. On laptops this copy has to be used since
  21 * the main ROM may be compressed or combined with another image.
  22 * See pci_map_rom() for use of this flag. IORESOURCE_ROM_SHADOW
  23 * is marked here since the boot video device will be the only enabled
  24 * video device at this point.
  25 */
  26
  27static void pci_fixup_video(struct pci_dev *pdev)
  28{
  29        struct pci_dev *bridge;
  30        struct pci_bus *bus;
  31        u16 config;
  32
  33        if ((strcmp(ia64_platform_name, "dig") != 0)
  34            && (strcmp(ia64_platform_name, "hpzx1")  != 0))
  35                return;
  36        /* Maybe, this machine supports legacy memory map. */
  37
  38        if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  39                return;
  40
  41        /* Is VGA routed to us? */
  42        bus = pdev->bus;
  43        while (bus) {
  44                bridge = bus->self;
  45
  46                /*
  47                 * From information provided by
  48                 * "David Miller" <davem@davemloft.net>
  49                 * The bridge control register is valid for PCI header
  50                 * type BRIDGE, or CARDBUS. Host to PCI controllers use
  51                 * PCI header type NORMAL.
  52                 */
  53                if (bridge
  54                    &&((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE)
  55                       ||(bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) {
  56                        pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
  57                                                &config);
  58                        if (!(config & PCI_BRIDGE_CTL_VGA))
  59                                return;
  60                }
  61                bus = bus->parent;
  62        }
  63        pci_read_config_word(pdev, PCI_COMMAND, &config);
  64        if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
  65                pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;
  66                dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
  67        }
  68}
  69DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
  70