1/* 2** macints.h -- Macintosh Linux interrupt handling structs and prototypes 3** 4** Copyright 1997 by Michael Schmitz 5** 6** This file is subject to the terms and conditions of the GNU General Public 7** License. See the file COPYING in the main directory of this archive 8** for more details. 9** 10*/ 11 12#ifndef _ASM_MACINTS_H_ 13#define _ASM_MACINTS_H_ 14 15#include <asm/irq.h> 16 17/* Setting this prints debugging info for unclaimed interrupts */ 18 19#define DEBUG_SPURIOUS 20 21/* Setting this prints debugging info on each autovector interrupt */ 22 23/* #define DEBUG_IRQS */ 24 25/* Setting this prints debugging info on each Nubus interrupt */ 26 27/* #define DEBUG_NUBUS_INT */ 28 29/* Setting this prints debugging info on irqs as they enabled and disabled. */ 30 31/* #define DEBUG_IRQUSE */ 32 33/* 34 * Base IRQ number for all Mac68K interrupt sources. Each source 35 * has eight indexes (base -> base+7). 36 */ 37 38#define VIA1_SOURCE_BASE 8 39#define VIA2_SOURCE_BASE 16 40#define PSC3_SOURCE_BASE 24 41#define PSC4_SOURCE_BASE 32 42#define PSC5_SOURCE_BASE 40 43#define PSC6_SOURCE_BASE 48 44#define NUBUS_SOURCE_BASE 56 45#define BABOON_SOURCE_BASE 64 46 47/* 48 * Maximum IRQ number is BABOON_SOURCE_BASE + 7, 49 * giving us IRQs up through 71 50 */ 51 52#define NUM_MAC_SOURCES 72 53 54/* 55 * clean way to separate IRQ into its source and index 56 */ 57 58#define IRQ_SRC(irq) (irq >> 3) 59#define IRQ_IDX(irq) (irq & 7) 60 61/* VIA1 interrupts */ 62#define IRQ_VIA1_0 (8) /* one second int. */ 63#define IRQ_VIA1_1 (9) /* VBlank int. */ 64#define IRQ_MAC_VBL IRQ_VIA1_1 65#define IRQ_VIA1_2 (10) /* ADB SR shifts complete */ 66#define IRQ_MAC_ADB IRQ_VIA1_2 67#define IRQ_MAC_ADB_SR IRQ_VIA1_2 68#define IRQ_VIA1_3 (11) /* ADB SR CB2 ?? */ 69#define IRQ_MAC_ADB_SD IRQ_VIA1_3 70#define IRQ_VIA1_4 (12) /* ADB SR ext. clock pulse */ 71#define IRQ_MAC_ADB_CL IRQ_VIA1_4 72#define IRQ_VIA1_5 (13) 73#define IRQ_MAC_TIMER_2 IRQ_VIA1_5 74#define IRQ_VIA1_6 (14) 75#define IRQ_MAC_TIMER_1 IRQ_VIA1_6 76#define IRQ_VIA1_7 (15) 77 78/* VIA2/RBV interrupts */ 79#define IRQ_VIA2_0 (16) 80#define IRQ_MAC_SCSIDRQ IRQ_VIA2_0 81#define IRQ_VIA2_1 (17) 82#define IRQ_MAC_NUBUS IRQ_VIA2_1 83#define IRQ_VIA2_2 (18) 84#define IRQ_VIA2_3 (19) 85#define IRQ_MAC_SCSI IRQ_VIA2_3 86#define IRQ_VIA2_4 (20) 87#define IRQ_VIA2_5 (21) 88#define IRQ_VIA2_6 (22) 89#define IRQ_VIA2_7 (23) 90 91/* Level 3 (PSC, AV Macs only) interrupts */ 92#define IRQ_PSC3_0 (24) 93#define IRQ_MAC_MACE IRQ_PSC3_0 94#define IRQ_PSC3_1 (25) 95#define IRQ_PSC3_2 (26) 96#define IRQ_PSC3_3 (27) 97 98/* Level 4 (PSC, AV Macs only) interrupts */ 99#define IRQ_PSC4_0 (32) 100#define IRQ_PSC4_1 (33) 101#define IRQ_MAC_SCC_A IRQ_PSC4_1 102#define IRQ_PSC4_2 (34) 103#define IRQ_MAC_SCC_B IRQ_PSC4_2 104#define IRQ_PSC4_3 (35) 105#define IRQ_MAC_MACE_DMA IRQ_PSC4_3 106 107/* OSS Level 4 interrupts */ 108#define IRQ_MAC_SCC (33) 109 110/* Level 5 (PSC, AV Macs only) interrupts */ 111#define IRQ_PSC5_0 (40) 112#define IRQ_PSC5_1 (41) 113#define IRQ_PSC5_2 (42) 114#define IRQ_PSC5_3 (43) 115 116/* Level 6 (PSC, AV Macs only) interrupts */ 117#define IRQ_PSC6_0 (48) 118#define IRQ_PSC6_1 (49) 119#define IRQ_PSC6_2 (50) 120#define IRQ_PSC6_3 (51) 121 122/* Nubus interrupts (cascaded to VIA2) */ 123#define IRQ_NUBUS_9 (56) 124#define IRQ_NUBUS_A (57) 125#define IRQ_NUBUS_B (58) 126#define IRQ_NUBUS_C (59) 127#define IRQ_NUBUS_D (60) 128#define IRQ_NUBUS_E (61) 129#define IRQ_NUBUS_F (62) 130 131/* Baboon interrupts (cascaded to nubus slot $C) */ 132#define IRQ_BABOON_0 (64) 133#define IRQ_BABOON_1 (65) 134#define IRQ_BABOON_2 (66) 135#define IRQ_BABOON_3 (67) 136 137#define SLOT2IRQ(x) (x + 47) 138#define IRQ2SLOT(x) (x - 47) 139 140#define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */ 141#define INT_TICKS 246 /* to make sched_time = 99.902... HZ */ 142 143#endif /* asm/macints.h */ 144