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12#include <linux/init.h>
13#include <linux/string.h>
14#include <linux/seq_file.h>
15#include <linux/cpu.h>
16#include <linux/initrd.h>
17
18#include <linux/bug.h>
19#include <asm/cpuinfo.h>
20#include <linux/delay.h>
21#include <linux/io.h>
22#include <asm/page.h>
23#include <linux/param.h>
24#include <asm/pvr.h>
25#include <asm/sections.h>
26#include <asm/setup.h>
27
28static int show_cpuinfo(struct seq_file *m, void *v)
29{
30 int count = 0;
31 char *fpga_family = "Unknown";
32 char *cpu_ver = "Unknown";
33 int i;
34
35
36 for (i = 0; family_string_lookup[i].s != NULL; i++) {
37 if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
38 fpga_family = (char *)family_string_lookup[i].s;
39 break;
40 }
41 }
42
43
44 for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
45 if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
46 cpu_ver = (char *)cpu_ver_lookup[i].s;
47 break;
48 }
49 }
50
51 count = seq_printf(m,
52 "CPU-Family: MicroBlaze\n"
53 "FPGA-Arch: %s\n"
54 "CPU-Ver: %s, %s endian\n"
55 "CPU-MHz: %d.%02d\n"
56 "BogoMips: %lu.%02lu\n",
57 fpga_family,
58 cpu_ver,
59 cpuinfo.endian ? "little" : "big",
60 cpuinfo.cpu_clock_freq /
61 1000000,
62 cpuinfo.cpu_clock_freq %
63 1000000,
64 loops_per_jiffy / (500000 / HZ),
65 (loops_per_jiffy / (5000 / HZ)) % 100);
66
67 count += seq_printf(m,
68 "HW:\n Shift:\t\t%s\n"
69 " MSR:\t\t%s\n"
70 " PCMP:\t\t%s\n"
71 " DIV:\t\t%s\n",
72 (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
73 (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
74 (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
75 (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
76
77 count += seq_printf(m,
78 " MMU:\t\t%x\n",
79 cpuinfo.mmu);
80
81 count += seq_printf(m,
82 " MUL:\t\t%s\n"
83 " FPU:\t\t%s\n",
84 (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
85 (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
86 (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
87 (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
88
89 count += seq_printf(m,
90 " Exc:\t\t%s%s%s%s%s%s%s%s\n",
91 (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
92 (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
93 (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
94 (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
95 (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
96 (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
97 (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
98 (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
99
100 count += seq_printf(m,
101 "Stream-insns:\t%sprivileged\n",
102 cpuinfo.mmu_privins ? "un" : "");
103
104 if (cpuinfo.use_icache)
105 count += seq_printf(m,
106 "Icache:\t\t%ukB\tline length:\t%dB\n",
107 cpuinfo.icache_size >> 10,
108 cpuinfo.icache_line_length);
109 else
110 count += seq_printf(m, "Icache:\t\tno\n");
111
112 if (cpuinfo.use_dcache) {
113 count += seq_printf(m,
114 "Dcache:\t\t%ukB\tline length:\t%dB\n",
115 cpuinfo.dcache_size >> 10,
116 cpuinfo.dcache_line_length);
117 seq_printf(m, "Dcache-Policy:\t");
118 if (cpuinfo.dcache_wb)
119 count += seq_printf(m, "write-back\n");
120 else
121 count += seq_printf(m, "write-through\n");
122 } else
123 count += seq_printf(m, "Dcache:\t\tno\n");
124
125 count += seq_printf(m,
126 "HW-Debug:\t%s\n",
127 cpuinfo.hw_debug ? "yes" : "no");
128
129 count += seq_printf(m,
130 "PVR-USR1:\t%02x\n"
131 "PVR-USR2:\t%08x\n",
132 cpuinfo.pvr_user1,
133 cpuinfo.pvr_user2);
134
135 count += seq_printf(m, "Page size:\t%lu\n", PAGE_SIZE);
136 return 0;
137}
138
139static void *c_start(struct seq_file *m, loff_t *pos)
140{
141 int i = *pos;
142
143 return i < NR_CPUS ? (void *) (i + 1) : NULL;
144}
145
146static void *c_next(struct seq_file *m, void *v, loff_t *pos)
147{
148 ++*pos;
149 return c_start(m, pos);
150}
151
152static void c_stop(struct seq_file *m, void *v)
153{
154}
155
156const struct seq_operations cpuinfo_op = {
157 .start = c_start,
158 .next = c_next,
159 .stop = c_stop,
160 .show = show_cpuinfo,
161};
162
