LXR linux/arch/mips/loongson/fuloong-2e/irq.c

   1/*
   2 * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
   3 * Author: Fuxin Zhang, zhangfx@lemote.com
   4 *
   5 *  This program is free software; you can redistribute  it and/or modify it
   6 *  under  the terms of  the GNU General  Public License as published by the
   7 *  Free Software Foundation;  either version 2 of the  License, or (at your
   8 *  option) any later version.
   9 */
  10#include <linux/interrupt.h>
  11
  12#include <asm/irq_cpu.h>
  13#include <asm/i8259.h>
  14
  15#include <loongson.h>
  16
  17static void i8259_irqdispatch(void)
  18{
  19        int irq;
  20
  21        irq = i8259_irq();
  22        if (irq >= 0)
  23                do_IRQ(irq);
  24        else
  25                spurious_interrupt();
  26}
  27
  28asmlinkage void mach_irq_dispatch(unsigned int pending)
  29{
  30        if (pending & CAUSEF_IP7)
  31                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
  32        else if (pending & CAUSEF_IP6) /* perf counter loverflow */
  33                do_perfcnt_IRQ();
  34        else if (pending & CAUSEF_IP5)
  35                i8259_irqdispatch();
  36        else if (pending & CAUSEF_IP2)
  37                bonito_irqdispatch();
  38        else
  39                spurious_interrupt();
  40}
  41
  42static struct irqaction cascade_irqaction = {
  43        .handler = no_action,
  44        .name = "cascade",
  45        .flags = IRQF_NO_THREAD,
  46};
  47
  48void __init mach_init_irq(void)
  49{
  50        /* init all controller
  51         *   0-15         ------> i8259 interrupt
  52         *   16-23        ------> mips cpu interrupt
  53         *   32-63        ------> bonito irq
  54         */
  55
  56        /* most bonito irq should be level triggered */
  57        LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
  58            LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
  59
  60        /* Sets the first-level interrupt dispatcher. */
  61        mips_cpu_irq_init();
  62        init_i8259_irqs();
  63        bonito_irq_init();
  64
  65        /* bonito irq at IP2 */
  66        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
  67        /* 8259 irq at IP5 */
  68        setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
  69}
  70