LXR linux/drivers/ata/pata

   1/*
   2 * PATA driver for AT91SAM9260 Static Memory Controller
   3 * with CompactFlash interface in True IDE mode
   4 *
   5 * Copyright (C) 2009 Matyukevich Sergey
   6 *               2011 Igor Plyatov
   7 *
   8 * Based on:
   9 *      * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
  10 *      * pata_at32 driver by Kristoffer Nyborg Gregertsen
  11 *      * at91_ide driver by Stanislaw Gruszka
  12 *
  13 * This program is free software; you can redistribute it and/or modify it
  14 * under the terms of the GNU General Public License version 2
  15 * as published by the Free Software Foundation.
  16 *
  17 */
  18
  19#include <linux/kernel.h>
  20#include <linux/module.h>
  21#include <linux/init.h>
  22#include <linux/blkdev.h>
  23#include <linux/gfp.h>
  24#include <scsi/scsi_host.h>
  25#include <linux/ata.h>
  26#include <linux/clk.h>
  27#include <linux/libata.h>
  28#include <linux/platform_device.h>
  29#include <linux/ata_platform.h>
  30#include <linux/platform_data/atmel.h>
  31
  32#include <mach/at91sam9_smc.h>
  33#include <asm/gpio.h>
  34
  35#define DRV_NAME                "pata_at91"
  36#define DRV_VERSION             "0.3"
  37
  38#define CF_IDE_OFFSET           0x00c00000
  39#define CF_ALT_IDE_OFFSET       0x00e00000
  40#define CF_IDE_RES_SIZE         0x08
  41#define CS_PULSE_MAXIMUM        319
  42#define ER_SMC_CALC             1
  43#define ER_SMC_RECALC           2
  44
  45struct at91_ide_info {
  46        unsigned long mode;
  47        unsigned int cs;
  48        struct clk *mck;
  49        void __iomem *ide_addr;
  50        void __iomem *alt_addr;
  51};
  52
  53/**
  54 * struct smc_range - range of valid values for SMC register.
  55 */
  56struct smc_range {
  57        int min;
  58        int max;
  59};
  60
  61/**
  62 * adjust_smc_value - adjust value for one of SMC registers.
  63 * @value: adjusted value
  64 * @range: array of SMC ranges with valid values
  65 * @size: SMC ranges array size
  66 *
  67 * This returns the difference between input and output value or negative
  68 * in case of invalid input value.
  69 * If negative returned, then output value = maximal possible from ranges.
  70 */
  71static int adjust_smc_value(int *value, struct smc_range *range, int size)
  72{
  73        int maximum = (range + size - 1)->max;
  74        int remainder;
  75
  76        do {
  77                if (*value < range->min) {
  78                        remainder = range->min - *value;
  79                        *value = range->min; /* nearest valid value */
  80                        return remainder;
  81                } else if ((range->min <= *value) && (*value <= range->max))
  82                        return 0;
  83
  84                range++;
  85        } while (--size);
  86        *value = maximum;
  87
  88        return -1; /* invalid value */
  89}
  90
  91/**
  92 * calc_smc_vals - calculate SMC register values
  93 * @dev: ATA device
  94 * @setup: SMC_SETUP register value
  95 * @pulse: SMC_PULSE register value
  96 * @cycle: SMC_CYCLE register value
  97 *
  98 * This returns negative in case of invalid values for SMC registers:
  99 * -ER_SMC_RECALC - recalculation required for SMC values,
 100 * -ER_SMC_CALC - calculation failed (invalid input values).
 101 *
 102 * SMC use special coding scheme, see "Coding and Range of Timing
 103 * Parameters" table from AT91SAM9 datasheets.
 104 *
 105 *      SMC_SETUP = 128*setup[5] + setup[4:0]
 106 *      SMC_PULSE = 256*pulse[6] + pulse[5:0]
 107 *      SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
 108 */
 109static int calc_smc_vals(struct device *dev,
 110                int *setup, int *pulse, int *cycle, int *cs_pulse)
 111{
 112        int ret_val;
 113        int err = 0;
 114        struct smc_range range_setup[] = {      /* SMC_SETUP valid values */
 115                {.min = 0,      .max = 31},     /* first  range */
 116                {.min = 128,    .max = 159}     /* second range */
 117        };
 118        struct smc_range range_pulse[] = {      /* SMC_PULSE valid values */
 119                {.min = 0,      .max = 63},     /* first  range */
 120                {.min = 256,    .max = 319}     /* second range */
 121        };
 122        struct smc_range range_cycle[] = {      /* SMC_CYCLE valid values */
 123                {.min = 0,      .max = 127},    /* first  range */
 124                {.min = 256,    .max = 383},    /* second range */
 125                {.min = 512,    .max = 639},    /* third  range */
 126                {.min = 768,    .max = 895}     /* fourth range */
 127        };
 128
 129        ret_val = adjust_smc_value(setup, range_setup, ARRAY_SIZE(range_setup));
 130        if (ret_val < 0)
 131                dev_warn(dev, "maximal SMC Setup value\n");
 132        else
 133                *cycle += ret_val;
 134
 135        ret_val = adjust_smc_value(pulse, range_pulse, ARRAY_SIZE(range_pulse));
 136        if (ret_val < 0)
 137                dev_warn(dev, "maximal SMC Pulse value\n");
 138        else
 139                *cycle += ret_val;
 140
 141        ret_val = adjust_smc_value(cycle, range_cycle, ARRAY_SIZE(range_cycle));
 142        if (ret_val < 0)
 143                dev_warn(dev, "maximal SMC Cycle value\n");
 144
 145        *cs_pulse = *cycle;
 146        if (*cs_pulse > CS_PULSE_MAXIMUM) {
 147                dev_err(dev, "unable to calculate valid SMC settings\n");
 148                return -ER_SMC_CALC;
 149        }
 150
 151        ret_val = adjust_smc_value(cs_pulse, range_pulse,
 152                                        ARRAY_SIZE(range_pulse));
 153        if (ret_val < 0) {
 154                dev_warn(dev, "maximal SMC CS Pulse value\n");
 155        } else if (ret_val != 0) {
 156                *cycle = *cs_pulse;
 157                dev_warn(dev, "SMC Cycle extended\n");
 158                err = -ER_SMC_RECALC;
 159        }
 160
 161        return err;
 162}
 163
 164/**
 165 * to_smc_format - convert values into SMC format
 166 * @setup: SETUP value of SMC Setup Register
 167 * @pulse: PULSE value of SMC Pulse Register
 168 * @cycle: CYCLE value of SMC Cycle Register
 169 * @cs_pulse: NCS_PULSE value of SMC Pulse Register
 170 */
 171static void to_smc_format(int *setup, int *pulse, int *cycle, int *cs_pulse)
 172{
 173        *setup = (*setup & 0x1f) | ((*setup & 0x80) >> 2);
 174        *pulse = (*pulse & 0x3f) | ((*pulse & 0x100) >> 2);
 175        *cycle = (*cycle & 0x7f) | ((*cycle & 0x300) >> 1);
 176        *cs_pulse = (*cs_pulse & 0x3f) | ((*cs_pulse & 0x100) >> 2);
 177}
 178
 179static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
 180{
 181        unsigned long mul;
 182
 183        /*
 184        * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
 185        *     x * (f / 1_000_000_000) =
 186        *     x * ((f * 65536) / 1_000_000_000) / 65536 =
 187        *     x * (((f / 10_000) * 65536) / 100_000) / 65536 =
 188        */
 189
 190        mul = (mck_hz / 10000) << 16;
 191        mul /= 100000;
 192
 193        return (ns * mul + 65536) >> 16;    /* rounding */
 194}
 195
 196/**
 197 * set_smc_timing - SMC timings setup.
 198 * @dev: device
 199 * @info: AT91 IDE info
 200 * @ata: ATA timings
 201 *
 202 * Its assumed that write timings are same as read timings,
 203 * cs_setup = 0 and cs_pulse = cycle.
 204 */
 205static void set_smc_timing(struct device *dev, struct ata_device *adev,
 206                struct at91_ide_info *info, const struct ata_timing *ata)
 207{
 208        int ret = 0;
 209        int use_iordy;
 210        struct sam9_smc_config smc;
 211        unsigned int t6z;         /* data tristate time in ns */
 212        unsigned int cycle;       /* SMC Cycle width in MCK ticks */
 213        unsigned int setup;       /* SMC Setup width in MCK ticks */
 214        unsigned int pulse;       /* CFIOR and CFIOW pulse width in MCK ticks */
 215        unsigned int cs_pulse;    /* CS4 or CS5 pulse width in MCK ticks*/
 216        unsigned int tdf_cycles;  /* SMC TDF MCK ticks */
 217        unsigned long mck_hz;     /* MCK frequency in Hz */
 218
 219        t6z = (ata->mode < XFER_PIO_5) ? 30 : 20;
 220        mck_hz = clk_get_rate(info->mck);
 221        cycle = calc_mck_cycles(ata->cyc8b, mck_hz);
 222        setup = calc_mck_cycles(ata->setup, mck_hz);
 223        pulse = calc_mck_cycles(ata->act8b, mck_hz);
 224        tdf_cycles = calc_mck_cycles(t6z, mck_hz);
 225
 226        do {
 227                ret = calc_smc_vals(dev, &setup, &pulse, &cycle, &cs_pulse);
 228        } while (ret == -ER_SMC_RECALC);
 229
 230        if (ret == -ER_SMC_CALC)
 231                dev_err(dev, "Interface may not operate correctly\n");
 232
 233        dev_dbg(dev, "SMC Setup=%u, Pulse=%u, Cycle=%u, CS Pulse=%u\n",
 234                setup, pulse, cycle, cs_pulse);
 235        to_smc_format(&setup, &pulse, &cycle, &cs_pulse);
 236        /* disable or enable waiting for IORDY signal */
 237        use_iordy = ata_pio_need_iordy(adev);
 238        if (use_iordy)
 239                info->mode |= AT91_SMC_EXNWMODE_READY;
 240
 241        if (tdf_cycles > 15) {
 242                tdf_cycles = 15;
 243                dev_warn(dev, "maximal SMC TDF Cycles value\n");
 244        }
 245
 246        dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
 247
 248        /* SMC Setup Register */
 249        smc.nwe_setup = smc.nrd_setup = setup;
 250        smc.ncs_write_setup = smc.ncs_read_setup = 0;
 251        /* SMC Pulse Register */
 252        smc.nwe_pulse = smc.nrd_pulse = pulse;
 253        smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
 254        /* SMC Cycle Register */
 255        smc.write_cycle = smc.read_cycle = cycle;
 256        /* SMC Mode Register*/
 257        smc.tdf_cycles = tdf_cycles;
 258        smc.mode = info->mode;
 259
 260        sam9_smc_configure(0, info->cs, &smc);
 261}
 262
 263static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
 264{
 265        struct at91_ide_info *info = ap->host->private_data;
 266        struct ata_timing timing;
 267        int ret;
 268
 269        /* Compute ATA timing and set it to SMC */
 270        ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
 271        if (ret) {
 272                dev_warn(ap->dev, "Failed to compute ATA timing %d, "
 273                         "set PIO_0 timing\n", ret);
 274                timing = *ata_timing_find_mode(XFER_PIO_0);
 275        }
 276        set_smc_timing(ap->dev, adev, info, &timing);
 277}
 278
 279static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
 280                unsigned char *buf, unsigned int buflen, int rw)
 281{
 282        struct at91_ide_info *info = dev->link->ap->host->private_data;
 283        unsigned int consumed;
 284        unsigned long flags;
 285        struct sam9_smc_config smc;
 286
 287        local_irq_save(flags);
 288        sam9_smc_read_mode(0, info->cs, &smc);
 289
 290        /* set 16bit mode before writing data */
 291        smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
 292        sam9_smc_write_mode(0, info->cs, &smc);
 293
 294        consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
 295
 296        /* restore 8bit mode after data is written */
 297        smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
 298        sam9_smc_write_mode(0, info->cs, &smc);
 299
 300        local_irq_restore(flags);
 301        return consumed;
 302}
 303
 304static struct scsi_host_template pata_at91_sht = {
 305        ATA_PIO_SHT(DRV_NAME),
 306};
 307
 308static struct ata_port_operations pata_at91_port_ops = {
 309        .inherits       = &ata_sff_port_ops,
 310
 311        .sff_data_xfer  = pata_at91_data_xfer_noirq,
 312        .set_piomode    = pata_at91_set_piomode,
 313        .cable_detect   = ata_cable_40wire,
 314};
 315
 316static int pata_at91_probe(struct platform_device *pdev)
 317{
 318        struct at91_cf_data *board = pdev->dev.platform_data;
 319        struct device *dev = &pdev->dev;
 320        struct at91_ide_info *info;
 321        struct resource *mem_res;
 322        struct ata_host *host;
 323        struct ata_port *ap;
 324
 325        int irq_flags = 0;
 326        int irq = 0;
 327        int ret;
 328
 329        /*  get platform resources: IO/CTL memories and irq/rst pins */
 330
 331        if (pdev->num_resources != 1) {
 332                dev_err(&pdev->dev, "invalid number of resources\n");
 333                return -EINVAL;
 334        }
 335
 336        mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 337
 338        if (!mem_res) {
 339                dev_err(dev, "failed to get mem resource\n");
 340                return -EINVAL;
 341        }
 342
 343        irq = board->irq_pin;
 344
 345        /* init ata host */
 346
 347        host = ata_host_alloc(dev, 1);
 348
 349        if (!host)
 350                return -ENOMEM;
 351
 352        ap = host->ports[0];
 353        ap->ops = &pata_at91_port_ops;
 354        ap->flags |= ATA_FLAG_SLAVE_POSS;
 355        ap->pio_mask = ATA_PIO4;
 356
 357        if (!gpio_is_valid(irq)) {
 358                ap->flags |= ATA_FLAG_PIO_POLLING;
 359                ata_port_desc(ap, "no IRQ, using PIO polling");
 360        }
 361
 362        info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
 363
 364        if (!info) {
 365                dev_err(dev, "failed to allocate memory for private data\n");
 366                return -ENOMEM;
 367        }
 368
 369        info->mck = clk_get(NULL, "mck");
 370
 371        if (IS_ERR(info->mck)) {
 372                dev_err(dev, "failed to get access to mck clock\n");
 373                return -ENODEV;
 374        }
 375
 376        info->cs    = board->chipselect;
 377        info->mode  = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
 378                AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
 379                AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
 380
 381        info->ide_addr = devm_ioremap(dev,
 382                        mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
 383
 384        if (!info->ide_addr) {
 385                dev_err(dev, "failed to map IO base\n");
 386                ret = -ENOMEM;
 387                goto err_put;
 388        }
 389
 390        info->alt_addr = devm_ioremap(dev,
 391                        mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
 392
 393        if (!info->alt_addr) {
 394                dev_err(dev, "failed to map CTL base\n");
 395                ret = -ENOMEM;
 396                goto err_put;
 397        }
 398
 399        ap->ioaddr.cmd_addr = info->ide_addr;
 400        ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
 401        ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
 402
 403        ata_sff_std_ports(&ap->ioaddr);
 404
 405        ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
 406                        (unsigned long long)mem_res->start + CF_IDE_OFFSET,
 407                        (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
 408
 409        host->private_data = info;
 410
 411        return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
 412                        gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
 413                        irq_flags, &pata_at91_sht);
 414
 415        if (!ret)
 416                return 0;
 417
 418err_put:
 419        clk_put(info->mck);
 420        return ret;
 421}
 422
 423static int pata_at91_remove(struct platform_device *pdev)
 424{
 425        struct ata_host *host = dev_get_drvdata(&pdev->dev);
 426        struct at91_ide_info *info;
 427
 428        if (!host)
 429                return 0;
 430        info = host->private_data;
 431
 432        ata_host_detach(host);
 433
 434        if (!info)
 435                return 0;
 436
 437        clk_put(info->mck);
 438
 439        return 0;
 440}
 441
 442static struct platform_driver pata_at91_driver = {
 443        .probe          = pata_at91_probe,
 444        .remove         = pata_at91_remove,
 445        .driver         = {
 446                .name           = DRV_NAME,
 447                .owner          = THIS_MODULE,
 448        },
 449};
 450
 451module_platform_driver(pata_at91_driver);
 452
 453MODULE_LICENSE("GPL");
 454MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
 455MODULE_AUTHOR("Matyukevich Sergey");
 456MODULE_VERSION(DRV_VERSION);
 457
 458