linux/drivers/cpufreq/acpi-cpufreq.c
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   1/*
   2 * acpi-cpufreq.c - ACPI Processor P-States Driver
   3 *
   4 *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   5 *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   6 *  Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
   7 *  Copyright (C) 2006       Denis Sadykov <denis.m.sadykov@intel.com>
   8 *
   9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10 *
  11 *  This program is free software; you can redistribute it and/or modify
  12 *  it under the terms of the GNU General Public License as published by
  13 *  the Free Software Foundation; either version 2 of the License, or (at
  14 *  your option) any later version.
  15 *
  16 *  This program is distributed in the hope that it will be useful, but
  17 *  WITHOUT ANY WARRANTY; without even the implied warranty of
  18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19 *  General Public License for more details.
  20 *
  21 *  You should have received a copy of the GNU General Public License along
  22 *  with this program; if not, write to the Free Software Foundation, Inc.,
  23 *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24 *
  25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26 */
  27
  28#include <linux/kernel.h>
  29#include <linux/module.h>
  30#include <linux/init.h>
  31#include <linux/smp.h>
  32#include <linux/sched.h>
  33#include <linux/cpufreq.h>
  34#include <linux/compiler.h>
  35#include <linux/dmi.h>
  36#include <linux/slab.h>
  37
  38#include <linux/acpi.h>
  39#include <linux/io.h>
  40#include <linux/delay.h>
  41#include <linux/uaccess.h>
  42
  43#include <acpi/processor.h>
  44
  45#include <asm/msr.h>
  46#include <asm/processor.h>
  47#include <asm/cpufeature.h>
  48#include "mperf.h"
  49
  50MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  51MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  52MODULE_LICENSE("GPL");
  53
  54#define PFX "acpi-cpufreq: "
  55
  56enum {
  57        UNDEFINED_CAPABLE = 0,
  58        SYSTEM_INTEL_MSR_CAPABLE,
  59        SYSTEM_AMD_MSR_CAPABLE,
  60        SYSTEM_IO_CAPABLE,
  61};
  62
  63#define INTEL_MSR_RANGE         (0xffff)
  64#define AMD_MSR_RANGE           (0x7)
  65
  66#define MSR_K7_HWCR_CPB_DIS     (1ULL << 25)
  67
  68struct acpi_cpufreq_data {
  69        struct acpi_processor_performance *acpi_data;
  70        struct cpufreq_frequency_table *freq_table;
  71        unsigned int resume;
  72        unsigned int cpu_feature;
  73};
  74
  75static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
  76
  77/* acpi_perf_data is a pointer to percpu data. */
  78static struct acpi_processor_performance __percpu *acpi_perf_data;
  79
  80static struct cpufreq_driver acpi_cpufreq_driver;
  81
  82static unsigned int acpi_pstate_strict;
  83static bool boost_enabled, boost_supported;
  84static struct msr __percpu *msrs;
  85
  86static bool boost_state(unsigned int cpu)
  87{
  88        u32 lo, hi;
  89        u64 msr;
  90
  91        switch (boot_cpu_data.x86_vendor) {
  92        case X86_VENDOR_INTEL:
  93                rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
  94                msr = lo | ((u64)hi << 32);
  95                return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
  96        case X86_VENDOR_AMD:
  97                rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  98                msr = lo | ((u64)hi << 32);
  99                return !(msr & MSR_K7_HWCR_CPB_DIS);
 100        }
 101        return false;
 102}
 103
 104static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
 105{
 106        u32 cpu;
 107        u32 msr_addr;
 108        u64 msr_mask;
 109
 110        switch (boot_cpu_data.x86_vendor) {
 111        case X86_VENDOR_INTEL:
 112                msr_addr = MSR_IA32_MISC_ENABLE;
 113                msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
 114                break;
 115        case X86_VENDOR_AMD:
 116                msr_addr = MSR_K7_HWCR;
 117                msr_mask = MSR_K7_HWCR_CPB_DIS;
 118                break;
 119        default:
 120                return;
 121        }
 122
 123        rdmsr_on_cpus(cpumask, msr_addr, msrs);
 124
 125        for_each_cpu(cpu, cpumask) {
 126                struct msr *reg = per_cpu_ptr(msrs, cpu);
 127                if (enable)
 128                        reg->q &= ~msr_mask;
 129                else
 130                        reg->q |= msr_mask;
 131        }
 132
 133        wrmsr_on_cpus(cpumask, msr_addr, msrs);
 134}
 135
 136static ssize_t _store_boost(const char *buf, size_t count)
 137{
 138        int ret;
 139        unsigned long val = 0;
 140
 141        if (!boost_supported)
 142                return -EINVAL;
 143
 144        ret = kstrtoul(buf, 10, &val);
 145        if (ret || (val > 1))
 146                return -EINVAL;
 147
 148        if ((val && boost_enabled) || (!val && !boost_enabled))
 149                return count;
 150
 151        get_online_cpus();
 152
 153        boost_set_msrs(val, cpu_online_mask);
 154
 155        put_online_cpus();
 156
 157        boost_enabled = val;
 158        pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
 159
 160        return count;
 161}
 162
 163static ssize_t store_global_boost(struct kobject *kobj, struct attribute *attr,
 164                                  const char *buf, size_t count)
 165{
 166        return _store_boost(buf, count);
 167}
 168
 169static ssize_t show_global_boost(struct kobject *kobj,
 170                                 struct attribute *attr, char *buf)
 171{
 172        return sprintf(buf, "%u\n", boost_enabled);
 173}
 174
 175static struct global_attr global_boost = __ATTR(boost, 0644,
 176                                                show_global_boost,
 177                                                store_global_boost);
 178
 179#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
 180static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
 181                         size_t count)
 182{
 183        return _store_boost(buf, count);
 184}
 185
 186static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
 187{
 188        return sprintf(buf, "%u\n", boost_enabled);
 189}
 190
 191static struct freq_attr cpb = __ATTR(cpb, 0644, show_cpb, store_cpb);
 192#endif
 193
 194static int check_est_cpu(unsigned int cpuid)
 195{
 196        struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
 197
 198        return cpu_has(cpu, X86_FEATURE_EST);
 199}
 200
 201static int check_amd_hwpstate_cpu(unsigned int cpuid)
 202{
 203        struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
 204
 205        return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
 206}
 207
 208static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
 209{
 210        struct acpi_processor_performance *perf;
 211        int i;
 212
 213        perf = data->acpi_data;
 214
 215        for (i = 0; i < perf->state_count; i++) {
 216                if (value == perf->states[i].status)
 217                        return data->freq_table[i].frequency;
 218        }
 219        return 0;
 220}
 221
 222static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
 223{
 224        int i;
 225        struct acpi_processor_performance *perf;
 226
 227        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
 228                msr &= AMD_MSR_RANGE;
 229        else
 230                msr &= INTEL_MSR_RANGE;
 231
 232        perf = data->acpi_data;
 233
 234        for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
 235                if (msr == perf->states[data->freq_table[i].index].status)
 236                        return data->freq_table[i].frequency;
 237        }
 238        return data->freq_table[0].frequency;
 239}
 240
 241static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
 242{
 243        switch (data->cpu_feature) {
 244        case SYSTEM_INTEL_MSR_CAPABLE:
 245        case SYSTEM_AMD_MSR_CAPABLE:
 246                return extract_msr(val, data);
 247        case SYSTEM_IO_CAPABLE:
 248                return extract_io(val, data);
 249        default:
 250                return 0;
 251        }
 252}
 253
 254struct msr_addr {
 255        u32 reg;
 256};
 257
 258struct io_addr {
 259        u16 port;
 260        u8 bit_width;
 261};
 262
 263struct drv_cmd {
 264        unsigned int type;
 265        const struct cpumask *mask;
 266        union {
 267                struct msr_addr msr;
 268                struct io_addr io;
 269        } addr;
 270        u32 val;
 271};
 272
 273/* Called via smp_call_function_single(), on the target CPU */
 274static void do_drv_read(void *_cmd)
 275{
 276        struct drv_cmd *cmd = _cmd;
 277        u32 h;
 278
 279        switch (cmd->type) {
 280        case SYSTEM_INTEL_MSR_CAPABLE:
 281        case SYSTEM_AMD_MSR_CAPABLE:
 282                rdmsr(cmd->addr.msr.reg, cmd->val, h);
 283                break;
 284        case SYSTEM_IO_CAPABLE:
 285                acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
 286                                &cmd->val,
 287                                (u32)cmd->addr.io.bit_width);
 288                break;
 289        default:
 290                break;
 291        }
 292}
 293
 294/* Called via smp_call_function_many(), on the target CPUs */
 295static void do_drv_write(void *_cmd)
 296{
 297        struct drv_cmd *cmd = _cmd;
 298        u32 lo, hi;
 299
 300        switch (cmd->type) {
 301        case SYSTEM_INTEL_MSR_CAPABLE:
 302                rdmsr(cmd->addr.msr.reg, lo, hi);
 303                lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
 304                wrmsr(cmd->addr.msr.reg, lo, hi);
 305                break;
 306        case SYSTEM_AMD_MSR_CAPABLE:
 307                wrmsr(cmd->addr.msr.reg, cmd->val, 0);
 308                break;
 309        case SYSTEM_IO_CAPABLE:
 310                acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
 311                                cmd->val,
 312                                (u32)cmd->addr.io.bit_width);
 313                break;
 314        default:
 315                break;
 316        }
 317}
 318
 319static void drv_read(struct drv_cmd *cmd)
 320{
 321        int err;
 322        cmd->val = 0;
 323
 324        err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
 325        WARN_ON_ONCE(err);      /* smp_call_function_any() was buggy? */
 326}
 327
 328static void drv_write(struct drv_cmd *cmd)
 329{
 330        int this_cpu;
 331
 332        this_cpu = get_cpu();
 333        if (cpumask_test_cpu(this_cpu, cmd->mask))
 334                do_drv_write(cmd);
 335        smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
 336        put_cpu();
 337}
 338
 339static u32 get_cur_val(const struct cpumask *mask)
 340{
 341        struct acpi_processor_performance *perf;
 342        struct drv_cmd cmd;
 343
 344        if (unlikely(cpumask_empty(mask)))
 345                return 0;
 346
 347        switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
 348        case SYSTEM_INTEL_MSR_CAPABLE:
 349                cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
 350                cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
 351                break;
 352        case SYSTEM_AMD_MSR_CAPABLE:
 353                cmd.type = SYSTEM_AMD_MSR_CAPABLE;
 354                cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
 355                break;
 356        case SYSTEM_IO_CAPABLE:
 357                cmd.type = SYSTEM_IO_CAPABLE;
 358                perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
 359                cmd.addr.io.port = perf->control_register.address;
 360                cmd.addr.io.bit_width = perf->control_register.bit_width;
 361                break;
 362        default:
 363                return 0;
 364        }
 365
 366        cmd.mask = mask;
 367        drv_read(&cmd);
 368
 369        pr_debug("get_cur_val = %u\n", cmd.val);
 370
 371        return cmd.val;
 372}
 373
 374static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
 375{
 376        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
 377        unsigned int freq;
 378        unsigned int cached_freq;
 379
 380        pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
 381
 382        if (unlikely(data == NULL ||
 383                     data->acpi_data == NULL || data->freq_table == NULL)) {
 384                return 0;
 385        }
 386
 387        cached_freq = data->freq_table[data->acpi_data->state].frequency;
 388        freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
 389        if (freq != cached_freq) {
 390                /*
 391                 * The dreaded BIOS frequency change behind our back.
 392                 * Force set the frequency on next target call.
 393                 */
 394                data->resume = 1;
 395        }
 396
 397        pr_debug("cur freq = %u\n", freq);
 398
 399        return freq;
 400}
 401
 402static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
 403                                struct acpi_cpufreq_data *data)
 404{
 405        unsigned int cur_freq;
 406        unsigned int i;
 407
 408        for (i = 0; i < 100; i++) {
 409                cur_freq = extract_freq(get_cur_val(mask), data);
 410                if (cur_freq == freq)
 411                        return 1;
 412                udelay(10);
 413        }
 414        return 0;
 415}
 416
 417static int acpi_cpufreq_target(struct cpufreq_policy *policy,
 418                               unsigned int target_freq, unsigned int relation)
 419{
 420        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
 421        struct acpi_processor_performance *perf;
 422        struct cpufreq_freqs freqs;
 423        struct drv_cmd cmd;
 424        unsigned int next_state = 0; /* Index into freq_table */
 425        unsigned int next_perf_state = 0; /* Index into perf table */
 426        int result = 0;
 427
 428        pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
 429
 430        if (unlikely(data == NULL ||
 431             data->acpi_data == NULL || data->freq_table == NULL)) {
 432                return -ENODEV;
 433        }
 434
 435        perf = data->acpi_data;
 436        result = cpufreq_frequency_table_target(policy,
 437                                                data->freq_table,
 438                                                target_freq,
 439                                                relation, &next_state);
 440        if (unlikely(result)) {
 441                result = -ENODEV;
 442                goto out;
 443        }
 444
 445        next_perf_state = data->freq_table[next_state].index;
 446        if (perf->state == next_perf_state) {
 447                if (unlikely(data->resume)) {
 448                        pr_debug("Called after resume, resetting to P%d\n",
 449                                next_perf_state);
 450                        data->resume = 0;
 451                } else {
 452                        pr_debug("Already at target state (P%d)\n",
 453                                next_perf_state);
 454                        goto out;
 455                }
 456        }
 457
 458        switch (data->cpu_feature) {
 459        case SYSTEM_INTEL_MSR_CAPABLE:
 460                cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
 461                cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
 462                cmd.val = (u32) perf->states[next_perf_state].control;
 463                break;
 464        case SYSTEM_AMD_MSR_CAPABLE:
 465                cmd.type = SYSTEM_AMD_MSR_CAPABLE;
 466                cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
 467                cmd.val = (u32) perf->states[next_perf_state].control;
 468                break;
 469        case SYSTEM_IO_CAPABLE:
 470                cmd.type = SYSTEM_IO_CAPABLE;
 471                cmd.addr.io.port = perf->control_register.address;
 472                cmd.addr.io.bit_width = perf->control_register.bit_width;
 473                cmd.val = (u32) perf->states[next_perf_state].control;
 474                break;
 475        default:
 476                result = -ENODEV;
 477                goto out;
 478        }
 479
 480        /* cpufreq holds the hotplug lock, so we are safe from here on */
 481        if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
 482                cmd.mask = policy->cpus;
 483        else
 484                cmd.mask = cpumask_of(policy->cpu);
 485
 486        freqs.old = perf->states[perf->state].core_frequency * 1000;
 487        freqs.new = data->freq_table[next_state].frequency;
 488        cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
 489
 490        drv_write(&cmd);
 491
 492        if (acpi_pstate_strict) {
 493                if (!check_freqs(cmd.mask, freqs.new, data)) {
 494                        pr_debug("acpi_cpufreq_target failed (%d)\n",
 495                                policy->cpu);
 496                        result = -EAGAIN;
 497                        goto out;
 498                }
 499        }
 500
 501        cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
 502        perf->state = next_perf_state;
 503
 504out:
 505        return result;
 506}
 507
 508static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
 509{
 510        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
 511
 512        pr_debug("acpi_cpufreq_verify\n");
 513
 514        return cpufreq_frequency_table_verify(policy, data->freq_table);
 515}
 516
 517static unsigned long
 518acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
 519{
 520        struct acpi_processor_performance *perf = data->acpi_data;
 521
 522        if (cpu_khz) {
 523                /* search the closest match to cpu_khz */
 524                unsigned int i;
 525                unsigned long freq;
 526                unsigned long freqn = perf->states[0].core_frequency * 1000;
 527
 528                for (i = 0; i < (perf->state_count-1); i++) {
 529                        freq = freqn;
 530                        freqn = perf->states[i+1].core_frequency * 1000;
 531                        if ((2 * cpu_khz) > (freqn + freq)) {
 532                                perf->state = i;
 533                                return freq;
 534                        }
 535                }
 536                perf->state = perf->state_count-1;
 537                return freqn;
 538        } else {
 539                /* assume CPU is at P0... */
 540                perf->state = 0;
 541                return perf->states[0].core_frequency * 1000;
 542        }
 543}
 544
 545static void free_acpi_perf_data(void)
 546{
 547        unsigned int i;
 548
 549        /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
 550        for_each_possible_cpu(i)
 551                free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
 552                                 ->shared_cpu_map);
 553        free_percpu(acpi_perf_data);
 554}
 555
 556static int boost_notify(struct notifier_block *nb, unsigned long action,
 557                      void *hcpu)
 558{
 559        unsigned cpu = (long)hcpu;
 560        const struct cpumask *cpumask;
 561
 562        cpumask = get_cpu_mask(cpu);
 563
 564        /*
 565         * Clear the boost-disable bit on the CPU_DOWN path so that
 566         * this cpu cannot block the remaining ones from boosting. On
 567         * the CPU_UP path we simply keep the boost-disable flag in
 568         * sync with the current global state.
 569         */
 570
 571        switch (action) {
 572        case CPU_UP_PREPARE:
 573        case CPU_UP_PREPARE_FROZEN:
 574                boost_set_msrs(boost_enabled, cpumask);
 575                break;
 576
 577        case CPU_DOWN_PREPARE:
 578        case CPU_DOWN_PREPARE_FROZEN:
 579                boost_set_msrs(1, cpumask);
 580                break;
 581
 582        default:
 583                break;
 584        }
 585
 586        return NOTIFY_OK;
 587}
 588
 589
 590static struct notifier_block boost_nb = {
 591        .notifier_call          = boost_notify,
 592};
 593
 594/*
 595 * acpi_cpufreq_early_init - initialize ACPI P-States library
 596 *
 597 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
 598 * in order to determine correct frequency and voltage pairings. We can
 599 * do _PDC and _PSD and find out the processor dependency for the
 600 * actual init that will happen later...
 601 */
 602static int __init acpi_cpufreq_early_init(void)
 603{
 604        unsigned int i;
 605        pr_debug("acpi_cpufreq_early_init\n");
 606
 607        acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
 608        if (!acpi_perf_data) {
 609                pr_debug("Memory allocation error for acpi_perf_data.\n");
 610                return -ENOMEM;
 611        }
 612        for_each_possible_cpu(i) {
 613                if (!zalloc_cpumask_var_node(
 614                        &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
 615                        GFP_KERNEL, cpu_to_node(i))) {
 616
 617                        /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
 618                        free_acpi_perf_data();
 619                        return -ENOMEM;
 620                }
 621        }
 622
 623        /* Do initialization in ACPI core */
 624        acpi_processor_preregister_performance(acpi_perf_data);
 625        return 0;
 626}
 627
 628#ifdef CONFIG_SMP
 629/*
 630 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
 631 * or do it in BIOS firmware and won't inform about it to OS. If not
 632 * detected, this has a side effect of making CPU run at a different speed
 633 * than OS intended it to run at. Detect it and handle it cleanly.
 634 */
 635static int bios_with_sw_any_bug;
 636
 637static int sw_any_bug_found(const struct dmi_system_id *d)
 638{
 639        bios_with_sw_any_bug = 1;
 640        return 0;
 641}
 642
 643static const struct dmi_system_id sw_any_bug_dmi_table[] = {
 644        {
 645                .callback = sw_any_bug_found,
 646                .ident = "Supermicro Server X6DLP",
 647                .matches = {
 648                        DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 649                        DMI_MATCH(DMI_BIOS_VERSION, "080010"),
 650                        DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
 651                },
 652        },
 653        { }
 654};
 655
 656static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
 657{
 658        /* Intel Xeon Processor 7100 Series Specification Update
 659         * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
 660         * AL30: A Machine Check Exception (MCE) Occurring during an
 661         * Enhanced Intel SpeedStep Technology Ratio Change May Cause
 662         * Both Processor Cores to Lock Up. */
 663        if (c->x86_vendor == X86_VENDOR_INTEL) {
 664                if ((c->x86 == 15) &&
 665                    (c->x86_model == 6) &&
 666                    (c->x86_mask == 8)) {
 667                        printk(KERN_INFO "acpi-cpufreq: Intel(R) "
 668                            "Xeon(R) 7100 Errata AL30, processors may "
 669                            "lock up on frequency changes: disabling "
 670                            "acpi-cpufreq.\n");
 671                        return -ENODEV;
 672                    }
 673                }
 674        return 0;
 675}
 676#endif
 677
 678static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 679{
 680        unsigned int i;
 681        unsigned int valid_states = 0;
 682        unsigned int cpu = policy->cpu;
 683        struct acpi_cpufreq_data *data;
 684        unsigned int result = 0;
 685        struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
 686        struct acpi_processor_performance *perf;
 687#ifdef CONFIG_SMP
 688        static int blacklisted;
 689#endif
 690
 691        pr_debug("acpi_cpufreq_cpu_init\n");
 692
 693#ifdef CONFIG_SMP
 694        if (blacklisted)
 695                return blacklisted;
 696        blacklisted = acpi_cpufreq_blacklist(c);
 697        if (blacklisted)
 698                return blacklisted;
 699#endif
 700
 701        data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
 702        if (!data)
 703                return -ENOMEM;
 704
 705        data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
 706        per_cpu(acfreq_data, cpu) = data;
 707
 708        if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
 709                acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
 710
 711        result = acpi_processor_register_performance(data->acpi_data, cpu);
 712        if (result)
 713                goto err_free;
 714
 715        perf = data->acpi_data;
 716        policy->shared_type = perf->shared_type;
 717
 718        /*
 719         * Will let policy->cpus know about dependency only when software
 720         * coordination is required.
 721         */
 722        if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
 723            policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
 724                cpumask_copy(policy->cpus, perf->shared_cpu_map);
 725        }
 726
 727#ifdef CONFIG_SMP
 728        dmi_check_system(sw_any_bug_dmi_table);
 729        if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
 730                policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
 731                cpumask_copy(policy->cpus, cpu_core_mask(cpu));
 732        }
 733
 734        if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
 735                cpumask_clear(policy->cpus);
 736                cpumask_set_cpu(cpu, policy->cpus);
 737                policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
 738                pr_info_once(PFX "overriding BIOS provided _PSD data\n");
 739        }
 740#endif
 741
 742        /* capability check */
 743        if (perf->state_count <= 1) {
 744                pr_debug("No P-States\n");
 745                result = -ENODEV;
 746                goto err_unreg;
 747        }
 748
 749        if (perf->control_register.space_id != perf->status_register.space_id) {
 750                result = -ENODEV;
 751                goto err_unreg;
 752        }
 753
 754        switch (perf->control_register.space_id) {
 755        case ACPI_ADR_SPACE_SYSTEM_IO:
 756                if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
 757                    boot_cpu_data.x86 == 0xf) {
 758                        pr_debug("AMD K8 systems must use native drivers.\n");
 759                        result = -ENODEV;
 760                        goto err_unreg;
 761                }
 762                pr_debug("SYSTEM IO addr space\n");
 763                data->cpu_feature = SYSTEM_IO_CAPABLE;
 764                break;
 765        case ACPI_ADR_SPACE_FIXED_HARDWARE:
 766                pr_debug("HARDWARE addr space\n");
 767                if (check_est_cpu(cpu)) {
 768                        data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
 769                        break;
 770                }
 771                if (check_amd_hwpstate_cpu(cpu)) {
 772                        data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
 773                        break;
 774                }
 775                result = -ENODEV;
 776                goto err_unreg;
 777        default:
 778                pr_debug("Unknown addr space %d\n",
 779                        (u32) (perf->control_register.space_id));
 780                result = -ENODEV;
 781                goto err_unreg;
 782        }
 783
 784        data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
 785                    (perf->state_count+1), GFP_KERNEL);
 786        if (!data->freq_table) {
 787                result = -ENOMEM;
 788                goto err_unreg;
 789        }
 790
 791        /* detect transition latency */
 792        policy->cpuinfo.transition_latency = 0;
 793        for (i = 0; i < perf->state_count; i++) {
 794                if ((perf->states[i].transition_latency * 1000) >
 795                    policy->cpuinfo.transition_latency)
 796                        policy->cpuinfo.transition_latency =
 797                            perf->states[i].transition_latency * 1000;
 798        }
 799
 800        /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
 801        if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
 802            policy->cpuinfo.transition_latency > 20 * 1000) {
 803                policy->cpuinfo.transition_latency = 20 * 1000;
 804                printk_once(KERN_INFO
 805                            "P-state transition latency capped at 20 uS\n");
 806        }
 807
 808        /* table init */
 809        for (i = 0; i < perf->state_count; i++) {
 810                if (i > 0 && perf->states[i].core_frequency >=
 811                    data->freq_table[valid_states-1].frequency / 1000)
 812                        continue;
 813
 814                data->freq_table[valid_states].index = i;
 815                data->freq_table[valid_states].frequency =
 816                    perf->states[i].core_frequency * 1000;
 817                valid_states++;
 818        }
 819        data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
 820        perf->state = 0;
 821
 822        result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
 823        if (result)
 824                goto err_freqfree;
 825
 826        if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
 827                printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
 828
 829        switch (perf->control_register.space_id) {
 830        case ACPI_ADR_SPACE_SYSTEM_IO:
 831                /* Current speed is unknown and not detectable by IO port */
 832                policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
 833                break;
 834        case ACPI_ADR_SPACE_FIXED_HARDWARE:
 835                acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
 836                policy->cur = get_cur_freq_on_cpu(cpu);
 837                break;
 838        default:
 839                break;
 840        }
 841
 842        /* notify BIOS that we exist */
 843        acpi_processor_notify_smm(THIS_MODULE);
 844
 845        /* Check for APERF/MPERF support in hardware */
 846        if (boot_cpu_has(X86_FEATURE_APERFMPERF))
 847                acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
 848
 849        pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
 850        for (i = 0; i < perf->state_count; i++)
 851                pr_debug("     %cP%d: %d MHz, %d mW, %d uS\n",
 852                        (i == perf->state ? '*' : ' '), i,
 853                        (u32) perf->states[i].core_frequency,
 854                        (u32) perf->states[i].power,
 855                        (u32) perf->states[i].transition_latency);
 856
 857        cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
 858
 859        /*
 860         * the first call to ->target() should result in us actually
 861         * writing something to the appropriate registers.
 862         */
 863        data->resume = 1;
 864
 865        return result;
 866
 867err_freqfree:
 868        kfree(data->freq_table);
 869err_unreg:
 870        acpi_processor_unregister_performance(perf, cpu);
 871err_free:
 872        kfree(data);
 873        per_cpu(acfreq_data, cpu) = NULL;
 874
 875        return result;
 876}
 877
 878static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
 879{
 880        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
 881
 882        pr_debug("acpi_cpufreq_cpu_exit\n");
 883
 884        if (data) {
 885                cpufreq_frequency_table_put_attr(policy->cpu);
 886                per_cpu(acfreq_data, policy->cpu) = NULL;
 887                acpi_processor_unregister_performance(data->acpi_data,
 888                                                      policy->cpu);
 889                kfree(data->freq_table);
 890                kfree(data);
 891        }
 892
 893        return 0;
 894}
 895
 896static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
 897{
 898        struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
 899
 900        pr_debug("acpi_cpufreq_resume\n");
 901
 902        data->resume = 1;
 903
 904        return 0;
 905}
 906
 907static struct freq_attr *acpi_cpufreq_attr[] = {
 908        &cpufreq_freq_attr_scaling_available_freqs,
 909        NULL,   /* this is a placeholder for cpb, do not remove */
 910        NULL,
 911};
 912
 913static struct cpufreq_driver acpi_cpufreq_driver = {
 914        .verify         = acpi_cpufreq_verify,
 915        .target         = acpi_cpufreq_target,
 916        .bios_limit     = acpi_processor_get_bios_limit,
 917        .init           = acpi_cpufreq_cpu_init,
 918        .exit           = acpi_cpufreq_cpu_exit,
 919        .resume         = acpi_cpufreq_resume,
 920        .name           = "acpi-cpufreq",
 921        .owner          = THIS_MODULE,
 922        .attr           = acpi_cpufreq_attr,
 923};
 924
 925static void __init acpi_cpufreq_boost_init(void)
 926{
 927        if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
 928                msrs = msrs_alloc();
 929
 930                if (!msrs)
 931                        return;
 932
 933                boost_supported = true;
 934                boost_enabled = boost_state(0);
 935
 936                get_online_cpus();
 937
 938                /* Force all MSRs to the same value */
 939                boost_set_msrs(boost_enabled, cpu_online_mask);
 940
 941                register_cpu_notifier(&boost_nb);
 942
 943                put_online_cpus();
 944        } else
 945                global_boost.attr.mode = 0444;
 946
 947        /* We create the boost file in any case, though for systems without
 948         * hardware support it will be read-only and hardwired to return 0.
 949         */
 950        if (sysfs_create_file(cpufreq_global_kobject, &(global_boost.attr)))
 951                pr_warn(PFX "could not register global boost sysfs file\n");
 952        else
 953                pr_debug("registered global boost sysfs file\n");
 954}
 955
 956static void __exit acpi_cpufreq_boost_exit(void)
 957{
 958        sysfs_remove_file(cpufreq_global_kobject, &(global_boost.attr));
 959
 960        if (msrs) {
 961                unregister_cpu_notifier(&boost_nb);
 962
 963                msrs_free(msrs);
 964                msrs = NULL;
 965        }
 966}
 967
 968static int __init acpi_cpufreq_init(void)
 969{
 970        int ret;
 971
 972        if (acpi_disabled)
 973                return 0;
 974
 975        pr_debug("acpi_cpufreq_init\n");
 976
 977        ret = acpi_cpufreq_early_init();
 978        if (ret)
 979                return ret;
 980
 981#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
 982        /* this is a sysfs file with a strange name and an even stranger
 983         * semantic - per CPU instantiation, but system global effect.
 984         * Lets enable it only on AMD CPUs for compatibility reasons and
 985         * only if configured. This is considered legacy code, which
 986         * will probably be removed at some point in the future.
 987         */
 988        if (check_amd_hwpstate_cpu(0)) {
 989                struct freq_attr **iter;
 990
 991                pr_debug("adding sysfs entry for cpb\n");
 992
 993                for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
 994                        ;
 995
 996                /* make sure there is a terminator behind it */
 997                if (iter[1] == NULL)
 998                        *iter = &cpb;
 999        }
1000#endif
1001
1002        ret = cpufreq_register_driver(&acpi_cpufreq_driver);
1003        if (ret)
1004                free_acpi_perf_data();
1005        else
1006                acpi_cpufreq_boost_init();
1007
1008        return ret;
1009}
1010
1011static void __exit acpi_cpufreq_exit(void)
1012{
1013        pr_debug("acpi_cpufreq_exit\n");
1014
1015        acpi_cpufreq_boost_exit();
1016
1017        cpufreq_unregister_driver(&acpi_cpufreq_driver);
1018
1019        free_acpi_perf_data();
1020}
1021
1022module_param(acpi_pstate_strict, uint, 0644);
1023MODULE_PARM_DESC(acpi_pstate_strict,
1024        "value 0 or non-zero. non-zero -> strict ACPI checks are "
1025        "performed during frequency changes.");
1026
1027late_initcall(acpi_cpufreq_init);
1028module_exit(acpi_cpufreq_exit);
1029
1030static const struct x86_cpu_id acpi_cpufreq_ids[] = {
1031        X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1032        X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1033        {}
1034};
1035MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1036
1037MODULE_ALIAS("acpi");
1038