LXR linux/drivers/gpu/drm/nouveau/core/engine/disp/sornvd0.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24
  25#include <core/os.h>
  26#include <core/class.h>
  27
  28#include <subdev/bios.h>
  29#include <subdev/bios/dcb.h>
  30#include <subdev/bios/dp.h>
  31#include <subdev/bios/init.h>
  32
  33#include "nv50.h"
  34
  35static inline u32
  36nvd0_sor_soff(struct dcb_output *outp)
  37{
  38        return (ffs(outp->or) - 1) * 0x800;
  39}
  40
  41static inline u32
  42nvd0_sor_loff(struct dcb_output *outp)
  43{
  44        return nvd0_sor_soff(outp) + !(outp->sorconf.link & 1) * 0x80;
  45}
  46
  47static inline u32
  48nvd0_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane)
  49{
  50        static const u8 nvd0[] = { 16, 8, 0, 24 };
  51        return nvd0[lane];
  52}
  53
  54static int
  55nvd0_sor_dp_pattern(struct nouveau_disp *disp, struct dcb_output *outp,
  56                    int head, int pattern)
  57{
  58        struct nv50_disp_priv *priv = (void *)disp;
  59        const u32 loff = nvd0_sor_loff(outp);
  60        nv_mask(priv, 0x61c110 + loff, 0x0f0f0f0f, 0x01010101 * pattern);
  61        return 0;
  62}
  63
  64static int
  65nvd0_sor_dp_lnk_ctl(struct nouveau_disp *disp, struct dcb_output *outp,
  66                    int head, int link_nr, int link_bw, bool enh_frame)
  67{
  68        struct nv50_disp_priv *priv = (void *)disp;
  69        const u32 soff = nvd0_sor_soff(outp);
  70        const u32 loff = nvd0_sor_loff(outp);
  71        u32 dpctrl = 0x00000000;
  72        u32 clksor = 0x00000000;
  73        u32 lane = 0;
  74        int i;
  75
  76        clksor |= link_bw << 18;
  77        dpctrl |= ((1 << link_nr) - 1) << 16;
  78        if (enh_frame)
  79                dpctrl |= 0x00004000;
  80
  81        for (i = 0; i < link_nr; i++)
  82                lane |= 1 << (nvd0_sor_dp_lane_map(priv, i) >> 3);
  83
  84        nv_mask(priv, 0x612300 + soff, 0x007c0000, clksor);
  85        nv_mask(priv, 0x61c10c + loff, 0x001f4000, dpctrl);
  86        nv_mask(priv, 0x61c130 + loff, 0x0000000f, lane);
  87        return 0;
  88}
  89
  90static int
  91nvd0_sor_dp_drv_ctl(struct nouveau_disp *disp, struct dcb_output *outp,
  92                    int head, int lane, int swing, int preem)
  93{
  94        struct nouveau_bios *bios = nouveau_bios(disp);
  95        struct nv50_disp_priv *priv = (void *)disp;
  96        const u32 loff = nvd0_sor_loff(outp);
  97        u32 addr, shift = nvd0_sor_dp_lane_map(priv, lane);
  98        u8  ver, hdr, cnt, len;
  99        struct nvbios_dpout info;
 100        struct nvbios_dpcfg ocfg;
 101
 102        addr = nvbios_dpout_match(bios, outp->hasht, outp->hashm,
 103                                 &ver, &hdr, &cnt, &len, &info);
 104        if (!addr)
 105                return -ENODEV;
 106
 107        addr = nvbios_dpcfg_match(bios, addr, 0, swing, preem,
 108                                 &ver, &hdr, &cnt, &len, &ocfg);
 109        if (!addr)
 110                return -EINVAL;
 111
 112        nv_mask(priv, 0x61c118 + loff, 0x000000ff << shift, ocfg.drv << shift);
 113        nv_mask(priv, 0x61c120 + loff, 0x000000ff << shift, ocfg.pre << shift);
 114        nv_mask(priv, 0x61c130 + loff, 0x0000ff00, ocfg.unk << 8);
 115        nv_mask(priv, 0x61c13c + loff, 0x00000000, 0x00000000);
 116        return 0;
 117}
 118
 119const struct nouveau_dp_func
 120nvd0_sor_dp_func = {
 121        .pattern = nvd0_sor_dp_pattern,
 122        .lnk_ctl = nvd0_sor_dp_lnk_ctl,
 123        .drv_ctl = nvd0_sor_dp_drv_ctl,
 124};
 125