LXR linux/drivers/gpu/drm/tilcdc/tilcdc

   1/*
   2 * Copyright (C) 2012 Texas Instruments
   3 * Author: Rob Clark <robdclark@gmail.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of the GNU General Public License version 2 as published by
   7 * the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18#ifndef __TILCDC_DRV_H__
  19#define __TILCDC_DRV_H__
  20
  21#include <linux/clk.h>
  22#include <linux/cpufreq.h>
  23#include <linux/module.h>
  24#include <linux/platform_device.h>
  25#include <linux/pm.h>
  26#include <linux/pm_runtime.h>
  27#include <linux/slab.h>
  28#include <linux/of.h>
  29#include <linux/of_device.h>
  30#include <linux/list.h>
  31
  32#include <drm/drmP.h>
  33#include <drm/drm_crtc_helper.h>
  34#include <drm/drm_gem_cma_helper.h>
  35#include <drm/drm_fb_cma_helper.h>
  36
  37struct tilcdc_drm_private {
  38        void __iomem *mmio;
  39
  40        struct clk *disp_clk;    /* display dpll */
  41        struct clk *clk;         /* functional clock */
  42        int rev;                 /* IP revision */
  43
  44        /* don't attempt resolutions w/ higher W * H * Hz: */
  45        uint32_t max_bandwidth;
  46
  47        /* register contents saved across suspend/resume: */
  48        u32 saved_register[12];
  49
  50#ifdef CONFIG_CPU_FREQ
  51        struct notifier_block freq_transition;
  52        unsigned int lcd_fck_rate;
  53#endif
  54
  55        struct workqueue_struct *wq;
  56
  57        struct drm_fbdev_cma *fbdev;
  58
  59        struct drm_crtc *crtc;
  60
  61        unsigned int num_encoders;
  62        struct drm_encoder *encoders[8];
  63
  64        unsigned int num_connectors;
  65        struct drm_connector *connectors[8];
  66};
  67
  68/* Sub-module for display.  Since we don't know at compile time what panels
  69 * or display adapter(s) might be present (for ex, off chip dvi/tfp410,
  70 * hdmi encoder, various lcd panels), the connector/encoder(s) are split into
  71 * separate drivers.  If they are probed and found to be present, they
  72 * register themselves with tilcdc_register_module().
  73 */
  74struct tilcdc_module;
  75
  76struct tilcdc_module_ops {
  77        /* create appropriate encoders/connectors: */
  78        int (*modeset_init)(struct tilcdc_module *mod, struct drm_device *dev);
  79        void (*destroy)(struct tilcdc_module *mod);
  80#ifdef CONFIG_DEBUG_FS
  81        /* create debugfs nodes (can be NULL): */
  82        int (*debugfs_init)(struct tilcdc_module *mod, struct drm_minor *minor);
  83        /* cleanup debugfs nodes (can be NULL): */
  84        void (*debugfs_cleanup)(struct tilcdc_module *mod, struct drm_minor *minor);
  85#endif
  86};
  87
  88struct tilcdc_module {
  89        const char *name;
  90        struct list_head list;
  91        const struct tilcdc_module_ops *funcs;
  92};
  93
  94void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  95                const struct tilcdc_module_ops *funcs);
  96void tilcdc_module_cleanup(struct tilcdc_module *mod);
  97
  98
  99/* Panel config that needs to be set in the crtc, but is not coming from
 100 * the mode timings.  The display module is expected to call
 101 * tilcdc_crtc_set_panel_info() to set this during modeset.
 102 */
 103struct tilcdc_panel_info {
 104
 105        /* AC Bias Pin Frequency */
 106        uint32_t ac_bias;
 107
 108        /* AC Bias Pin Transitions per Interrupt */
 109        uint32_t ac_bias_intrpt;
 110
 111        /* DMA burst size */
 112        uint32_t dma_burst_sz;
 113
 114        /* Bits per pixel */
 115        uint32_t bpp;
 116
 117        /* FIFO DMA Request Delay */
 118        uint32_t fdd;
 119
 120        /* TFT Alternative Signal Mapping (Only for active) */
 121        bool tft_alt_mode;
 122
 123        /* Invert pixel clock */
 124        bool invert_pxl_clk;
 125
 126        /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
 127        uint32_t sync_edge;
 128
 129        /* Horizontal and Vertical Sync: Control: 0=ignore */
 130        uint32_t sync_ctrl;
 131
 132        /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
 133        uint32_t raster_order;
 134
 135        /* DMA FIFO threshold */
 136        uint32_t fifo_th;
 137};
 138
 139#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
 140
 141struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev);
 142void tilcdc_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
 143irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc);
 144void tilcdc_crtc_update_clk(struct drm_crtc *crtc);
 145void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,
 146                const struct tilcdc_panel_info *info);
 147int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode);
 148int tilcdc_crtc_max_width(struct drm_crtc *crtc);
 149
 150#endif /* __TILCDC_DRV_H__ */
 151