linux/drivers/hwmon/coretemp.c
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   1/*
   2 * coretemp.c - Linux kernel module for hardware monitoring
   3 *
   4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
   5 *
   6 * Inspired from many hwmon drivers
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; version 2 of the License.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20 * 02110-1301 USA.
  21 */
  22
  23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24
  25#include <linux/module.h>
  26#include <linux/init.h>
  27#include <linux/slab.h>
  28#include <linux/jiffies.h>
  29#include <linux/hwmon.h>
  30#include <linux/sysfs.h>
  31#include <linux/hwmon-sysfs.h>
  32#include <linux/err.h>
  33#include <linux/mutex.h>
  34#include <linux/list.h>
  35#include <linux/platform_device.h>
  36#include <linux/cpu.h>
  37#include <linux/smp.h>
  38#include <linux/moduleparam.h>
  39#include <asm/msr.h>
  40#include <asm/processor.h>
  41#include <asm/cpu_device_id.h>
  42
  43#define DRVNAME "coretemp"
  44
  45/*
  46 * force_tjmax only matters when TjMax can't be read from the CPU itself.
  47 * When set, it replaces the driver's suboptimal heuristic.
  48 */
  49static int force_tjmax;
  50module_param_named(tjmax, force_tjmax, int, 0444);
  51MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  52
  53#define BASE_SYSFS_ATTR_NO      2       /* Sysfs Base attr no for coretemp */
  54#define NUM_REAL_CORES          32      /* Number of Real cores per cpu */
  55#define CORETEMP_NAME_LENGTH    17      /* String Length of attrs */
  56#define MAX_CORE_ATTRS          4       /* Maximum no of basic attrs */
  57#define TOTAL_ATTRS             (MAX_CORE_ATTRS + 1)
  58#define MAX_CORE_DATA           (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  59
  60#define TO_PHYS_ID(cpu)         (cpu_data(cpu).phys_proc_id)
  61#define TO_CORE_ID(cpu)         (cpu_data(cpu).cpu_core_id)
  62#define TO_ATTR_NO(cpu)         (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  63
  64#ifdef CONFIG_SMP
  65#define for_each_sibling(i, cpu)        for_each_cpu(i, cpu_sibling_mask(cpu))
  66#else
  67#define for_each_sibling(i, cpu)        for (i = 0; false; )
  68#endif
  69
  70/*
  71 * Per-Core Temperature Data
  72 * @last_updated: The time when the current temperature value was updated
  73 *              earlier (in jiffies).
  74 * @cpu_core_id: The CPU Core from which temperature values should be read
  75 *              This value is passed as "id" field to rdmsr/wrmsr functions.
  76 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  77 *              from where the temperature values should be read.
  78 * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
  79 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  80 *              Otherwise, temp_data holds coretemp data.
  81 * @valid: If this is 1, the current temperature is valid.
  82 */
  83struct temp_data {
  84        int temp;
  85        int ttarget;
  86        int tjmax;
  87        unsigned long last_updated;
  88        unsigned int cpu;
  89        u32 cpu_core_id;
  90        u32 status_reg;
  91        int attr_size;
  92        bool is_pkg_data;
  93        bool valid;
  94        struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  95        char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  96        struct mutex update_lock;
  97};
  98
  99/* Platform Data per Physical CPU */
 100struct platform_data {
 101        struct device *hwmon_dev;
 102        u16 phys_proc_id;
 103        struct temp_data *core_data[MAX_CORE_DATA];
 104        struct device_attribute name_attr;
 105};
 106
 107struct pdev_entry {
 108        struct list_head list;
 109        struct platform_device *pdev;
 110        u16 phys_proc_id;
 111};
 112
 113static LIST_HEAD(pdev_list);
 114static DEFINE_MUTEX(pdev_list_mutex);
 115
 116static ssize_t show_name(struct device *dev,
 117                        struct device_attribute *devattr, char *buf)
 118{
 119        return sprintf(buf, "%s\n", DRVNAME);
 120}
 121
 122static ssize_t show_label(struct device *dev,
 123                                struct device_attribute *devattr, char *buf)
 124{
 125        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 126        struct platform_data *pdata = dev_get_drvdata(dev);
 127        struct temp_data *tdata = pdata->core_data[attr->index];
 128
 129        if (tdata->is_pkg_data)
 130                return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
 131
 132        return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
 133}
 134
 135static ssize_t show_crit_alarm(struct device *dev,
 136                                struct device_attribute *devattr, char *buf)
 137{
 138        u32 eax, edx;
 139        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 140        struct platform_data *pdata = dev_get_drvdata(dev);
 141        struct temp_data *tdata = pdata->core_data[attr->index];
 142
 143        rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 144
 145        return sprintf(buf, "%d\n", (eax >> 5) & 1);
 146}
 147
 148static ssize_t show_tjmax(struct device *dev,
 149                        struct device_attribute *devattr, char *buf)
 150{
 151        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 152        struct platform_data *pdata = dev_get_drvdata(dev);
 153
 154        return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
 155}
 156
 157static ssize_t show_ttarget(struct device *dev,
 158                                struct device_attribute *devattr, char *buf)
 159{
 160        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 161        struct platform_data *pdata = dev_get_drvdata(dev);
 162
 163        return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
 164}
 165
 166static ssize_t show_temp(struct device *dev,
 167                        struct device_attribute *devattr, char *buf)
 168{
 169        u32 eax, edx;
 170        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 171        struct platform_data *pdata = dev_get_drvdata(dev);
 172        struct temp_data *tdata = pdata->core_data[attr->index];
 173
 174        mutex_lock(&tdata->update_lock);
 175
 176        /* Check whether the time interval has elapsed */
 177        if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
 178                rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 179                tdata->valid = 0;
 180                /* Check whether the data is valid */
 181                if (eax & 0x80000000) {
 182                        tdata->temp = tdata->tjmax -
 183                                        ((eax >> 16) & 0x7f) * 1000;
 184                        tdata->valid = 1;
 185                }
 186                tdata->last_updated = jiffies;
 187        }
 188
 189        mutex_unlock(&tdata->update_lock);
 190        return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
 191}
 192
 193struct tjmax {
 194        char const *id;
 195        int tjmax;
 196};
 197
 198static const struct tjmax __cpuinitconst tjmax_table[] = {
 199        { "CPU  230", 100000 },         /* Model 0x1c, stepping 2       */
 200        { "CPU  330", 125000 },         /* Model 0x1c, stepping 2       */
 201        { "CPU CE4110", 110000 },       /* Model 0x1c, stepping 10 Sodaville */
 202        { "CPU CE4150", 110000 },       /* Model 0x1c, stepping 10      */
 203        { "CPU CE4170", 110000 },       /* Model 0x1c, stepping 10      */
 204};
 205
 206struct tjmax_model {
 207        u8 model;
 208        u8 mask;
 209        int tjmax;
 210};
 211
 212#define ANY 0xff
 213
 214static const struct tjmax_model __cpuinitconst tjmax_model_table[] = {
 215        { 0x1c, 10, 100000 },   /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
 216        { 0x1c, ANY, 90000 },   /* Z5xx, N2xx, possibly others
 217                                 * Note: Also matches 230 and 330,
 218                                 * which are covered by tjmax_table
 219                                 */
 220        { 0x26, ANY, 90000 },   /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
 221                                 * Note: TjMax for E6xxT is 110C, but CPU type
 222                                 * is undetectable by software
 223                                 */
 224        { 0x27, ANY, 90000 },   /* Atom Medfield (Z2460) */
 225        { 0x35, ANY, 90000 },   /* Atom Clover Trail/Cloverview (Z2760) */
 226        { 0x36, ANY, 100000 },  /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
 227};
 228
 229static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
 230                                  struct device *dev)
 231{
 232        /* The 100C is default for both mobile and non mobile CPUs */
 233
 234        int tjmax = 100000;
 235        int tjmax_ee = 85000;
 236        int usemsr_ee = 1;
 237        int err;
 238        u32 eax, edx;
 239        int i;
 240
 241        /* explicit tjmax table entries override heuristics */
 242        for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
 243                if (strstr(c->x86_model_id, tjmax_table[i].id))
 244                        return tjmax_table[i].tjmax;
 245        }
 246
 247        for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
 248                const struct tjmax_model *tm = &tjmax_model_table[i];
 249                if (c->x86_model == tm->model &&
 250                    (tm->mask == ANY || c->x86_mask == tm->mask))
 251                        return tm->tjmax;
 252        }
 253
 254        /* Early chips have no MSR for TjMax */
 255
 256        if (c->x86_model == 0xf && c->x86_mask < 4)
 257                usemsr_ee = 0;
 258
 259        if (c->x86_model > 0xe && usemsr_ee) {
 260                u8 platform_id;
 261
 262                /*
 263                 * Now we can detect the mobile CPU using Intel provided table
 264                 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
 265                 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
 266                 */
 267                err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
 268                if (err) {
 269                        dev_warn(dev,
 270                                 "Unable to access MSR 0x17, assuming desktop"
 271                                 " CPU\n");
 272                        usemsr_ee = 0;
 273                } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
 274                        /*
 275                         * Trust bit 28 up to Penryn, I could not find any
 276                         * documentation on that; if you happen to know
 277                         * someone at Intel please ask
 278                         */
 279                        usemsr_ee = 0;
 280                } else {
 281                        /* Platform ID bits 52:50 (EDX starts at bit 32) */
 282                        platform_id = (edx >> 18) & 0x7;
 283
 284                        /*
 285                         * Mobile Penryn CPU seems to be platform ID 7 or 5
 286                         * (guesswork)
 287                         */
 288                        if (c->x86_model == 0x17 &&
 289                            (platform_id == 5 || platform_id == 7)) {
 290                                /*
 291                                 * If MSR EE bit is set, set it to 90 degrees C,
 292                                 * otherwise 105 degrees C
 293                                 */
 294                                tjmax_ee = 90000;
 295                                tjmax = 105000;
 296                        }
 297                }
 298        }
 299
 300        if (usemsr_ee) {
 301                err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
 302                if (err) {
 303                        dev_warn(dev,
 304                                 "Unable to access MSR 0xEE, for Tjmax, left"
 305                                 " at default\n");
 306                } else if (eax & 0x40000000) {
 307                        tjmax = tjmax_ee;
 308                }
 309        } else if (tjmax == 100000) {
 310                /*
 311                 * If we don't use msr EE it means we are desktop CPU
 312                 * (with exeception of Atom)
 313                 */
 314                dev_warn(dev, "Using relative temperature scale!\n");
 315        }
 316
 317        return tjmax;
 318}
 319
 320static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
 321                               struct device *dev)
 322{
 323        int err;
 324        u32 eax, edx;
 325        u32 val;
 326
 327        /*
 328         * A new feature of current Intel(R) processors, the
 329         * IA32_TEMPERATURE_TARGET contains the TjMax value
 330         */
 331        err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
 332        if (err) {
 333                if (c->x86_model > 0xe && c->x86_model != 0x1c)
 334                        dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
 335        } else {
 336                val = (eax >> 16) & 0xff;
 337                /*
 338                 * If the TjMax is not plausible, an assumption
 339                 * will be used
 340                 */
 341                if (val) {
 342                        dev_dbg(dev, "TjMax is %d degrees C\n", val);
 343                        return val * 1000;
 344                }
 345        }
 346
 347        if (force_tjmax) {
 348                dev_notice(dev, "TjMax forced to %d degrees C by user\n",
 349                           force_tjmax);
 350                return force_tjmax * 1000;
 351        }
 352
 353        /*
 354         * An assumption is made for early CPUs and unreadable MSR.
 355         * NOTE: the calculated value may not be correct.
 356         */
 357        return adjust_tjmax(c, id, dev);
 358}
 359
 360static int create_name_attr(struct platform_data *pdata,
 361                                      struct device *dev)
 362{
 363        sysfs_attr_init(&pdata->name_attr.attr);
 364        pdata->name_attr.attr.name = "name";
 365        pdata->name_attr.attr.mode = S_IRUGO;
 366        pdata->name_attr.show = show_name;
 367        return device_create_file(dev, &pdata->name_attr);
 368}
 369
 370static int __cpuinit create_core_attrs(struct temp_data *tdata,
 371                                       struct device *dev, int attr_no)
 372{
 373        int err, i;
 374        static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
 375                        struct device_attribute *devattr, char *buf) = {
 376                        show_label, show_crit_alarm, show_temp, show_tjmax,
 377                        show_ttarget };
 378        static const char *const names[TOTAL_ATTRS] = {
 379                                        "temp%d_label", "temp%d_crit_alarm",
 380                                        "temp%d_input", "temp%d_crit",
 381                                        "temp%d_max" };
 382
 383        for (i = 0; i < tdata->attr_size; i++) {
 384                snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
 385                        attr_no);
 386                sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
 387                tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
 388                tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
 389                tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
 390                tdata->sd_attrs[i].index = attr_no;
 391                err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
 392                if (err)
 393                        goto exit_free;
 394        }
 395        return 0;
 396
 397exit_free:
 398        while (--i >= 0)
 399                device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
 400        return err;
 401}
 402
 403
 404static int __cpuinit chk_ucode_version(unsigned int cpu)
 405{
 406        struct cpuinfo_x86 *c = &cpu_data(cpu);
 407
 408        /*
 409         * Check if we have problem with errata AE18 of Core processors:
 410         * Readings might stop update when processor visited too deep sleep,
 411         * fixed for stepping D0 (6EC).
 412         */
 413        if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
 414                pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
 415                return -ENODEV;
 416        }
 417        return 0;
 418}
 419
 420static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
 421{
 422        u16 phys_proc_id = TO_PHYS_ID(cpu);
 423        struct pdev_entry *p;
 424
 425        mutex_lock(&pdev_list_mutex);
 426
 427        list_for_each_entry(p, &pdev_list, list)
 428                if (p->phys_proc_id == phys_proc_id) {
 429                        mutex_unlock(&pdev_list_mutex);
 430                        return p->pdev;
 431                }
 432
 433        mutex_unlock(&pdev_list_mutex);
 434        return NULL;
 435}
 436
 437static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
 438                                                  int pkg_flag)
 439{
 440        struct temp_data *tdata;
 441
 442        tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
 443        if (!tdata)
 444                return NULL;
 445
 446        tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
 447                                                        MSR_IA32_THERM_STATUS;
 448        tdata->is_pkg_data = pkg_flag;
 449        tdata->cpu = cpu;
 450        tdata->cpu_core_id = TO_CORE_ID(cpu);
 451        tdata->attr_size = MAX_CORE_ATTRS;
 452        mutex_init(&tdata->update_lock);
 453        return tdata;
 454}
 455
 456static int __cpuinit create_core_data(struct platform_device *pdev,
 457                                unsigned int cpu, int pkg_flag)
 458{
 459        struct temp_data *tdata;
 460        struct platform_data *pdata = platform_get_drvdata(pdev);
 461        struct cpuinfo_x86 *c = &cpu_data(cpu);
 462        u32 eax, edx;
 463        int err, attr_no;
 464
 465        /*
 466         * Find attr number for sysfs:
 467         * We map the attr number to core id of the CPU
 468         * The attr number is always core id + 2
 469         * The Pkgtemp will always show up as temp1_*, if available
 470         */
 471        attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
 472
 473        if (attr_no > MAX_CORE_DATA - 1)
 474                return -ERANGE;
 475
 476        /*
 477         * Provide a single set of attributes for all HT siblings of a core
 478         * to avoid duplicate sensors (the processor ID and core ID of all
 479         * HT siblings of a core are the same).
 480         * Skip if a HT sibling of this core is already registered.
 481         * This is not an error.
 482         */
 483        if (pdata->core_data[attr_no] != NULL)
 484                return 0;
 485
 486        tdata = init_temp_data(cpu, pkg_flag);
 487        if (!tdata)
 488                return -ENOMEM;
 489
 490        /* Test if we can access the status register */
 491        err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
 492        if (err)
 493                goto exit_free;
 494
 495        /* We can access status register. Get Critical Temperature */
 496        tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
 497
 498        /*
 499         * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
 500         * The target temperature is available on older CPUs but not in this
 501         * register. Atoms don't have the register at all.
 502         */
 503        if (c->x86_model > 0xe && c->x86_model != 0x1c) {
 504                err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
 505                                        &eax, &edx);
 506                if (!err) {
 507                        tdata->ttarget
 508                          = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
 509                        tdata->attr_size++;
 510                }
 511        }
 512
 513        pdata->core_data[attr_no] = tdata;
 514
 515        /* Create sysfs interfaces */
 516        err = create_core_attrs(tdata, &pdev->dev, attr_no);
 517        if (err)
 518                goto exit_free;
 519
 520        return 0;
 521exit_free:
 522        pdata->core_data[attr_no] = NULL;
 523        kfree(tdata);
 524        return err;
 525}
 526
 527static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
 528{
 529        struct platform_device *pdev = coretemp_get_pdev(cpu);
 530        int err;
 531
 532        if (!pdev)
 533                return;
 534
 535        err = create_core_data(pdev, cpu, pkg_flag);
 536        if (err)
 537                dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
 538}
 539
 540static void coretemp_remove_core(struct platform_data *pdata,
 541                                struct device *dev, int indx)
 542{
 543        int i;
 544        struct temp_data *tdata = pdata->core_data[indx];
 545
 546        /* Remove the sysfs attributes */
 547        for (i = 0; i < tdata->attr_size; i++)
 548                device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
 549
 550        kfree(pdata->core_data[indx]);
 551        pdata->core_data[indx] = NULL;
 552}
 553
 554static int coretemp_probe(struct platform_device *pdev)
 555{
 556        struct platform_data *pdata;
 557        int err;
 558
 559        /* Initialize the per-package data structures */
 560        pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
 561        if (!pdata)
 562                return -ENOMEM;
 563
 564        err = create_name_attr(pdata, &pdev->dev);
 565        if (err)
 566                goto exit_free;
 567
 568        pdata->phys_proc_id = pdev->id;
 569        platform_set_drvdata(pdev, pdata);
 570
 571        pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
 572        if (IS_ERR(pdata->hwmon_dev)) {
 573                err = PTR_ERR(pdata->hwmon_dev);
 574                dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
 575                goto exit_name;
 576        }
 577        return 0;
 578
 579exit_name:
 580        device_remove_file(&pdev->dev, &pdata->name_attr);
 581        platform_set_drvdata(pdev, NULL);
 582exit_free:
 583        kfree(pdata);
 584        return err;
 585}
 586
 587static int coretemp_remove(struct platform_device *pdev)
 588{
 589        struct platform_data *pdata = platform_get_drvdata(pdev);
 590        int i;
 591
 592        for (i = MAX_CORE_DATA - 1; i >= 0; --i)
 593                if (pdata->core_data[i])
 594                        coretemp_remove_core(pdata, &pdev->dev, i);
 595
 596        device_remove_file(&pdev->dev, &pdata->name_attr);
 597        hwmon_device_unregister(pdata->hwmon_dev);
 598        platform_set_drvdata(pdev, NULL);
 599        kfree(pdata);
 600        return 0;
 601}
 602
 603static struct platform_driver coretemp_driver = {
 604        .driver = {
 605                .owner = THIS_MODULE,
 606                .name = DRVNAME,
 607        },
 608        .probe = coretemp_probe,
 609        .remove = coretemp_remove,
 610};
 611
 612static int __cpuinit coretemp_device_add(unsigned int cpu)
 613{
 614        int err;
 615        struct platform_device *pdev;
 616        struct pdev_entry *pdev_entry;
 617
 618        mutex_lock(&pdev_list_mutex);
 619
 620        pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
 621        if (!pdev) {
 622                err = -ENOMEM;
 623                pr_err("Device allocation failed\n");
 624                goto exit;
 625        }
 626
 627        pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
 628        if (!pdev_entry) {
 629                err = -ENOMEM;
 630                goto exit_device_put;
 631        }
 632
 633        err = platform_device_add(pdev);
 634        if (err) {
 635                pr_err("Device addition failed (%d)\n", err);
 636                goto exit_device_free;
 637        }
 638
 639        pdev_entry->pdev = pdev;
 640        pdev_entry->phys_proc_id = pdev->id;
 641
 642        list_add_tail(&pdev_entry->list, &pdev_list);
 643        mutex_unlock(&pdev_list_mutex);
 644
 645        return 0;
 646
 647exit_device_free:
 648        kfree(pdev_entry);
 649exit_device_put:
 650        platform_device_put(pdev);
 651exit:
 652        mutex_unlock(&pdev_list_mutex);
 653        return err;
 654}
 655
 656static void __cpuinit coretemp_device_remove(unsigned int cpu)
 657{
 658        struct pdev_entry *p, *n;
 659        u16 phys_proc_id = TO_PHYS_ID(cpu);
 660
 661        mutex_lock(&pdev_list_mutex);
 662        list_for_each_entry_safe(p, n, &pdev_list, list) {
 663                if (p->phys_proc_id != phys_proc_id)
 664                        continue;
 665                platform_device_unregister(p->pdev);
 666                list_del(&p->list);
 667                kfree(p);
 668        }
 669        mutex_unlock(&pdev_list_mutex);
 670}
 671
 672static bool __cpuinit is_any_core_online(struct platform_data *pdata)
 673{
 674        int i;
 675
 676        /* Find online cores, except pkgtemp data */
 677        for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
 678                if (pdata->core_data[i] &&
 679                        !pdata->core_data[i]->is_pkg_data) {
 680                        return true;
 681                }
 682        }
 683        return false;
 684}
 685
 686static void __cpuinit get_core_online(unsigned int cpu)
 687{
 688        struct cpuinfo_x86 *c = &cpu_data(cpu);
 689        struct platform_device *pdev = coretemp_get_pdev(cpu);
 690        int err;
 691
 692        /*
 693         * CPUID.06H.EAX[0] indicates whether the CPU has thermal
 694         * sensors. We check this bit only, all the early CPUs
 695         * without thermal sensors will be filtered out.
 696         */
 697        if (!cpu_has(c, X86_FEATURE_DTHERM))
 698                return;
 699
 700        if (!pdev) {
 701                /* Check the microcode version of the CPU */
 702                if (chk_ucode_version(cpu))
 703                        return;
 704
 705                /*
 706                 * Alright, we have DTS support.
 707                 * We are bringing the _first_ core in this pkg
 708                 * online. So, initialize per-pkg data structures and
 709                 * then bring this core online.
 710                 */
 711                err = coretemp_device_add(cpu);
 712                if (err)
 713                        return;
 714                /*
 715                 * Check whether pkgtemp support is available.
 716                 * If so, add interfaces for pkgtemp.
 717                 */
 718                if (cpu_has(c, X86_FEATURE_PTS))
 719                        coretemp_add_core(cpu, 1);
 720        }
 721        /*
 722         * Physical CPU device already exists.
 723         * So, just add interfaces for this core.
 724         */
 725        coretemp_add_core(cpu, 0);
 726}
 727
 728static void __cpuinit put_core_offline(unsigned int cpu)
 729{
 730        int i, indx;
 731        struct platform_data *pdata;
 732        struct platform_device *pdev = coretemp_get_pdev(cpu);
 733
 734        /* If the physical CPU device does not exist, just return */
 735        if (!pdev)
 736                return;
 737
 738        pdata = platform_get_drvdata(pdev);
 739
 740        indx = TO_ATTR_NO(cpu);
 741
 742        /* The core id is too big, just return */
 743        if (indx > MAX_CORE_DATA - 1)
 744                return;
 745
 746        if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
 747                coretemp_remove_core(pdata, &pdev->dev, indx);
 748
 749        /*
 750         * If a HT sibling of a core is taken offline, but another HT sibling
 751         * of the same core is still online, register the alternate sibling.
 752         * This ensures that exactly one set of attributes is provided as long
 753         * as at least one HT sibling of a core is online.
 754         */
 755        for_each_sibling(i, cpu) {
 756                if (i != cpu) {
 757                        get_core_online(i);
 758                        /*
 759                         * Display temperature sensor data for one HT sibling
 760                         * per core only, so abort the loop after one such
 761                         * sibling has been found.
 762                         */
 763                        break;
 764                }
 765        }
 766        /*
 767         * If all cores in this pkg are offline, remove the device.
 768         * coretemp_device_remove calls unregister_platform_device,
 769         * which in turn calls coretemp_remove. This removes the
 770         * pkgtemp entry and does other clean ups.
 771         */
 772        if (!is_any_core_online(pdata))
 773                coretemp_device_remove(cpu);
 774}
 775
 776static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
 777                                 unsigned long action, void *hcpu)
 778{
 779        unsigned int cpu = (unsigned long) hcpu;
 780
 781        switch (action) {
 782        case CPU_ONLINE:
 783        case CPU_DOWN_FAILED:
 784                get_core_online(cpu);
 785                break;
 786        case CPU_DOWN_PREPARE:
 787                put_core_offline(cpu);
 788                break;
 789        }
 790        return NOTIFY_OK;
 791}
 792
 793static struct notifier_block coretemp_cpu_notifier __refdata = {
 794        .notifier_call = coretemp_cpu_callback,
 795};
 796
 797static const struct x86_cpu_id __initconst coretemp_ids[] = {
 798        { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
 799        {}
 800};
 801MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
 802
 803static int __init coretemp_init(void)
 804{
 805        int i, err;
 806
 807        /*
 808         * CPUID.06H.EAX[0] indicates whether the CPU has thermal
 809         * sensors. We check this bit only, all the early CPUs
 810         * without thermal sensors will be filtered out.
 811         */
 812        if (!x86_match_cpu(coretemp_ids))
 813                return -ENODEV;
 814
 815        err = platform_driver_register(&coretemp_driver);
 816        if (err)
 817                goto exit;
 818
 819        get_online_cpus();
 820        for_each_online_cpu(i)
 821                get_core_online(i);
 822
 823#ifndef CONFIG_HOTPLUG_CPU
 824        if (list_empty(&pdev_list)) {
 825                put_online_cpus();
 826                err = -ENODEV;
 827                goto exit_driver_unreg;
 828        }
 829#endif
 830
 831        register_hotcpu_notifier(&coretemp_cpu_notifier);
 832        put_online_cpus();
 833        return 0;
 834
 835#ifndef CONFIG_HOTPLUG_CPU
 836exit_driver_unreg:
 837        platform_driver_unregister(&coretemp_driver);
 838#endif
 839exit:
 840        return err;
 841}
 842
 843static void __exit coretemp_exit(void)
 844{
 845        struct pdev_entry *p, *n;
 846
 847        get_online_cpus();
 848        unregister_hotcpu_notifier(&coretemp_cpu_notifier);
 849        mutex_lock(&pdev_list_mutex);
 850        list_for_each_entry_safe(p, n, &pdev_list, list) {
 851                platform_device_unregister(p->pdev);
 852                list_del(&p->list);
 853                kfree(p);
 854        }
 855        mutex_unlock(&pdev_list_mutex);
 856        put_online_cpus();
 857        platform_driver_unregister(&coretemp_driver);
 858}
 859
 860MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
 861MODULE_DESCRIPTION("Intel Core temperature monitor");
 862MODULE_LICENSE("GPL");
 863
 864module_init(coretemp_init)
 865module_exit(coretemp_exit)
 866