linux/drivers/net/usb/ax88179_178a.c
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   1/*
   2 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
   3 *
   4 * Copyright (C) 2011-2013 ASIX
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License
   8 * as published by the Free Software Foundation; either version 2
   9 * of the License, or (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  19 */
  20
  21#include <linux/module.h>
  22#include <linux/etherdevice.h>
  23#include <linux/mii.h>
  24#include <linux/usb.h>
  25#include <linux/crc32.h>
  26#include <linux/usb/usbnet.h>
  27
  28#define AX88179_PHY_ID                          0x03
  29#define AX_EEPROM_LEN                           0x100
  30#define AX88179_EEPROM_MAGIC                    0x17900b95
  31#define AX_MCAST_FLTSIZE                        8
  32#define AX_MAX_MCAST                            64
  33#define AX_INT_PPLS_LINK                        ((u32)BIT(16))
  34#define AX_RXHDR_L4_TYPE_MASK                   0x1c
  35#define AX_RXHDR_L4_TYPE_UDP                    4
  36#define AX_RXHDR_L4_TYPE_TCP                    16
  37#define AX_RXHDR_L3CSUM_ERR                     2
  38#define AX_RXHDR_L4CSUM_ERR                     1
  39#define AX_RXHDR_CRC_ERR                        ((u32)BIT(31))
  40#define AX_RXHDR_DROP_ERR                       ((u32)BIT(30))
  41#define AX_ACCESS_MAC                           0x01
  42#define AX_ACCESS_PHY                           0x02
  43#define AX_ACCESS_EEPROM                        0x04
  44#define AX_ACCESS_EFUS                          0x05
  45#define AX_PAUSE_WATERLVL_HIGH                  0x54
  46#define AX_PAUSE_WATERLVL_LOW                   0x55
  47
  48#define PHYSICAL_LINK_STATUS                    0x02
  49        #define AX_USB_SS               0x04
  50        #define AX_USB_HS               0x02
  51
  52#define GENERAL_STATUS                          0x03
  53/* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */
  54        #define AX_SECLD                0x04
  55
  56#define AX_SROM_ADDR                            0x07
  57#define AX_SROM_CMD                             0x0a
  58        #define EEP_RD                  0x04
  59        #define EEP_BUSY                0x10
  60
  61#define AX_SROM_DATA_LOW                        0x08
  62#define AX_SROM_DATA_HIGH                       0x09
  63
  64#define AX_RX_CTL                               0x0b
  65        #define AX_RX_CTL_DROPCRCERR    0x0100
  66        #define AX_RX_CTL_IPE           0x0200
  67        #define AX_RX_CTL_START         0x0080
  68        #define AX_RX_CTL_AP            0x0020
  69        #define AX_RX_CTL_AM            0x0010
  70        #define AX_RX_CTL_AB            0x0008
  71        #define AX_RX_CTL_AMALL         0x0002
  72        #define AX_RX_CTL_PRO           0x0001
  73        #define AX_RX_CTL_STOP          0x0000
  74
  75#define AX_NODE_ID                              0x10
  76#define AX_MULFLTARY                            0x16
  77
  78#define AX_MEDIUM_STATUS_MODE                   0x22
  79        #define AX_MEDIUM_GIGAMODE      0x01
  80        #define AX_MEDIUM_FULL_DUPLEX   0x02
  81        #define AX_MEDIUM_ALWAYS_ONE    0x04
  82        #define AX_MEDIUM_EN_125MHZ     0x08
  83        #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
  84        #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
  85        #define AX_MEDIUM_RECEIVE_EN    0x100
  86        #define AX_MEDIUM_PS            0x200
  87        #define AX_MEDIUM_JUMBO_EN      0x8040
  88
  89#define AX_MONITOR_MOD                          0x24
  90        #define AX_MONITOR_MODE_RWLC    0x02
  91        #define AX_MONITOR_MODE_RWMP    0x04
  92        #define AX_MONITOR_MODE_PMEPOL  0x20
  93        #define AX_MONITOR_MODE_PMETYPE 0x40
  94
  95#define AX_GPIO_CTRL                            0x25
  96        #define AX_GPIO_CTRL_GPIO3EN    0x80
  97        #define AX_GPIO_CTRL_GPIO2EN    0x40
  98        #define AX_GPIO_CTRL_GPIO1EN    0x20
  99
 100#define AX_PHYPWR_RSTCTL                        0x26
 101        #define AX_PHYPWR_RSTCTL_BZ     0x0010
 102        #define AX_PHYPWR_RSTCTL_IPRL   0x0020
 103        #define AX_PHYPWR_RSTCTL_AT     0x1000
 104
 105#define AX_RX_BULKIN_QCTRL                      0x2e
 106#define AX_CLK_SELECT                           0x33
 107        #define AX_CLK_SELECT_BCS       0x01
 108        #define AX_CLK_SELECT_ACS       0x02
 109        #define AX_CLK_SELECT_ULR       0x08
 110
 111#define AX_RXCOE_CTL                            0x34
 112        #define AX_RXCOE_IP             0x01
 113        #define AX_RXCOE_TCP            0x02
 114        #define AX_RXCOE_UDP            0x04
 115        #define AX_RXCOE_TCPV6          0x20
 116        #define AX_RXCOE_UDPV6          0x40
 117
 118#define AX_TXCOE_CTL                            0x35
 119        #define AX_TXCOE_IP             0x01
 120        #define AX_TXCOE_TCP            0x02
 121        #define AX_TXCOE_UDP            0x04
 122        #define AX_TXCOE_TCPV6          0x20
 123        #define AX_TXCOE_UDPV6          0x40
 124
 125#define AX_LEDCTRL                              0x73
 126
 127#define GMII_PHY_PHYSR                          0x11
 128        #define GMII_PHY_PHYSR_SMASK    0xc000
 129        #define GMII_PHY_PHYSR_GIGA     0x8000
 130        #define GMII_PHY_PHYSR_100      0x4000
 131        #define GMII_PHY_PHYSR_FULL     0x2000
 132        #define GMII_PHY_PHYSR_LINK     0x400
 133
 134#define GMII_LED_ACT                            0x1a
 135        #define GMII_LED_ACTIVE_MASK    0xff8f
 136        #define GMII_LED0_ACTIVE        BIT(4)
 137        #define GMII_LED1_ACTIVE        BIT(5)
 138        #define GMII_LED2_ACTIVE        BIT(6)
 139
 140#define GMII_LED_LINK                           0x1c
 141        #define GMII_LED_LINK_MASK      0xf888
 142        #define GMII_LED0_LINK_10       BIT(0)
 143        #define GMII_LED0_LINK_100      BIT(1)
 144        #define GMII_LED0_LINK_1000     BIT(2)
 145        #define GMII_LED1_LINK_10       BIT(4)
 146        #define GMII_LED1_LINK_100      BIT(5)
 147        #define GMII_LED1_LINK_1000     BIT(6)
 148        #define GMII_LED2_LINK_10       BIT(8)
 149        #define GMII_LED2_LINK_100      BIT(9)
 150        #define GMII_LED2_LINK_1000     BIT(10)
 151        #define LED0_ACTIVE             BIT(0)
 152        #define LED0_LINK_10            BIT(1)
 153        #define LED0_LINK_100           BIT(2)
 154        #define LED0_LINK_1000          BIT(3)
 155        #define LED0_FD                 BIT(4)
 156        #define LED0_USB3_MASK          0x001f
 157        #define LED1_ACTIVE             BIT(5)
 158        #define LED1_LINK_10            BIT(6)
 159        #define LED1_LINK_100           BIT(7)
 160        #define LED1_LINK_1000          BIT(8)
 161        #define LED1_FD                 BIT(9)
 162        #define LED1_USB3_MASK          0x03e0
 163        #define LED2_ACTIVE             BIT(10)
 164        #define LED2_LINK_1000          BIT(13)
 165        #define LED2_LINK_100           BIT(12)
 166        #define LED2_LINK_10            BIT(11)
 167        #define LED2_FD                 BIT(14)
 168        #define LED_VALID               BIT(15)
 169        #define LED2_USB3_MASK          0x7c00
 170
 171#define GMII_PHYPAGE                            0x1e
 172#define GMII_PHY_PAGE_SELECT                    0x1f
 173        #define GMII_PHY_PGSEL_EXT      0x0007
 174        #define GMII_PHY_PGSEL_PAGE0    0x0000
 175
 176struct ax88179_data {
 177        u16 rxctl;
 178        u16 reserved;
 179};
 180
 181struct ax88179_int_data {
 182        __le32 intdata1;
 183        __le32 intdata2;
 184};
 185
 186static const struct {
 187        unsigned char ctrl, timer_l, timer_h, size, ifg;
 188} AX88179_BULKIN_SIZE[] =       {
 189        {7, 0x4f, 0,    0x12, 0xff},
 190        {7, 0x20, 3,    0x16, 0xff},
 191        {7, 0xae, 7,    0x18, 0xff},
 192        {7, 0xcc, 0x4c, 0x18, 8},
 193};
 194
 195static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 196                              u16 size, void *data, int in_pm)
 197{
 198        int ret;
 199        int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
 200
 201        BUG_ON(!dev);
 202
 203        if (!in_pm)
 204                fn = usbnet_read_cmd;
 205        else
 206                fn = usbnet_read_cmd_nopm;
 207
 208        ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 209                 value, index, data, size);
 210
 211        if (unlikely(ret < 0))
 212                netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
 213                            index, ret);
 214
 215        return ret;
 216}
 217
 218static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 219                               u16 size, void *data, int in_pm)
 220{
 221        int ret;
 222        int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
 223
 224        BUG_ON(!dev);
 225
 226        if (!in_pm)
 227                fn = usbnet_write_cmd;
 228        else
 229                fn = usbnet_write_cmd_nopm;
 230
 231        ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 232                 value, index, data, size);
 233
 234        if (unlikely(ret < 0))
 235                netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
 236                            index, ret);
 237
 238        return ret;
 239}
 240
 241static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
 242                                    u16 index, u16 size, void *data)
 243{
 244        u16 buf;
 245
 246        if (2 == size) {
 247                buf = *((u16 *)data);
 248                cpu_to_le16s(&buf);
 249                usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
 250                                       USB_RECIP_DEVICE, value, index, &buf,
 251                                       size);
 252        } else {
 253                usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
 254                                       USB_RECIP_DEVICE, value, index, data,
 255                                       size);
 256        }
 257}
 258
 259static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
 260                                 u16 index, u16 size, void *data)
 261{
 262        int ret;
 263
 264        if (2 == size) {
 265                u16 buf;
 266                ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
 267                le16_to_cpus(&buf);
 268                *((u16 *)data) = buf;
 269        } else if (4 == size) {
 270                u32 buf;
 271                ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
 272                le32_to_cpus(&buf);
 273                *((u32 *)data) = buf;
 274        } else {
 275                ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
 276        }
 277
 278        return ret;
 279}
 280
 281static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
 282                                  u16 index, u16 size, void *data)
 283{
 284        int ret;
 285
 286        if (2 == size) {
 287                u16 buf;
 288                buf = *((u16 *)data);
 289                cpu_to_le16s(&buf);
 290                ret = __ax88179_write_cmd(dev, cmd, value, index,
 291                                          size, &buf, 1);
 292        } else {
 293                ret = __ax88179_write_cmd(dev, cmd, value, index,
 294                                          size, data, 1);
 295        }
 296
 297        return ret;
 298}
 299
 300static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 301                            u16 size, void *data)
 302{
 303        int ret;
 304
 305        if (2 == size) {
 306                u16 buf;
 307                ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
 308                le16_to_cpus(&buf);
 309                *((u16 *)data) = buf;
 310        } else if (4 == size) {
 311                u32 buf;
 312                ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
 313                le32_to_cpus(&buf);
 314                *((u32 *)data) = buf;
 315        } else {
 316                ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
 317        }
 318
 319        return ret;
 320}
 321
 322static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 323                             u16 size, void *data)
 324{
 325        int ret;
 326
 327        if (2 == size) {
 328                u16 buf;
 329                buf = *((u16 *)data);
 330                cpu_to_le16s(&buf);
 331                ret = __ax88179_write_cmd(dev, cmd, value, index,
 332                                          size, &buf, 0);
 333        } else {
 334                ret = __ax88179_write_cmd(dev, cmd, value, index,
 335                                          size, data, 0);
 336        }
 337
 338        return ret;
 339}
 340
 341static void ax88179_status(struct usbnet *dev, struct urb *urb)
 342{
 343        struct ax88179_int_data *event;
 344        u32 link;
 345
 346        if (urb->actual_length < 8)
 347                return;
 348
 349        event = urb->transfer_buffer;
 350        le32_to_cpus((void *)&event->intdata1);
 351
 352        link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
 353
 354        if (netif_carrier_ok(dev->net) != link) {
 355                usbnet_link_change(dev, link, 1);
 356                netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
 357        }
 358}
 359
 360static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
 361{
 362        struct usbnet *dev = netdev_priv(netdev);
 363        u16 res;
 364
 365        ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
 366        return res;
 367}
 368
 369static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
 370                               int val)
 371{
 372        struct usbnet *dev = netdev_priv(netdev);
 373        u16 res = (u16) val;
 374
 375        ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
 376}
 377
 378static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
 379{
 380        struct usbnet *dev = usb_get_intfdata(intf);
 381        u16 tmp16;
 382        u8 tmp8;
 383
 384        usbnet_suspend(intf, message);
 385
 386        /* Disable RX path */
 387        ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 388                              2, 2, &tmp16);
 389        tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
 390        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 391                               2, 2, &tmp16);
 392
 393        /* Force bulk-in zero length */
 394        ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
 395                              2, 2, &tmp16);
 396
 397        tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
 398        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
 399                               2, 2, &tmp16);
 400
 401        /* change clock */
 402        tmp8 = 0;
 403        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
 404
 405        /* Configure RX control register => stop operation */
 406        tmp16 = AX_RX_CTL_STOP;
 407        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
 408
 409        return 0;
 410}
 411
 412/* This function is used to enable the autodetach function. */
 413/* This function is determined by offset 0x43 of EEPROM */
 414static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
 415{
 416        u16 tmp16;
 417        u8 tmp8;
 418        int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
 419        int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
 420
 421        if (!in_pm) {
 422                fnr = ax88179_read_cmd;
 423                fnw = ax88179_write_cmd;
 424        } else {
 425                fnr = ax88179_read_cmd_nopm;
 426                fnw = ax88179_write_cmd_nopm;
 427        }
 428
 429        if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
 430                return 0;
 431
 432        if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
 433                return 0;
 434
 435        /* Enable Auto Detach bit */
 436        tmp8 = 0;
 437        fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
 438        tmp8 |= AX_CLK_SELECT_ULR;
 439        fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
 440
 441        fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
 442        tmp16 |= AX_PHYPWR_RSTCTL_AT;
 443        fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
 444
 445        return 0;
 446}
 447
 448static int ax88179_resume(struct usb_interface *intf)
 449{
 450        struct usbnet *dev = usb_get_intfdata(intf);
 451        u16 tmp16;
 452        u8 tmp8;
 453
 454        usbnet_link_change(dev, 0, 0);
 455
 456        /* Power up ethernet PHY */
 457        tmp16 = 0;
 458        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
 459                               2, 2, &tmp16);
 460        udelay(1000);
 461
 462        tmp16 = AX_PHYPWR_RSTCTL_IPRL;
 463        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
 464                               2, 2, &tmp16);
 465        msleep(200);
 466
 467        /* Ethernet PHY Auto Detach*/
 468        ax88179_auto_detach(dev, 1);
 469
 470        /* Enable clock */
 471        ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC,  AX_CLK_SELECT, 1, 1, &tmp8);
 472        tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
 473        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
 474        msleep(100);
 475
 476        /* Configure RX control register => start operation */
 477        tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
 478                AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
 479        ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
 480
 481        return usbnet_resume(intf);
 482}
 483
 484static void
 485ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 486{
 487        struct usbnet *dev = netdev_priv(net);
 488        u8 opt;
 489
 490        if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
 491                             1, 1, &opt) < 0) {
 492                wolinfo->supported = 0;
 493                wolinfo->wolopts = 0;
 494                return;
 495        }
 496
 497        wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
 498        wolinfo->wolopts = 0;
 499        if (opt & AX_MONITOR_MODE_RWLC)
 500                wolinfo->wolopts |= WAKE_PHY;
 501        if (opt & AX_MONITOR_MODE_RWMP)
 502                wolinfo->wolopts |= WAKE_MAGIC;
 503}
 504
 505static int
 506ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 507{
 508        struct usbnet *dev = netdev_priv(net);
 509        u8 opt = 0;
 510
 511        if (wolinfo->wolopts & WAKE_PHY)
 512                opt |= AX_MONITOR_MODE_RWLC;
 513        if (wolinfo->wolopts & WAKE_MAGIC)
 514                opt |= AX_MONITOR_MODE_RWMP;
 515
 516        if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
 517                              1, 1, &opt) < 0)
 518                return -EINVAL;
 519
 520        return 0;
 521}
 522
 523static int ax88179_get_eeprom_len(struct net_device *net)
 524{
 525        return AX_EEPROM_LEN;
 526}
 527
 528static int
 529ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
 530                   u8 *data)
 531{
 532        struct usbnet *dev = netdev_priv(net);
 533        u16 *eeprom_buff;
 534        int first_word, last_word;
 535        int i, ret;
 536
 537        if (eeprom->len == 0)
 538                return -EINVAL;
 539
 540        eeprom->magic = AX88179_EEPROM_MAGIC;
 541
 542        first_word = eeprom->offset >> 1;
 543        last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 544        eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
 545                              GFP_KERNEL);
 546        if (!eeprom_buff)
 547                return -ENOMEM;
 548
 549        /* ax88179/178A returns 2 bytes from eeprom on read */
 550        for (i = first_word; i <= last_word; i++) {
 551                ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
 552                                         &eeprom_buff[i - first_word],
 553                                         0);
 554                if (ret < 0) {
 555                        kfree(eeprom_buff);
 556                        return -EIO;
 557                }
 558        }
 559
 560        memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 561        kfree(eeprom_buff);
 562        return 0;
 563}
 564
 565static int ax88179_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
 566{
 567        struct usbnet *dev = netdev_priv(net);
 568        return mii_ethtool_gset(&dev->mii, cmd);
 569}
 570
 571static int ax88179_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
 572{
 573        struct usbnet *dev = netdev_priv(net);
 574        return mii_ethtool_sset(&dev->mii, cmd);
 575}
 576
 577
 578static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
 579{
 580        struct usbnet *dev = netdev_priv(net);
 581        return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 582}
 583
 584static const struct ethtool_ops ax88179_ethtool_ops = {
 585        .get_link               = ethtool_op_get_link,
 586        .get_msglevel           = usbnet_get_msglevel,
 587        .set_msglevel           = usbnet_set_msglevel,
 588        .get_wol                = ax88179_get_wol,
 589        .set_wol                = ax88179_set_wol,
 590        .get_eeprom_len         = ax88179_get_eeprom_len,
 591        .get_eeprom             = ax88179_get_eeprom,
 592        .get_settings           = ax88179_get_settings,
 593        .set_settings           = ax88179_set_settings,
 594        .nway_reset             = usbnet_nway_reset,
 595};
 596
 597static void ax88179_set_multicast(struct net_device *net)
 598{
 599        struct usbnet *dev = netdev_priv(net);
 600        struct ax88179_data *data = (struct ax88179_data *)dev->data;
 601        u8 *m_filter = ((u8 *)dev->data) + 12;
 602
 603        data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
 604
 605        if (net->flags & IFF_PROMISC) {
 606                data->rxctl |= AX_RX_CTL_PRO;
 607        } else if (net->flags & IFF_ALLMULTI ||
 608                   netdev_mc_count(net) > AX_MAX_MCAST) {
 609                data->rxctl |= AX_RX_CTL_AMALL;
 610        } else if (netdev_mc_empty(net)) {
 611                /* just broadcast and directed */
 612        } else {
 613                /* We use the 20 byte dev->data for our 8 byte filter buffer
 614                 * to avoid allocating memory that is tricky to free later
 615                 */
 616                u32 crc_bits;
 617                struct netdev_hw_addr *ha;
 618
 619                memset(m_filter, 0, AX_MCAST_FLTSIZE);
 620
 621                netdev_for_each_mc_addr(ha, net) {
 622                        crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 623                        *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
 624                }
 625
 626                ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
 627                                        AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
 628                                        m_filter);
 629
 630                data->rxctl |= AX_RX_CTL_AM;
 631        }
 632
 633        ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
 634                                2, 2, &data->rxctl);
 635}
 636
 637static int
 638ax88179_set_features(struct net_device *net, netdev_features_t features)
 639{
 640        u8 tmp;
 641        struct usbnet *dev = netdev_priv(net);
 642        netdev_features_t changed = net->features ^ features;
 643
 644        if (changed & NETIF_F_IP_CSUM) {
 645                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
 646                tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
 647                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
 648        }
 649
 650        if (changed & NETIF_F_IPV6_CSUM) {
 651                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
 652                tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
 653                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
 654        }
 655
 656        if (changed & NETIF_F_RXCSUM) {
 657                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
 658                tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
 659                       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
 660                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
 661        }
 662
 663        return 0;
 664}
 665
 666static int ax88179_change_mtu(struct net_device *net, int new_mtu)
 667{
 668        struct usbnet *dev = netdev_priv(net);
 669        u16 tmp16;
 670
 671        if (new_mtu <= 0 || new_mtu > 4088)
 672                return -EINVAL;
 673
 674        net->mtu = new_mtu;
 675        dev->hard_mtu = net->mtu + net->hard_header_len;
 676
 677        if (net->mtu > 1500) {
 678                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 679                                 2, 2, &tmp16);
 680                tmp16 |= AX_MEDIUM_JUMBO_EN;
 681                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 682                                  2, 2, &tmp16);
 683        } else {
 684                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 685                                 2, 2, &tmp16);
 686                tmp16 &= ~AX_MEDIUM_JUMBO_EN;
 687                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 688                                  2, 2, &tmp16);
 689        }
 690
 691        return 0;
 692}
 693
 694static int ax88179_set_mac_addr(struct net_device *net, void *p)
 695{
 696        struct usbnet *dev = netdev_priv(net);
 697        struct sockaddr *addr = p;
 698
 699        if (netif_running(net))
 700                return -EBUSY;
 701        if (!is_valid_ether_addr(addr->sa_data))
 702                return -EADDRNOTAVAIL;
 703
 704        memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
 705
 706        /* Set the MAC address */
 707        return ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
 708                                 ETH_ALEN, net->dev_addr);
 709}
 710
 711static const struct net_device_ops ax88179_netdev_ops = {
 712        .ndo_open               = usbnet_open,
 713        .ndo_stop               = usbnet_stop,
 714        .ndo_start_xmit         = usbnet_start_xmit,
 715        .ndo_tx_timeout         = usbnet_tx_timeout,
 716        .ndo_change_mtu         = ax88179_change_mtu,
 717        .ndo_set_mac_address    = ax88179_set_mac_addr,
 718        .ndo_validate_addr      = eth_validate_addr,
 719        .ndo_do_ioctl           = ax88179_ioctl,
 720        .ndo_set_rx_mode        = ax88179_set_multicast,
 721        .ndo_set_features       = ax88179_set_features,
 722};
 723
 724static int ax88179_check_eeprom(struct usbnet *dev)
 725{
 726        u8 i, buf, eeprom[20];
 727        u16 csum, delay = HZ / 10;
 728        unsigned long jtimeout;
 729
 730        /* Read EEPROM content */
 731        for (i = 0; i < 6; i++) {
 732                buf = i;
 733                if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
 734                                      1, 1, &buf) < 0)
 735                        return -EINVAL;
 736
 737                buf = EEP_RD;
 738                if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
 739                                      1, 1, &buf) < 0)
 740                        return -EINVAL;
 741
 742                jtimeout = jiffies + delay;
 743                do {
 744                        ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
 745                                         1, 1, &buf);
 746
 747                        if (time_after(jiffies, jtimeout))
 748                                return -EINVAL;
 749
 750                } while (buf & EEP_BUSY);
 751
 752                __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
 753                                   2, 2, &eeprom[i * 2], 0);
 754
 755                if ((i == 0) && (eeprom[0] == 0xFF))
 756                        return -EINVAL;
 757        }
 758
 759        csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
 760        csum = (csum >> 8) + (csum & 0xff);
 761        if ((csum + eeprom[10]) != 0xff)
 762                return -EINVAL;
 763
 764        return 0;
 765}
 766
 767static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
 768{
 769        u8      i;
 770        u8      efuse[64];
 771        u16     csum = 0;
 772
 773        if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
 774                return -EINVAL;
 775
 776        if (*efuse == 0xFF)
 777                return -EINVAL;
 778
 779        for (i = 0; i < 64; i++)
 780                csum = csum + efuse[i];
 781
 782        while (csum > 255)
 783                csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
 784
 785        if (csum != 0xFF)
 786                return -EINVAL;
 787
 788        *ledmode = (efuse[51] << 8) | efuse[52];
 789
 790        return 0;
 791}
 792
 793static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
 794{
 795        u16 led;
 796
 797        /* Loaded the old eFuse LED Mode */
 798        if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
 799                return -EINVAL;
 800
 801        led >>= 8;
 802        switch (led) {
 803        case 0xFF:
 804                led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
 805                      LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
 806                      LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
 807                break;
 808        case 0xFE:
 809                led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
 810                break;
 811        case 0xFD:
 812                led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
 813                      LED2_LINK_10 | LED_VALID;
 814                break;
 815        case 0xFC:
 816                led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
 817                      LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
 818                break;
 819        default:
 820                led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
 821                      LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
 822                      LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
 823                break;
 824        }
 825
 826        *ledvalue = led;
 827
 828        return 0;
 829}
 830
 831static int ax88179_led_setting(struct usbnet *dev)
 832{
 833        u8 ledfd, value = 0;
 834        u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
 835        unsigned long jtimeout;
 836
 837        /* Check AX88179 version. UA1 or UA2*/
 838        ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
 839
 840        if (!(value & AX_SECLD)) {      /* UA1 */
 841                value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
 842                        AX_GPIO_CTRL_GPIO1EN;
 843                if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
 844                                      1, 1, &value) < 0)
 845                        return -EINVAL;
 846        }
 847
 848        /* Check EEPROM */
 849        if (!ax88179_check_eeprom(dev)) {
 850                value = 0x42;
 851                if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
 852                                      1, 1, &value) < 0)
 853                        return -EINVAL;
 854
 855                value = EEP_RD;
 856                if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
 857                                      1, 1, &value) < 0)
 858                        return -EINVAL;
 859
 860                jtimeout = jiffies + delay;
 861                do {
 862                        ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
 863                                         1, 1, &value);
 864
 865                        if (time_after(jiffies, jtimeout))
 866                                return -EINVAL;
 867
 868                } while (value & EEP_BUSY);
 869
 870                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
 871                                 1, 1, &value);
 872                ledvalue = (value << 8);
 873
 874                ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
 875                                 1, 1, &value);
 876                ledvalue |= value;
 877
 878                /* load internal ROM for defaule setting */
 879                if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
 880                        ax88179_convert_old_led(dev, &ledvalue);
 881
 882        } else if (!ax88179_check_efuse(dev, &ledvalue)) {
 883                if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
 884                        ax88179_convert_old_led(dev, &ledvalue);
 885        } else {
 886                ax88179_convert_old_led(dev, &ledvalue);
 887        }
 888
 889        tmp = GMII_PHY_PGSEL_EXT;
 890        ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 891                          GMII_PHY_PAGE_SELECT, 2, &tmp);
 892
 893        tmp = 0x2c;
 894        ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 895                          GMII_PHYPAGE, 2, &tmp);
 896
 897        ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 898                         GMII_LED_ACT, 2, &ledact);
 899
 900        ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 901                         GMII_LED_LINK, 2, &ledlink);
 902
 903        ledact &= GMII_LED_ACTIVE_MASK;
 904        ledlink &= GMII_LED_LINK_MASK;
 905
 906        if (ledvalue & LED0_ACTIVE)
 907                ledact |= GMII_LED0_ACTIVE;
 908
 909        if (ledvalue & LED1_ACTIVE)
 910                ledact |= GMII_LED1_ACTIVE;
 911
 912        if (ledvalue & LED2_ACTIVE)
 913                ledact |= GMII_LED2_ACTIVE;
 914
 915        if (ledvalue & LED0_LINK_10)
 916                ledlink |= GMII_LED0_LINK_10;
 917
 918        if (ledvalue & LED1_LINK_10)
 919                ledlink |= GMII_LED1_LINK_10;
 920
 921        if (ledvalue & LED2_LINK_10)
 922                ledlink |= GMII_LED2_LINK_10;
 923
 924        if (ledvalue & LED0_LINK_100)
 925                ledlink |= GMII_LED0_LINK_100;
 926
 927        if (ledvalue & LED1_LINK_100)
 928                ledlink |= GMII_LED1_LINK_100;
 929
 930        if (ledvalue & LED2_LINK_100)
 931                ledlink |= GMII_LED2_LINK_100;
 932
 933        if (ledvalue & LED0_LINK_1000)
 934                ledlink |= GMII_LED0_LINK_1000;
 935
 936        if (ledvalue & LED1_LINK_1000)
 937                ledlink |= GMII_LED1_LINK_1000;
 938
 939        if (ledvalue & LED2_LINK_1000)
 940                ledlink |= GMII_LED2_LINK_1000;
 941
 942        tmp = ledact;
 943        ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 944                          GMII_LED_ACT, 2, &tmp);
 945
 946        tmp = ledlink;
 947        ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 948                          GMII_LED_LINK, 2, &tmp);
 949
 950        tmp = GMII_PHY_PGSEL_PAGE0;
 951        ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 952                          GMII_PHY_PAGE_SELECT, 2, &tmp);
 953
 954        /* LED full duplex setting */
 955        ledfd = 0;
 956        if (ledvalue & LED0_FD)
 957                ledfd |= 0x01;
 958        else if ((ledvalue & LED0_USB3_MASK) == 0)
 959                ledfd |= 0x02;
 960
 961        if (ledvalue & LED1_FD)
 962                ledfd |= 0x04;
 963        else if ((ledvalue & LED1_USB3_MASK) == 0)
 964                ledfd |= 0x08;
 965
 966        if (ledvalue & LED2_FD)
 967                ledfd |= 0x10;
 968        else if ((ledvalue & LED2_USB3_MASK) == 0)
 969                ledfd |= 0x20;
 970
 971        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
 972
 973        return 0;
 974}
 975
 976static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
 977{
 978        u8 buf[5];
 979        u16 *tmp16;
 980        u8 *tmp;
 981        struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
 982
 983        usbnet_get_endpoints(dev, intf);
 984
 985        tmp16 = (u16 *)buf;
 986        tmp = (u8 *)buf;
 987
 988        memset(ax179_data, 0, sizeof(*ax179_data));
 989
 990        /* Power up ethernet PHY */
 991        *tmp16 = 0;
 992        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
 993        *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
 994        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
 995        msleep(200);
 996
 997        *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
 998        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
 999        msleep(100);
1000
1001        ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1002                         ETH_ALEN, dev->net->dev_addr);
1003        memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1004
1005        /* RX bulk configuration */
1006        memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1007        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1008
1009        dev->rx_urb_size = 1024 * 20;
1010
1011        *tmp = 0x34;
1012        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1013
1014        *tmp = 0x52;
1015        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1016                          1, 1, tmp);
1017
1018        dev->net->netdev_ops = &ax88179_netdev_ops;
1019        dev->net->ethtool_ops = &ax88179_ethtool_ops;
1020        dev->net->needed_headroom = 8;
1021
1022        /* Initialize MII structure */
1023        dev->mii.dev = dev->net;
1024        dev->mii.mdio_read = ax88179_mdio_read;
1025        dev->mii.mdio_write = ax88179_mdio_write;
1026        dev->mii.phy_id_mask = 0xff;
1027        dev->mii.reg_num_mask = 0xff;
1028        dev->mii.phy_id = 0x03;
1029        dev->mii.supports_gmii = 1;
1030
1031        dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1032                              NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1033
1034        dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1035                                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1036
1037        /* Enable checksum offload */
1038        *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1039               AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1040        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1041
1042        *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1043               AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1044        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1045
1046        /* Configure RX control register => start operation */
1047        *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1048                 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1049        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1050
1051        *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1052               AX_MONITOR_MODE_RWMP;
1053        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1054
1055        /* Configure default medium type => giga */
1056        *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1057                 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_ALWAYS_ONE |
1058                 AX_MEDIUM_FULL_DUPLEX | AX_MEDIUM_GIGAMODE;
1059        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1060                          2, 2, tmp16);
1061
1062        ax88179_led_setting(dev);
1063
1064        /* Restart autoneg */
1065        mii_nway_restart(&dev->mii);
1066
1067        usbnet_link_change(dev, 0, 0);
1068
1069        return 0;
1070}
1071
1072static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1073{
1074        u16 tmp16;
1075
1076        /* Configure RX control register => stop operation */
1077        tmp16 = AX_RX_CTL_STOP;
1078        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1079
1080        tmp16 = 0;
1081        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1082
1083        /* Power down ethernet PHY */
1084        tmp16 = 0;
1085        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1086}
1087
1088static void
1089ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1090{
1091        skb->ip_summed = CHECKSUM_NONE;
1092
1093        /* checksum error bit is set */
1094        if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1095            (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1096                return;
1097
1098        /* It must be a TCP or UDP packet with a valid checksum */
1099        if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1100            ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1101                skb->ip_summed = CHECKSUM_UNNECESSARY;
1102}
1103
1104static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1105{
1106        struct sk_buff *ax_skb;
1107        int pkt_cnt;
1108        u32 rx_hdr;
1109        u16 hdr_off;
1110        u32 *pkt_hdr;
1111
1112        skb_trim(skb, skb->len - 4);
1113        memcpy(&rx_hdr, skb_tail_pointer(skb), 4);
1114        le32_to_cpus(&rx_hdr);
1115
1116        pkt_cnt = (u16)rx_hdr;
1117        hdr_off = (u16)(rx_hdr >> 16);
1118        pkt_hdr = (u32 *)(skb->data + hdr_off);
1119
1120        while (pkt_cnt--) {
1121                u16 pkt_len;
1122
1123                le32_to_cpus(pkt_hdr);
1124                pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1125
1126                /* Check CRC or runt packet */
1127                if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1128                    (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1129                        skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1130                        pkt_hdr++;
1131                        continue;
1132                }
1133
1134                if (pkt_cnt == 0) {
1135                        /* Skip IP alignment psudo header */
1136                        skb_pull(skb, 2);
1137                        skb->len = pkt_len;
1138                        skb_set_tail_pointer(skb, pkt_len);
1139                        skb->truesize = pkt_len + sizeof(struct sk_buff);
1140                        ax88179_rx_checksum(skb, pkt_hdr);
1141                        return 1;
1142                }
1143
1144                ax_skb = skb_clone(skb, GFP_ATOMIC);
1145                if (ax_skb) {
1146                        ax_skb->len = pkt_len;
1147                        ax_skb->data = skb->data + 2;
1148                        skb_set_tail_pointer(ax_skb, pkt_len);
1149                        ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1150                        ax88179_rx_checksum(ax_skb, pkt_hdr);
1151                        usbnet_skb_return(dev, ax_skb);
1152                } else {
1153                        return 0;
1154                }
1155
1156                skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1157                pkt_hdr++;
1158        }
1159        return 1;
1160}
1161
1162static struct sk_buff *
1163ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1164{
1165        u32 tx_hdr1, tx_hdr2;
1166        int frame_size = dev->maxpacket;
1167        int mss = skb_shinfo(skb)->gso_size;
1168        int headroom;
1169        int tailroom;
1170
1171        tx_hdr1 = skb->len;
1172        tx_hdr2 = mss;
1173        if (((skb->len + 8) % frame_size) == 0)
1174                tx_hdr2 |= 0x80008000;  /* Enable padding */
1175
1176        skb_linearize(skb);
1177        headroom = skb_headroom(skb);
1178        tailroom = skb_tailroom(skb);
1179
1180        if (!skb_header_cloned(skb) &&
1181            !skb_cloned(skb) &&
1182            (headroom + tailroom) >= 8) {
1183                if (headroom < 8) {
1184                        skb->data = memmove(skb->head + 8, skb->data, skb->len);
1185                        skb_set_tail_pointer(skb, skb->len);
1186                }
1187        } else {
1188                struct sk_buff *skb2;
1189
1190                skb2 = skb_copy_expand(skb, 8, 0, flags);
1191                dev_kfree_skb_any(skb);
1192                skb = skb2;
1193                if (!skb)
1194                        return NULL;
1195        }
1196
1197        skb_push(skb, 4);
1198        cpu_to_le32s(&tx_hdr2);
1199        skb_copy_to_linear_data(skb, &tx_hdr2, 4);
1200
1201        skb_push(skb, 4);
1202        cpu_to_le32s(&tx_hdr1);
1203        skb_copy_to_linear_data(skb, &tx_hdr1, 4);
1204
1205        return skb;
1206}
1207
1208static int ax88179_link_reset(struct usbnet *dev)
1209{
1210        struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1211        u8 tmp[5], link_sts;
1212        u16 mode, tmp16, delay = HZ / 10;
1213        u32 tmp32 = 0x40000000;
1214        unsigned long jtimeout;
1215
1216        jtimeout = jiffies + delay;
1217        while (tmp32 & 0x40000000) {
1218                mode = 0;
1219                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1220                ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1221                                  &ax179_data->rxctl);
1222
1223                /*link up, check the usb device control TX FIFO full or empty*/
1224                ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1225
1226                if (time_after(jiffies, jtimeout))
1227                        return 0;
1228        }
1229
1230        mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1231               AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_ALWAYS_ONE;
1232
1233        ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1234                         1, 1, &link_sts);
1235
1236        ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1237                         GMII_PHY_PHYSR, 2, &tmp16);
1238
1239        if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1240                return 0;
1241        } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1242                mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1243                if (dev->net->mtu > 1500)
1244                        mode |= AX_MEDIUM_JUMBO_EN;
1245
1246                if (link_sts & AX_USB_SS)
1247                        memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1248                else if (link_sts & AX_USB_HS)
1249                        memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1250                else
1251                        memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1252        } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1253                mode |= AX_MEDIUM_PS;
1254
1255                if (link_sts & (AX_USB_SS | AX_USB_HS))
1256                        memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1257                else
1258                        memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1259        } else {
1260                memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1261        }
1262
1263        /* RX bulk configuration */
1264        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1265
1266        dev->rx_urb_size = (1024 * (tmp[3] + 2));
1267
1268        if (tmp16 & GMII_PHY_PHYSR_FULL)
1269                mode |= AX_MEDIUM_FULL_DUPLEX;
1270        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1271                          2, 2, &mode);
1272
1273        netif_carrier_on(dev->net);
1274
1275        return 0;
1276}
1277
1278static int ax88179_reset(struct usbnet *dev)
1279{
1280        u8 buf[5];
1281        u16 *tmp16;
1282        u8 *tmp;
1283
1284        tmp16 = (u16 *)buf;
1285        tmp = (u8 *)buf;
1286
1287        /* Power up ethernet PHY */
1288        *tmp16 = 0;
1289        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1290
1291        *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1292        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1293        msleep(200);
1294
1295        *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1296        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1297        msleep(100);
1298
1299        /* Ethernet PHY Auto Detach*/
1300        ax88179_auto_detach(dev, 0);
1301
1302        ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1303                         dev->net->dev_addr);
1304        memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1305
1306        /* RX bulk configuration */
1307        memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1308        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1309
1310        dev->rx_urb_size = 1024 * 20;
1311
1312        *tmp = 0x34;
1313        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1314
1315        *tmp = 0x52;
1316        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1317                          1, 1, tmp);
1318
1319        dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1320                              NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1321
1322        dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1323                                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1324
1325        /* Enable checksum offload */
1326        *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1327               AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1328        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1329
1330        *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1331               AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1332        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1333
1334        /* Configure RX control register => start operation */
1335        *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1336                 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1337        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1338
1339        *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1340               AX_MONITOR_MODE_RWMP;
1341        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1342
1343        /* Configure default medium type => giga */
1344        *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1345                 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_ALWAYS_ONE |
1346                 AX_MEDIUM_FULL_DUPLEX | AX_MEDIUM_GIGAMODE;
1347        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1348                          2, 2, tmp16);
1349
1350        ax88179_led_setting(dev);
1351
1352        /* Restart autoneg */
1353        mii_nway_restart(&dev->mii);
1354
1355        usbnet_link_change(dev, 0, 0);
1356
1357        return 0;
1358}
1359
1360static int ax88179_stop(struct usbnet *dev)
1361{
1362        u16 tmp16;
1363
1364        ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1365                         2, 2, &tmp16);
1366        tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1367        ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1368                          2, 2, &tmp16);
1369
1370        return 0;
1371}
1372
1373static const struct driver_info ax88179_info = {
1374        .description = "ASIX AX88179 USB 3.0 Gigibit Ethernet",
1375        .bind = ax88179_bind,
1376        .unbind = ax88179_unbind,
1377        .status = ax88179_status,
1378        .link_reset = ax88179_link_reset,
1379        .reset = ax88179_reset,
1380        .stop = ax88179_stop,
1381        .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1382        .rx_fixup = ax88179_rx_fixup,
1383        .tx_fixup = ax88179_tx_fixup,
1384};
1385
1386static const struct driver_info ax88178a_info = {
1387        .description = "ASIX AX88178A USB 2.0 Gigibit Ethernet",
1388        .bind = ax88179_bind,
1389        .unbind = ax88179_unbind,
1390        .status = ax88179_status,
1391        .link_reset = ax88179_link_reset,
1392        .reset = ax88179_reset,
1393        .stop = ax88179_stop,
1394        .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1395        .rx_fixup = ax88179_rx_fixup,
1396        .tx_fixup = ax88179_tx_fixup,
1397};
1398
1399static const struct driver_info sitecom_info = {
1400        .description = "Sitecom USB 3.0 to Gigabit Adapter",
1401        .bind = ax88179_bind,
1402        .unbind = ax88179_unbind,
1403        .status = ax88179_status,
1404        .link_reset = ax88179_link_reset,
1405        .reset = ax88179_reset,
1406        .stop = ax88179_stop,
1407        .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1408        .rx_fixup = ax88179_rx_fixup,
1409        .tx_fixup = ax88179_tx_fixup,
1410};
1411
1412static const struct usb_device_id products[] = {
1413{
1414        /* ASIX AX88179 10/100/1000 */
1415        USB_DEVICE(0x0b95, 0x1790),
1416        .driver_info = (unsigned long)&ax88179_info,
1417}, {
1418        /* ASIX AX88178A 10/100/1000 */
1419        USB_DEVICE(0x0b95, 0x178a),
1420        .driver_info = (unsigned long)&ax88178a_info,
1421}, {
1422        /* Sitecom USB 3.0 to Gigabit Adapter */
1423        USB_DEVICE(0x0df6, 0x0072),
1424        .driver_info = (unsigned long) &sitecom_info,
1425},
1426        { },
1427};
1428MODULE_DEVICE_TABLE(usb, products);
1429
1430static struct usb_driver ax88179_178a_driver = {
1431        .name =         "ax88179_178a",
1432        .id_table =     products,
1433        .probe =        usbnet_probe,
1434        .suspend =      ax88179_suspend,
1435        .resume =       ax88179_resume,
1436        .disconnect =   usbnet_disconnect,
1437        .supports_autosuspend = 1,
1438        .disable_hub_initiated_lpm = 1,
1439};
1440
1441module_usb_driver(ax88179_178a_driver);
1442
1443MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1444MODULE_LICENSE("GPL");
1445