1#ifndef LINUX_B43_PHY_LP_H_
2#define LINUX_B43_PHY_LP_H_
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8#define B43_LPPHY_B_VERSION B43_PHY_CCK(0x00)
9#define B43_LPPHY_B_BBCONFIG B43_PHY_CCK(0x01)
10#define B43_LPPHY_B_RX_STAT0 B43_PHY_CCK(0x04)
11#define B43_LPPHY_B_RX_STAT1 B43_PHY_CCK(0x05)
12#define B43_LPPHY_B_CRS_THRESH B43_PHY_CCK(0x06)
13#define B43_LPPHY_B_TXERROR B43_PHY_CCK(0x07)
14#define B43_LPPHY_B_CHANNEL B43_PHY_CCK(0x08)
15#define B43_LPPHY_B_WORKAROUND B43_PHY_CCK(0x09)
16#define B43_LPPHY_B_TEST B43_PHY_CCK(0x0A)
17#define B43_LPPHY_B_FOURWIRE_ADDR B43_PHY_CCK(0x0B)
18#define B43_LPPHY_B_FOURWIRE_DATA_HI B43_PHY_CCK(0x0C)
19#define B43_LPPHY_B_FOURWIRE_DATA_LO B43_PHY_CCK(0x0D)
20#define B43_LPPHY_B_BIST_STAT B43_PHY_CCK(0x0E)
21#define B43_LPPHY_PA_RAMP_TX_TO B43_PHY_CCK(0x10)
22#define B43_LPPHY_RF_SYNTH_DC_TIMER B43_PHY_CCK(0x11)
23#define B43_LPPHY_PA_RAMP_TX_TIME_IN B43_PHY_CCK(0x12)
24#define B43_LPPHY_RX_FILTER_TIME_IN B43_PHY_CCK(0x13)
25#define B43_LPPHY_PLL_COEFF_S B43_PHY_CCK(0x18)
26#define B43_LPPHY_PLL_OUT B43_PHY_CCK(0x19)
27#define B43_LPPHY_RSSI_THRES B43_PHY_CCK(0x20)
28#define B43_LPPHY_IQ_THRES_HH B43_PHY_CCK(0x21)
29#define B43_LPPHY_IQ_THRES_H B43_PHY_CCK(0x22)
30#define B43_LPPHY_IQ_THRES_L B43_PHY_CCK(0x23)
31#define B43_LPPHY_IQ_THRES_LL B43_PHY_CCK(0x24)
32#define B43_LPPHY_AGC_GAIN B43_PHY_CCK(0x25)
33#define B43_LPPHY_LNA_GAIN_RANGE B43_PHY_CCK(0x26)
34#define B43_LPPHY_JSSI B43_PHY_CCK(0x27)
35#define B43_LPPHY_TSSI_CTL B43_PHY_CCK(0x28)
36#define B43_LPPHY_TSSI B43_PHY_CCK(0x29)
37#define B43_LPPHY_TR_LOSS B43_PHY_CCK(0x2A)
38#define B43_LPPHY_LO_LEAKAGE B43_PHY_CCK(0x2B)
39#define B43_LPPHY_LO_RSSIACC B43_PHY_CCK(0x2C)
40#define B43_LPPHY_LO_IQ_MAG_ACC B43_PHY_CCK(0x2D)
41#define B43_LPPHY_TX_DCOFFSET1 B43_PHY_CCK(0x2E)
42#define B43_LPPHY_TX_DCOFFSET2 B43_PHY_CCK(0x2F)
43#define B43_LPPHY_SYNCPEAKCNT B43_PHY_CCK(0x30)
44#define B43_LPPHY_SYNCFREQ B43_PHY_CCK(0x31)
45#define B43_LPPHY_SYNCDIVERSITYCTL B43_PHY_CCK(0x32)
46#define B43_LPPHY_PEAKENERGYL B43_PHY_CCK(0x33)
47#define B43_LPPHY_PEAKENERGYH B43_PHY_CCK(0x34)
48#define B43_LPPHY_SYNCCTL B43_PHY_CCK(0x35)
49#define B43_LPPHY_DSSSSTEP B43_PHY_CCK(0x38)
50#define B43_LPPHY_DSSSWARMUP B43_PHY_CCK(0x39)
51#define B43_LPPHY_DSSSSIGPOW B43_PHY_CCK(0x3D)
52#define B43_LPPHY_SFDDETECTBLOCKTIME B43_PHY_CCK(0x40)
53#define B43_LPPHY_SFDTO B43_PHY_CCK(0x41)
54#define B43_LPPHY_SFDCTL B43_PHY_CCK(0x42)
55#define B43_LPPHY_RXDBG B43_PHY_CCK(0x43)
56#define B43_LPPHY_RX_DELAYCOMP B43_PHY_CCK(0x44)
57#define B43_LPPHY_CRSDROPOUTTO B43_PHY_CCK(0x45)
58#define B43_LPPHY_PSEUDOSHORTTO B43_PHY_CCK(0x46)
59#define B43_LPPHY_PR3931 B43_PHY_CCK(0x47)
60#define B43_LPPHY_DSSSCOEFF1 B43_PHY_CCK(0x48)
61#define B43_LPPHY_DSSSCOEFF2 B43_PHY_CCK(0x49)
62#define B43_LPPHY_CCKCOEFF1 B43_PHY_CCK(0x4A)
63#define B43_LPPHY_CCKCOEFF2 B43_PHY_CCK(0x4B)
64#define B43_LPPHY_TRCORR B43_PHY_CCK(0x4C)
65#define B43_LPPHY_ANGLESCALE B43_PHY_CCK(0x4D)
66#define B43_LPPHY_OPTIONALMODES2 B43_PHY_CCK(0x4F)
67#define B43_LPPHY_CCKLMSSTEPSIZE B43_PHY_CCK(0x50)
68#define B43_LPPHY_DFEBYPASS B43_PHY_CCK(0x51)
69#define B43_LPPHY_CCKSTARTDELAYLONG B43_PHY_CCK(0x52)
70#define B43_LPPHY_CCKSTARTDELAYSHORT B43_PHY_CCK(0x53)
71#define B43_LPPHY_PPROCCHDELAY B43_PHY_CCK(0x54)
72#define B43_LPPHY_PPROCONOFF B43_PHY_CCK(0x55)
73#define B43_LPPHY_LNAGAINTWOBIT10 B43_PHY_CCK(0x5B)
74#define B43_LPPHY_LNAGAINTWOBIT32 B43_PHY_CCK(0x5C)
75#define B43_LPPHY_OPTIONALMODES B43_PHY_CCK(0x5D)
76#define B43_LPPHY_B_RX_STAT2 B43_PHY_CCK(0x5E)
77#define B43_LPPHY_B_RX_STAT3 B43_PHY_CCK(0x5F)
78#define B43_LPPHY_PWDNDACDELAY B43_PHY_CCK(0x63)
79#define B43_LPPHY_FINEDIGIGAIN_CTL B43_PHY_CCK(0x67)
80#define B43_LPPHY_LG2GAINTBLLNA8 B43_PHY_CCK(0x68)
81#define B43_LPPHY_LG2GAINTBLLNA28 B43_PHY_CCK(0x69)
82#define B43_LPPHY_GAINTBLLNATRSW B43_PHY_CCK(0x6A)
83#define B43_LPPHY_PEAKENERGY B43_PHY_CCK(0x6B)
84#define B43_LPPHY_LG2INITGAIN B43_PHY_CCK(0x6C)
85#define B43_LPPHY_BLANKCOUNTLNAPGA B43_PHY_CCK(0x6D)
86#define B43_LPPHY_LNAGAINTWOBIT54 B43_PHY_CCK(0x6E)
87#define B43_LPPHY_LNAGAINTWOBIT76 B43_PHY_CCK(0x6F)
88#define B43_LPPHY_JSSICTL B43_PHY_CCK(0x70)
89#define B43_LPPHY_LG2GAINTBLLNA44 B43_PHY_CCK(0x71)
90#define B43_LPPHY_LG2GAINTBLLNA62 B43_PHY_CCK(0x72)
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92
93#define B43_LPPHY_VERSION B43_PHY_OFDM(0x00)
94#define B43_LPPHY_BBCONFIG B43_PHY_OFDM(0x01)
95#define B43_LPPHY_RX_STAT0 B43_PHY_OFDM(0x04)
96#define B43_LPPHY_RX_STAT1 B43_PHY_OFDM(0x05)
97#define B43_LPPHY_TX_ERROR B43_PHY_OFDM(0x07)
98#define B43_LPPHY_CHANNEL B43_PHY_OFDM(0x08)
99#define B43_LPPHY_WORKAROUND B43_PHY_OFDM(0x09)
100#define B43_LPPHY_FOURWIRE_ADDR B43_PHY_OFDM(0x0B)
101#define B43_LPPHY_FOURWIREDATAHI B43_PHY_OFDM(0x0C)
102#define B43_LPPHY_FOURWIREDATALO B43_PHY_OFDM(0x0D)
103#define B43_LPPHY_BISTSTAT0 B43_PHY_OFDM(0x0E)
104#define B43_LPPHY_BISTSTAT1 B43_PHY_OFDM(0x0F)
105#define B43_LPPHY_CRSGAIN_CTL B43_PHY_OFDM(0x10)
106#define B43_LPPHY_OFDMPWR_THRESH0 B43_PHY_OFDM(0x11)
107#define B43_LPPHY_OFDMPWR_THRESH1 B43_PHY_OFDM(0x12)
108#define B43_LPPHY_OFDMPWR_THRESH2 B43_PHY_OFDM(0x13)
109#define B43_LPPHY_DSSSPWR_THRESH0 B43_PHY_OFDM(0x14)
110#define B43_LPPHY_DSSSPWR_THRESH1 B43_PHY_OFDM(0x15)
111#define B43_LPPHY_MINPWR_LEVEL B43_PHY_OFDM(0x16)
112#define B43_LPPHY_OFDMSYNCTHRESH0 B43_PHY_OFDM(0x17)
113#define B43_LPPHY_OFDMSYNCTHRESH1 B43_PHY_OFDM(0x18)
114#define B43_LPPHY_FINEFREQEST B43_PHY_OFDM(0x19)
115#define B43_LPPHY_IDLEAFTERPKTRXTO B43_PHY_OFDM(0x1A)
116#define B43_LPPHY_LTRN_CTL B43_PHY_OFDM(0x1B)
117#define B43_LPPHY_DCOFFSETTRANSIENT B43_PHY_OFDM(0x1C)
118#define B43_LPPHY_PREAMBLEINTO B43_PHY_OFDM(0x1D)
119#define B43_LPPHY_PREAMBLECONFIRMTO B43_PHY_OFDM(0x1E)
120#define B43_LPPHY_CLIPTHRESH B43_PHY_OFDM(0x1F)
121#define B43_LPPHY_CLIPCTRTHRESH B43_PHY_OFDM(0x20)
122#define B43_LPPHY_OFDMSYNCTIMER_CTL B43_PHY_OFDM(0x21)
123#define B43_LPPHY_WAITFORPHYSELTO B43_PHY_OFDM(0x22)
124#define B43_LPPHY_HIGAINDB B43_PHY_OFDM(0x23)
125#define B43_LPPHY_LOWGAINDB B43_PHY_OFDM(0x24)
126#define B43_LPPHY_VERYLOWGAINDB B43_PHY_OFDM(0x25)
127#define B43_LPPHY_GAINMISMATCH B43_PHY_OFDM(0x26)
128#define B43_LPPHY_GAINDIRECTMISMATCH B43_PHY_OFDM(0x27)
129#define B43_LPPHY_PWR_THRESH0 B43_PHY_OFDM(0x28)
130#define B43_LPPHY_PWR_THRESH1 B43_PHY_OFDM(0x29)
131#define B43_LPPHY_DETECTOR_DELAY_ADJUST B43_PHY_OFDM(0x2A)
132#define B43_LPPHY_REDUCED_DETECTOR_DELAY B43_PHY_OFDM(0x2B)
133#define B43_LPPHY_DATA_TO B43_PHY_OFDM(0x2C)
134#define B43_LPPHY_CORRELATOR_DIS_DELAY B43_PHY_OFDM(0x2D)
135#define B43_LPPHY_DIVERSITY_GAINBACK B43_PHY_OFDM(0x2E)
136#define B43_LPPHY_DSSS_CONFIRM_CNT B43_PHY_OFDM(0x2F)
137#define B43_LPPHY_DC_BLANK_INT B43_PHY_OFDM(0x30)
138#define B43_LPPHY_GAIN_MISMATCH_LIMIT B43_PHY_OFDM(0x31)
139#define B43_LPPHY_CRS_ED_THRESH B43_PHY_OFDM(0x32)
140#define B43_LPPHY_PHASE_SHIFT_CTL B43_PHY_OFDM(0x33)
141#define B43_LPPHY_INPUT_PWRDB B43_PHY_OFDM(0x34)
142#define B43_LPPHY_OFDM_SYNC_CTL B43_PHY_OFDM(0x35)
143#define B43_LPPHY_AFE_ADC_CTL_0 B43_PHY_OFDM(0x36)
144#define B43_LPPHY_AFE_ADC_CTL_1 B43_PHY_OFDM(0x37)
145#define B43_LPPHY_AFE_ADC_CTL_2 B43_PHY_OFDM(0x38)
146#define B43_LPPHY_AFE_DAC_CTL B43_PHY_OFDM(0x39)
147#define B43_LPPHY_AFE_CTL B43_PHY_OFDM(0x3A)
148#define B43_LPPHY_AFE_CTL_OVR B43_PHY_OFDM(0x3B)
149#define B43_LPPHY_AFE_CTL_OVRVAL B43_PHY_OFDM(0x3C)
150#define B43_LPPHY_AFE_RSSI_CTL_0 B43_PHY_OFDM(0x3D)
151#define B43_LPPHY_AFE_RSSI_CTL_1 B43_PHY_OFDM(0x3E)
152#define B43_LPPHY_AFE_RSSI_SEL B43_PHY_OFDM(0x3F)
153#define B43_LPPHY_RADAR_THRESH B43_PHY_OFDM(0x40)
154#define B43_LPPHY_RADAR_BLANK_INT B43_PHY_OFDM(0x41)
155#define B43_LPPHY_RADAR_MIN_FM_INT B43_PHY_OFDM(0x42)
156#define B43_LPPHY_RADAR_GAIN_TO B43_PHY_OFDM(0x43)
157#define B43_LPPHY_RADAR_PULSE_TO B43_PHY_OFDM(0x44)
158#define B43_LPPHY_RADAR_DETECT_FM_CTL B43_PHY_OFDM(0x45)
159#define B43_LPPHY_RADAR_DETECT_EN B43_PHY_OFDM(0x46)
160#define B43_LPPHY_RADAR_RD_DATA_REG B43_PHY_OFDM(0x47)
161#define B43_LPPHY_LP_PHY_CTL B43_PHY_OFDM(0x48)
162#define B43_LPPHY_CLASSIFIER_CTL B43_PHY_OFDM(0x49)
163#define B43_LPPHY_RESET_CTL B43_PHY_OFDM(0x4A)
164#define B43_LPPHY_CLKEN_CTL B43_PHY_OFDM(0x4B)
165#define B43_LPPHY_RF_OVERRIDE_0 B43_PHY_OFDM(0x4C)
166#define B43_LPPHY_RF_OVERRIDE_VAL_0 B43_PHY_OFDM(0x4D)
167#define B43_LPPHY_TR_LOOKUP_1 B43_PHY_OFDM(0x4E)
168#define B43_LPPHY_TR_LOOKUP_2 B43_PHY_OFDM(0x4F)
169#define B43_LPPHY_RSSISELLOOKUP1 B43_PHY_OFDM(0x50)
170#define B43_LPPHY_IQLO_CAL_CMD B43_PHY_OFDM(0x51)
171#define B43_LPPHY_IQLO_CAL_CMD_N_NUM B43_PHY_OFDM(0x52)
172#define B43_LPPHY_IQLO_CAL_CMD_G_CTL B43_PHY_OFDM(0x53)
173#define B43_LPPHY_MACINT_DBG_REGISTER B43_PHY_OFDM(0x54)
174#define B43_LPPHY_TABLE_ADDR B43_PHY_OFDM(0x55)
175#define B43_LPPHY_TABLEDATALO B43_PHY_OFDM(0x56)
176#define B43_LPPHY_TABLEDATAHI B43_PHY_OFDM(0x57)
177#define B43_LPPHY_PHY_CRS_ENABLE_ADDR B43_PHY_OFDM(0x58)
178#define B43_LPPHY_IDLETIME_CTL B43_PHY_OFDM(0x59)
179#define B43_LPPHY_IDLETIME_CRS_ON_LO B43_PHY_OFDM(0x5A)
180#define B43_LPPHY_IDLETIME_CRS_ON_HI B43_PHY_OFDM(0x5B)
181#define B43_LPPHY_IDLETIME_MEAS_TIME_LO B43_PHY_OFDM(0x5C)
182#define B43_LPPHY_IDLETIME_MEAS_TIME_HI B43_PHY_OFDM(0x5D)
183#define B43_LPPHY_RESET_LEN_OFDM_TX_ADDR B43_PHY_OFDM(0x5E)
184#define B43_LPPHY_RESET_LEN_OFDM_RX_ADDR B43_PHY_OFDM(0x5F)
185#define B43_LPPHY_REG_CRS_ENABLE B43_PHY_OFDM(0x60)
186#define B43_LPPHY_PLCP_TMT_STR0_CTR_MIN B43_PHY_OFDM(0x61)
187#define B43_LPPHY_PKT_FSM_RESET_LEN_VAL B43_PHY_OFDM(0x62)
188#define B43_LPPHY_READSYM2RESET_CTL B43_PHY_OFDM(0x63)
189#define B43_LPPHY_DC_FILTER_DELAY1 B43_PHY_OFDM(0x64)
190#define B43_LPPHY_PACKET_RX_ACTIVE_TO B43_PHY_OFDM(0x65)
191#define B43_LPPHY_ED_TOVAL B43_PHY_OFDM(0x66)
192#define B43_LPPHY_HOLD_CRS_ON_VAL B43_PHY_OFDM(0x67)
193#define B43_LPPHY_OFDM_TX_PHY_CRS_DELAY_VAL B43_PHY_OFDM(0x69)
194#define B43_LPPHY_CCK_TX_PHY_CRS_DELAY_VAL B43_PHY_OFDM(0x6A)
195#define B43_LPPHY_ED_ON_CONFIRM_TIMER_VAL B43_PHY_OFDM(0x6B)
196#define B43_LPPHY_ED_OFFSET_CONFIRM_TIMER_VAL B43_PHY_OFDM(0x6C)
197#define B43_LPPHY_PHY_CRS_OFFSET_TIMER_VAL B43_PHY_OFDM(0x6D)
198#define B43_LPPHY_ADC_COMPENSATION_CTL B43_PHY_OFDM(0x70)
199#define B43_LPPHY_LOG2_RBPSK_ADDR B43_PHY_OFDM(0x71)
200#define B43_LPPHY_LOG2_RQPSK_ADDR B43_PHY_OFDM(0x72)
201#define B43_LPPHY_LOG2_R16QAM_ADDR B43_PHY_OFDM(0x73)
202#define B43_LPPHY_LOG2_R64QAM_ADDR B43_PHY_OFDM(0x74)
203#define B43_LPPHY_OFFSET_BPSK_ADDR B43_PHY_OFDM(0x75)
204#define B43_LPPHY_OFFSET_QPSK_ADDR B43_PHY_OFDM(0x76)
205#define B43_LPPHY_OFFSET_16QAM_ADDR B43_PHY_OFDM(0x77)
206#define B43_LPPHY_OFFSET_64QAM_ADDR B43_PHY_OFDM(0x78)
207#define B43_LPPHY_ALPHA1 B43_PHY_OFDM(0x79)
208#define B43_LPPHY_ALPHA2 B43_PHY_OFDM(0x7A)
209#define B43_LPPHY_BETA1 B43_PHY_OFDM(0x7B)
210#define B43_LPPHY_BETA2 B43_PHY_OFDM(0x7C)
211#define B43_LPPHY_LOOP_NUM_ADDR B43_PHY_OFDM(0x7D)
212#define B43_LPPHY_STR_COLLMAX_SMPL_ADDR B43_PHY_OFDM(0x7E)
213#define B43_LPPHY_MAX_SMPL_COARSE_FINE_ADDR B43_PHY_OFDM(0x7F)
214#define B43_LPPHY_MAX_SMPL_COARSE_STR0CTR_ADDR B43_PHY_OFDM(0x80)
215#define B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR B43_PHY_OFDM(0x81)
216#define B43_LPPHY_IQ_NUM_SMPLS_ADDR B43_PHY_OFDM(0x82)
217#define B43_LPPHY_IQ_ACC_HI_ADDR B43_PHY_OFDM(0x83)
218#define B43_LPPHY_IQ_ACC_LO_ADDR B43_PHY_OFDM(0x84)
219#define B43_LPPHY_IQ_I_PWR_ACC_HI_ADDR B43_PHY_OFDM(0x85)
220#define B43_LPPHY_IQ_I_PWR_ACC_LO_ADDR B43_PHY_OFDM(0x86)
221#define B43_LPPHY_IQ_Q_PWR_ACC_HI_ADDR B43_PHY_OFDM(0x87)
222#define B43_LPPHY_IQ_Q_PWR_ACC_LO_ADDR B43_PHY_OFDM(0x88)
223#define B43_LPPHY_MAXNUMSTEPS B43_PHY_OFDM(0x89)
224#define B43_LPPHY_ROTORPHASE_ADDR B43_PHY_OFDM(0x8A)
225#define B43_LPPHY_ADVANCEDRETARDROTOR_ADDR B43_PHY_OFDM(0x8B)
226#define B43_LPPHY_RSSIADCDELAY_CTL_ADDR B43_PHY_OFDM(0x8D)
227#define B43_LPPHY_TSSISTAT_ADDR B43_PHY_OFDM(0x8E)
228#define B43_LPPHY_TEMPSENSESTAT_ADDR B43_PHY_OFDM(0x8F)
229#define B43_LPPHY_TEMPSENSE_CTL_ADDR B43_PHY_OFDM(0x90)
230#define B43_LPPHY_WRSSISTAT_ADDR B43_PHY_OFDM(0x91)
231#define B43_LPPHY_MUFACTORADDR B43_PHY_OFDM(0x92)
232#define B43_LPPHY_SCRAMSTATE_ADDR B43_PHY_OFDM(0x93)
233#define B43_LPPHY_TXHOLDOFFADDR B43_PHY_OFDM(0x94)
234#define B43_LPPHY_PKTGAINVAL_ADDR B43_PHY_OFDM(0x95)
235#define B43_LPPHY_COARSEESTIM_ADDR B43_PHY_OFDM(0x96)
236#define B43_LPPHY_STATE_TRANSITION_ADDR B43_PHY_OFDM(0x97)
237#define B43_LPPHY_TRN_OFFSET_ADDR B43_PHY_OFDM(0x98)
238#define B43_LPPHY_NUM_ROTOR_ADDR B43_PHY_OFDM(0x99)
239#define B43_LPPHY_VITERBI_OFFSET_ADDR B43_PHY_OFDM(0x9A)
240#define B43_LPPHY_SMPL_COLLECT_WAIT_ADDR B43_PHY_OFDM(0x9B)
241#define B43_LPPHY_A_PHY_CTL_ADDR B43_PHY_OFDM(0x9C)
242#define B43_LPPHY_NUM_PASS_THROUGH_ADDR B43_PHY_OFDM(0x9D)
243#define B43_LPPHY_RX_COMP_COEFF_S B43_PHY_OFDM(0x9E)
244#define B43_LPPHY_CPAROTATEVAL B43_PHY_OFDM(0x9F)
245#define B43_LPPHY_SMPL_PLAY_COUNT B43_PHY_OFDM(0xA0)
246#define B43_LPPHY_SMPL_PLAY_BUFFER_CTL B43_PHY_OFDM(0xA1)
247#define B43_LPPHY_FOURWIRE_CTL B43_PHY_OFDM(0xA2)
248#define B43_LPPHY_CPA_TAILCOUNT_VAL B43_PHY_OFDM(0xA3)
249#define B43_LPPHY_TX_PWR_CTL_CMD B43_PHY_OFDM(0xA4)
250#define B43_LPPHY_TX_PWR_CTL_CMD_MODE 0xE000
251#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF 0x0000
252#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW 0x8000
253#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_HW 0xE000
254#define B43_LPPHY_TX_PWR_CTL_NNUM B43_PHY_OFDM(0xA5)
255#define B43_LPPHY_TX_PWR_CTL_IDLETSSI B43_PHY_OFDM(0xA6)
256#define B43_LPPHY_TX_PWR_CTL_TARGETPWR B43_PHY_OFDM(0xA7)
257#define B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT B43_PHY_OFDM(0xA8)
258#define B43_LPPHY_TX_PWR_CTL_BASEINDEX B43_PHY_OFDM(0xA9)
259#define B43_LPPHY_TX_PWR_CTL_PWR_INDEX B43_PHY_OFDM(0xAA)
260#define B43_LPPHY_TX_PWR_CTL_STAT B43_PHY_OFDM(0xAB)
261#define B43_LPPHY_LP_RF_SIGNAL_LUT B43_PHY_OFDM(0xAC)
262#define B43_LPPHY_RX_RADIO_CTL_FILTER_STATE B43_PHY_OFDM(0xAD)
263#define B43_LPPHY_RX_RADIO_CTL B43_PHY_OFDM(0xAE)
264#define B43_LPPHY_NRSSI_STAT_ADDR B43_PHY_OFDM(0xAF)
265#define B43_LPPHY_RF_OVERRIDE_2 B43_PHY_OFDM(0xB0)
266#define B43_LPPHY_RF_OVERRIDE_2_VAL B43_PHY_OFDM(0xB1)
267#define B43_LPPHY_PS_CTL_OVERRIDE_VAL0 B43_PHY_OFDM(0xB2)
268#define B43_LPPHY_PS_CTL_OVERRIDE_VAL1 B43_PHY_OFDM(0xB3)
269#define B43_LPPHY_PS_CTL_OVERRIDE_VAL2 B43_PHY_OFDM(0xB4)
270#define B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL B43_PHY_OFDM(0xB5)
271#define B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL B43_PHY_OFDM(0xB6)
272#define B43_LPPHY_AFE_DDFS B43_PHY_OFDM(0xB7)
273#define B43_LPPHY_AFE_DDFS_POINTER_INIT B43_PHY_OFDM(0xB8)
274#define B43_LPPHY_AFE_DDFS_INCR_INIT B43_PHY_OFDM(0xB9)
275#define B43_LPPHY_MRCNOISEREDUCTION B43_PHY_OFDM(0xBA)
276#define B43_LPPHY_TR_LOOKUP_3 B43_PHY_OFDM(0xBB)
277#define B43_LPPHY_TR_LOOKUP_4 B43_PHY_OFDM(0xBC)
278#define B43_LPPHY_RADAR_FIFO_STAT B43_PHY_OFDM(0xBD)
279#define B43_LPPHY_GPIO_OUTEN B43_PHY_OFDM(0xBE)
280#define B43_LPPHY_GPIO_SELECT B43_PHY_OFDM(0xBF)
281#define B43_LPPHY_GPIO_OUT B43_PHY_OFDM(0xC0)
282#define B43_LPPHY_4C3 B43_PHY_OFDM(0xC3)
283#define B43_LPPHY_4C4 B43_PHY_OFDM(0xC4)
284#define B43_LPPHY_4C5 B43_PHY_OFDM(0xC5)
285#define B43_LPPHY_TR_LOOKUP_5 B43_PHY_OFDM(0xC7)
286#define B43_LPPHY_TR_LOOKUP_6 B43_PHY_OFDM(0xC8)
287#define B43_LPPHY_TR_LOOKUP_7 B43_PHY_OFDM(0xC9)
288#define B43_LPPHY_TR_LOOKUP_8 B43_PHY_OFDM(0xCA)
289#define B43_LPPHY_RF_PWR_OVERRIDE B43_PHY_OFDM(0xD3)
290
291
292
293
294#define B43_LP_RADIO(radio_reg) (radio_reg)
295#define B43_LP_NORTH(radio_reg) B43_LP_RADIO(radio_reg)
296#define B43_LP_SOUTH(radio_reg) B43_LP_RADIO((radio_reg) | 0x4000)
297
298
299
300#define B2062_N_COMM1 B43_LP_NORTH(0x000)
301#define B2062_N_COMM2 B43_LP_NORTH(0x002)
302#define B2062_N_COMM3 B43_LP_NORTH(0x003)
303#define B2062_N_COMM4 B43_LP_NORTH(0x004)
304#define B2062_N_COMM5 B43_LP_NORTH(0x005)
305#define B2062_N_COMM6 B43_LP_NORTH(0x006)
306#define B2062_N_COMM7 B43_LP_NORTH(0x007)
307#define B2062_N_COMM8 B43_LP_NORTH(0x008)
308#define B2062_N_COMM9 B43_LP_NORTH(0x009)
309#define B2062_N_COMM10 B43_LP_NORTH(0x00A)
310#define B2062_N_COMM11 B43_LP_NORTH(0x00B)
311#define B2062_N_COMM12 B43_LP_NORTH(0x00C)
312#define B2062_N_COMM13 B43_LP_NORTH(0x00D)
313#define B2062_N_COMM14 B43_LP_NORTH(0x00E)
314#define B2062_N_COMM15 B43_LP_NORTH(0x00F)
315#define B2062_N_PDN_CTL0 B43_LP_NORTH(0x010)
316#define B2062_N_PDN_CTL1 B43_LP_NORTH(0x011)
317#define B2062_N_PDN_CTL2 B43_LP_NORTH(0x012)
318#define B2062_N_PDN_CTL3 B43_LP_NORTH(0x013)
319#define B2062_N_PDN_CTL4 B43_LP_NORTH(0x014)
320#define B2062_N_GEN_CTL0 B43_LP_NORTH(0x015)
321#define B2062_N_IQ_CALIB B43_LP_NORTH(0x016)
322#define B2062_N_LGENC B43_LP_NORTH(0x017)
323#define B2062_N_LGENA_LPF B43_LP_NORTH(0x018)
324#define B2062_N_LGENA_BIAS0 B43_LP_NORTH(0x019)
325#define B2062_N_LGNEA_BIAS1 B43_LP_NORTH(0x01A)
326#define B2062_N_LGENA_CTL0 B43_LP_NORTH(0x01B)
327#define B2062_N_LGENA_CTL1 B43_LP_NORTH(0x01C)
328#define B2062_N_LGENA_CTL2 B43_LP_NORTH(0x01D)
329#define B2062_N_LGENA_TUNE0 B43_LP_NORTH(0x01E)
330#define B2062_N_LGENA_TUNE1 B43_LP_NORTH(0x01F)
331#define B2062_N_LGENA_TUNE2 B43_LP_NORTH(0x020)
332#define B2062_N_LGENA_TUNE3 B43_LP_NORTH(0x021)
333#define B2062_N_LGENA_CTL3 B43_LP_NORTH(0x022)
334#define B2062_N_LGENA_CTL4 B43_LP_NORTH(0x023)
335#define B2062_N_LGENA_CTL5 B43_LP_NORTH(0x024)
336#define B2062_N_LGENA_CTL6 B43_LP_NORTH(0x025)
337#define B2062_N_LGENA_CTL7 B43_LP_NORTH(0x026)
338#define B2062_N_RXA_CTL0 B43_LP_NORTH(0x027)
339#define B2062_N_RXA_CTL1 B43_LP_NORTH(0x028)
340#define B2062_N_RXA_CTL2 B43_LP_NORTH(0x029)
341#define B2062_N_RXA_CTL3 B43_LP_NORTH(0x02A)
342#define B2062_N_RXA_CTL4 B43_LP_NORTH(0x02B)
343#define B2062_N_RXA_CTL5 B43_LP_NORTH(0x02C)
344#define B2062_N_RXA_CTL6 B43_LP_NORTH(0x02D)
345#define B2062_N_RXA_CTL7 B43_LP_NORTH(0x02E)
346#define B2062_N_RXBB_CTL0 B43_LP_NORTH(0x02F)
347#define B2062_N_RXBB_CTL1 B43_LP_NORTH(0x030)
348#define B2062_N_RXBB_CTL2 B43_LP_NORTH(0x031)
349#define B2062_N_RXBB_GAIN0 B43_LP_NORTH(0x032)
350#define B2062_N_RXBB_GAIN1 B43_LP_NORTH(0x033)
351#define B2062_N_RXBB_GAIN2 B43_LP_NORTH(0x034)
352#define B2062_N_RXBB_GAIN3 B43_LP_NORTH(0x035)
353#define B2062_N_RXBB_RSSI0 B43_LP_NORTH(0x036)
354#define B2062_N_RXBB_RSSI1 B43_LP_NORTH(0x037)
355#define B2062_N_RXBB_CALIB0 B43_LP_NORTH(0x038)
356#define B2062_N_RXBB_CALIB1 B43_LP_NORTH(0x039)
357#define B2062_N_RXBB_CALIB2 B43_LP_NORTH(0x03A)
358#define B2062_N_RXBB_BIAS0 B43_LP_NORTH(0x03B)
359#define B2062_N_RXBB_BIAS1 B43_LP_NORTH(0x03C)
360#define B2062_N_RXBB_BIAS2 B43_LP_NORTH(0x03D)
361#define B2062_N_RXBB_BIAS3 B43_LP_NORTH(0x03E)
362#define B2062_N_RXBB_BIAS4 B43_LP_NORTH(0x03F)
363#define B2062_N_RXBB_BIAS5 B43_LP_NORTH(0x040)
364#define B2062_N_RXBB_RSSI2 B43_LP_NORTH(0x041)
365#define B2062_N_RXBB_RSSI3 B43_LP_NORTH(0x042)
366#define B2062_N_RXBB_RSSI4 B43_LP_NORTH(0x043)
367#define B2062_N_RXBB_RSSI5 B43_LP_NORTH(0x044)
368#define B2062_N_TX_CTL0 B43_LP_NORTH(0x045)
369#define B2062_N_TX_CTL1 B43_LP_NORTH(0x046)
370#define B2062_N_TX_CTL2 B43_LP_NORTH(0x047)
371#define B2062_N_TX_CTL3 B43_LP_NORTH(0x048)
372#define B2062_N_TX_CTL4 B43_LP_NORTH(0x049)
373#define B2062_N_TX_CTL5 B43_LP_NORTH(0x04A)
374#define B2062_N_TX_CTL6 B43_LP_NORTH(0x04B)
375#define B2062_N_TX_CTL7 B43_LP_NORTH(0x04C)
376#define B2062_N_TX_CTL8 B43_LP_NORTH(0x04D)
377#define B2062_N_TX_CTL9 B43_LP_NORTH(0x04E)
378#define B2062_N_TX_CTL_A B43_LP_NORTH(0x04F)
379#define B2062_N_TX_GC2G B43_LP_NORTH(0x050)
380#define B2062_N_TX_GC5G B43_LP_NORTH(0x051)
381#define B2062_N_TX_TUNE B43_LP_NORTH(0x052)
382#define B2062_N_TX_PAD B43_LP_NORTH(0x053)
383#define B2062_N_TX_PGA B43_LP_NORTH(0x054)
384#define B2062_N_TX_PADAUX B43_LP_NORTH(0x055)
385#define B2062_N_TX_PGAAUX B43_LP_NORTH(0x056)
386#define B2062_N_TSSI_CTL0 B43_LP_NORTH(0x057)
387#define B2062_N_TSSI_CTL1 B43_LP_NORTH(0x058)
388#define B2062_N_TSSI_CTL2 B43_LP_NORTH(0x059)
389#define B2062_N_IQ_CALIB_CTL0 B43_LP_NORTH(0x05A)
390#define B2062_N_IQ_CALIB_CTL1 B43_LP_NORTH(0x05B)
391#define B2062_N_IQ_CALIB_CTL2 B43_LP_NORTH(0x05C)
392#define B2062_N_CALIB_TS B43_LP_NORTH(0x05D)
393#define B2062_N_CALIB_CTL0 B43_LP_NORTH(0x05E)
394#define B2062_N_CALIB_CTL1 B43_LP_NORTH(0x05F)
395#define B2062_N_CALIB_CTL2 B43_LP_NORTH(0x060)
396#define B2062_N_CALIB_CTL3 B43_LP_NORTH(0x061)
397#define B2062_N_CALIB_CTL4 B43_LP_NORTH(0x062)
398#define B2062_N_CALIB_DBG0 B43_LP_NORTH(0x063)
399#define B2062_N_CALIB_DBG1 B43_LP_NORTH(0x064)
400#define B2062_N_CALIB_DBG2 B43_LP_NORTH(0x065)
401#define B2062_N_CALIB_DBG3 B43_LP_NORTH(0x066)
402#define B2062_N_PSENSE_CTL0 B43_LP_NORTH(0x069)
403#define B2062_N_PSENSE_CTL1 B43_LP_NORTH(0x06A)
404#define B2062_N_PSENSE_CTL2 B43_LP_NORTH(0x06B)
405#define B2062_N_TEST_BUF0 B43_LP_NORTH(0x06C)
406
407
408#define B2062_S_COMM1 B43_LP_SOUTH(0x000)
409#define B2062_S_RADIO_ID_CODE B43_LP_SOUTH(0x001)
410#define B2062_S_COMM2 B43_LP_SOUTH(0x002)
411#define B2062_S_COMM3 B43_LP_SOUTH(0x003)
412#define B2062_S_COMM4 B43_LP_SOUTH(0x004)
413#define B2062_S_COMM5 B43_LP_SOUTH(0x005)
414#define B2062_S_COMM6 B43_LP_SOUTH(0x006)
415#define B2062_S_COMM7 B43_LP_SOUTH(0x007)
416#define B2062_S_COMM8 B43_LP_SOUTH(0x008)
417#define B2062_S_COMM9 B43_LP_SOUTH(0x009)
418#define B2062_S_COMM10 B43_LP_SOUTH(0x00A)
419#define B2062_S_COMM11 B43_LP_SOUTH(0x00B)
420#define B2062_S_COMM12 B43_LP_SOUTH(0x00C)
421#define B2062_S_COMM13 B43_LP_SOUTH(0x00D)
422#define B2062_S_COMM14 B43_LP_SOUTH(0x00E)
423#define B2062_S_COMM15 B43_LP_SOUTH(0x00F)
424#define B2062_S_PDS_CTL0 B43_LP_SOUTH(0x010)
425#define B2062_S_PDS_CTL1 B43_LP_SOUTH(0x011)
426#define B2062_S_PDS_CTL2 B43_LP_SOUTH(0x012)
427#define B2062_S_PDS_CTL3 B43_LP_SOUTH(0x013)
428#define B2062_S_BG_CTL0 B43_LP_SOUTH(0x014)
429#define B2062_S_BG_CTL1 B43_LP_SOUTH(0x015)
430#define B2062_S_BG_CTL2 B43_LP_SOUTH(0x016)
431#define B2062_S_LGENG_CTL0 B43_LP_SOUTH(0x017)
432#define B2062_S_LGENG_CTL1 B43_LP_SOUTH(0x018)
433#define B2062_S_LGENG_CTL2 B43_LP_SOUTH(0x019)
434#define B2062_S_LGENG_CTL3 B43_LP_SOUTH(0x01A)
435#define B2062_S_LGENG_CTL4 B43_LP_SOUTH(0x01B)
436#define B2062_S_LGENG_CTL5 B43_LP_SOUTH(0x01C)
437#define B2062_S_LGENG_CTL6 B43_LP_SOUTH(0x01D)
438#define B2062_S_LGENG_CTL7 B43_LP_SOUTH(0x01E)
439#define B2062_S_LGENG_CTL8 B43_LP_SOUTH(0x01F)
440#define B2062_S_LGENG_CTL9 B43_LP_SOUTH(0x020)
441#define B2062_S_LGENG_CTL10 B43_LP_SOUTH(0x021)
442#define B2062_S_LGENG_CTL11 B43_LP_SOUTH(0x022)
443#define B2062_S_REFPLL_CTL0 B43_LP_SOUTH(0x023)
444#define B2062_S_REFPLL_CTL1 B43_LP_SOUTH(0x024)
445#define B2062_S_REFPLL_CTL2 B43_LP_SOUTH(0x025)
446#define B2062_S_REFPLL_CTL3 B43_LP_SOUTH(0x026)
447#define B2062_S_REFPLL_CTL4 B43_LP_SOUTH(0x027)
448#define B2062_S_REFPLL_CTL5 B43_LP_SOUTH(0x028)
449#define B2062_S_REFPLL_CTL6 B43_LP_SOUTH(0x029)
450#define B2062_S_REFPLL_CTL7 B43_LP_SOUTH(0x02A)
451#define B2062_S_REFPLL_CTL8 B43_LP_SOUTH(0x02B)
452#define B2062_S_REFPLL_CTL9 B43_LP_SOUTH(0x02C)
453#define B2062_S_REFPLL_CTL10 B43_LP_SOUTH(0x02D)
454#define B2062_S_REFPLL_CTL11 B43_LP_SOUTH(0x02E)
455#define B2062_S_REFPLL_CTL12 B43_LP_SOUTH(0x02F)
456#define B2062_S_REFPLL_CTL13 B43_LP_SOUTH(0x030)
457#define B2062_S_REFPLL_CTL14 B43_LP_SOUTH(0x031)
458#define B2062_S_REFPLL_CTL15 B43_LP_SOUTH(0x032)
459#define B2062_S_REFPLL_CTL16 B43_LP_SOUTH(0x033)
460#define B2062_S_RFPLL_CTL0 B43_LP_SOUTH(0x034)
461#define B2062_S_RFPLL_CTL1 B43_LP_SOUTH(0x035)
462#define B2062_S_RFPLL_CTL2 B43_LP_SOUTH(0x036)
463#define B2062_S_RFPLL_CTL3 B43_LP_SOUTH(0x037)
464#define B2062_S_RFPLL_CTL4 B43_LP_SOUTH(0x038)
465#define B2062_S_RFPLL_CTL5 B43_LP_SOUTH(0x039)
466#define B2062_S_RFPLL_CTL6 B43_LP_SOUTH(0x03A)
467#define B2062_S_RFPLL_CTL7 B43_LP_SOUTH(0x03B)
468#define B2062_S_RFPLL_CTL8 B43_LP_SOUTH(0x03C)
469#define B2062_S_RFPLL_CTL9 B43_LP_SOUTH(0x03D)
470#define B2062_S_RFPLL_CTL10 B43_LP_SOUTH(0x03E)
471#define B2062_S_RFPLL_CTL11 B43_LP_SOUTH(0x03F)
472#define B2062_S_RFPLL_CTL12 B43_LP_SOUTH(0x040)
473#define B2062_S_RFPLL_CTL13 B43_LP_SOUTH(0x041)
474#define B2062_S_RFPLL_CTL14 B43_LP_SOUTH(0x042)
475#define B2062_S_RFPLL_CTL15 B43_LP_SOUTH(0x043)
476#define B2062_S_RFPLL_CTL16 B43_LP_SOUTH(0x044)
477#define B2062_S_RFPLL_CTL17 B43_LP_SOUTH(0x045)
478#define B2062_S_RFPLL_CTL18 B43_LP_SOUTH(0x046)
479#define B2062_S_RFPLL_CTL19 B43_LP_SOUTH(0x047)
480#define B2062_S_RFPLL_CTL20 B43_LP_SOUTH(0x048)
481#define B2062_S_RFPLL_CTL21 B43_LP_SOUTH(0x049)
482#define B2062_S_RFPLL_CTL22 B43_LP_SOUTH(0x04A)
483#define B2062_S_RFPLL_CTL23 B43_LP_SOUTH(0x04B)
484#define B2062_S_RFPLL_CTL24 B43_LP_SOUTH(0x04C)
485#define B2062_S_RFPLL_CTL25 B43_LP_SOUTH(0x04D)
486#define B2062_S_RFPLL_CTL26 B43_LP_SOUTH(0x04E)
487#define B2062_S_RFPLL_CTL27 B43_LP_SOUTH(0x04F)
488#define B2062_S_RFPLL_CTL28 B43_LP_SOUTH(0x050)
489#define B2062_S_RFPLL_CTL29 B43_LP_SOUTH(0x051)
490#define B2062_S_RFPLL_CTL30 B43_LP_SOUTH(0x052)
491#define B2062_S_RFPLL_CTL31 B43_LP_SOUTH(0x053)
492#define B2062_S_RFPLL_CTL32 B43_LP_SOUTH(0x054)
493#define B2062_S_RFPLL_CTL33 B43_LP_SOUTH(0x055)
494#define B2062_S_RFPLL_CTL34 B43_LP_SOUTH(0x056)
495#define B2062_S_RXG_CNT0 B43_LP_SOUTH(0x057)
496#define B2062_S_RXG_CNT1 B43_LP_SOUTH(0x058)
497#define B2062_S_RXG_CNT2 B43_LP_SOUTH(0x059)
498#define B2062_S_RXG_CNT3 B43_LP_SOUTH(0x05A)
499#define B2062_S_RXG_CNT4 B43_LP_SOUTH(0x05B)
500#define B2062_S_RXG_CNT5 B43_LP_SOUTH(0x05C)
501#define B2062_S_RXG_CNT6 B43_LP_SOUTH(0x05D)
502#define B2062_S_RXG_CNT7 B43_LP_SOUTH(0x05E)
503#define B2062_S_RXG_CNT8 B43_LP_SOUTH(0x05F)
504#define B2062_S_RXG_CNT9 B43_LP_SOUTH(0x060)
505#define B2062_S_RXG_CNT10 B43_LP_SOUTH(0x061)
506#define B2062_S_RXG_CNT11 B43_LP_SOUTH(0x062)
507#define B2062_S_RXG_CNT12 B43_LP_SOUTH(0x063)
508#define B2062_S_RXG_CNT13 B43_LP_SOUTH(0x064)
509#define B2062_S_RXG_CNT14 B43_LP_SOUTH(0x065)
510#define B2062_S_RXG_CNT15 B43_LP_SOUTH(0x066)
511#define B2062_S_RXG_CNT16 B43_LP_SOUTH(0x067)
512#define B2062_S_RXG_CNT17 B43_LP_SOUTH(0x068)
513
514
515
516
517#define B2063_RADIO_ID_CODE B43_LP_RADIO(0x001)
518#define B2063_COMM1 B43_LP_RADIO(0x000)
519#define B2063_COMM2 B43_LP_RADIO(0x002)
520#define B2063_COMM3 B43_LP_RADIO(0x003)
521#define B2063_COMM4 B43_LP_RADIO(0x004)
522#define B2063_COMM5 B43_LP_RADIO(0x005)
523#define B2063_COMM6 B43_LP_RADIO(0x006)
524#define B2063_COMM7 B43_LP_RADIO(0x007)
525#define B2063_COMM8 B43_LP_RADIO(0x008)
526#define B2063_COMM9 B43_LP_RADIO(0x009)
527#define B2063_COMM10 B43_LP_RADIO(0x00A)
528#define B2063_COMM11 B43_LP_RADIO(0x00B)
529#define B2063_COMM12 B43_LP_RADIO(0x00C)
530#define B2063_COMM13 B43_LP_RADIO(0x00D)
531#define B2063_COMM14 B43_LP_RADIO(0x00E)
532#define B2063_COMM15 B43_LP_RADIO(0x00F)
533#define B2063_COMM16 B43_LP_RADIO(0x010)
534#define B2063_COMM17 B43_LP_RADIO(0x011)
535#define B2063_COMM18 B43_LP_RADIO(0x012)
536#define B2063_COMM19 B43_LP_RADIO(0x013)
537#define B2063_COMM20 B43_LP_RADIO(0x014)
538#define B2063_COMM21 B43_LP_RADIO(0x015)
539#define B2063_COMM22 B43_LP_RADIO(0x016)
540#define B2063_COMM23 B43_LP_RADIO(0x017)
541#define B2063_COMM24 B43_LP_RADIO(0x018)
542#define B2063_PWR_SWITCH_CTL B43_LP_RADIO(0x019)
543#define B2063_PLL_SP1 B43_LP_RADIO(0x01A)
544#define B2063_PLL_SP2 B43_LP_RADIO(0x01B)
545#define B2063_LOGEN_SP1 B43_LP_RADIO(0x01C)
546#define B2063_LOGEN_SP2 B43_LP_RADIO(0x01D)
547#define B2063_LOGEN_SP3 B43_LP_RADIO(0x01E)
548#define B2063_LOGEN_SP4 B43_LP_RADIO(0x01F)
549#define B2063_LOGEN_SP5 B43_LP_RADIO(0x020)
550#define B2063_G_RX_SP1 B43_LP_RADIO(0x021)
551#define B2063_G_RX_SP2 B43_LP_RADIO(0x022)
552#define B2063_G_RX_SP3 B43_LP_RADIO(0x023)
553#define B2063_G_RX_SP4 B43_LP_RADIO(0x024)
554#define B2063_G_RX_SP5 B43_LP_RADIO(0x025)
555#define B2063_G_RX_SP6 B43_LP_RADIO(0x026)
556#define B2063_G_RX_SP7 B43_LP_RADIO(0x027)
557#define B2063_G_RX_SP8 B43_LP_RADIO(0x028)
558#define B2063_G_RX_SP9 B43_LP_RADIO(0x029)
559#define B2063_G_RX_SP10 B43_LP_RADIO(0x02A)
560#define B2063_G_RX_SP11 B43_LP_RADIO(0x02B)
561#define B2063_A_RX_SP1 B43_LP_RADIO(0x02C)
562#define B2063_A_RX_SP2 B43_LP_RADIO(0x02D)
563#define B2063_A_RX_SP3 B43_LP_RADIO(0x02E)
564#define B2063_A_RX_SP4 B43_LP_RADIO(0x02F)
565#define B2063_A_RX_SP5 B43_LP_RADIO(0x030)
566#define B2063_A_RX_SP6 B43_LP_RADIO(0x031)
567#define B2063_A_RX_SP7 B43_LP_RADIO(0x032)
568#define B2063_RX_BB_SP1 B43_LP_RADIO(0x033)
569#define B2063_RX_BB_SP2 B43_LP_RADIO(0x034)
570#define B2063_RX_BB_SP3 B43_LP_RADIO(0x035)
571#define B2063_RX_BB_SP4 B43_LP_RADIO(0x036)
572#define B2063_RX_BB_SP5 B43_LP_RADIO(0x037)
573#define B2063_RX_BB_SP6 B43_LP_RADIO(0x038)
574#define B2063_RX_BB_SP7 B43_LP_RADIO(0x039)
575#define B2063_RX_BB_SP8 B43_LP_RADIO(0x03A)
576#define B2063_TX_RF_SP1 B43_LP_RADIO(0x03B)
577#define B2063_TX_RF_SP2 B43_LP_RADIO(0x03C)
578#define B2063_TX_RF_SP3 B43_LP_RADIO(0x03D)
579#define B2063_TX_RF_SP4 B43_LP_RADIO(0x03E)
580#define B2063_TX_RF_SP5 B43_LP_RADIO(0x03F)
581#define B2063_TX_RF_SP6 B43_LP_RADIO(0x040)
582#define B2063_TX_RF_SP7 B43_LP_RADIO(0x041)
583#define B2063_TX_RF_SP8 B43_LP_RADIO(0x042)
584#define B2063_TX_RF_SP9 B43_LP_RADIO(0x043)
585#define B2063_TX_RF_SP10 B43_LP_RADIO(0x044)
586#define B2063_TX_RF_SP11 B43_LP_RADIO(0x045)
587#define B2063_TX_RF_SP12 B43_LP_RADIO(0x046)
588#define B2063_TX_RF_SP13 B43_LP_RADIO(0x047)
589#define B2063_TX_RF_SP14 B43_LP_RADIO(0x048)
590#define B2063_TX_RF_SP15 B43_LP_RADIO(0x049)
591#define B2063_TX_RF_SP16 B43_LP_RADIO(0x04A)
592#define B2063_TX_RF_SP17 B43_LP_RADIO(0x04B)
593#define B2063_PA_SP1 B43_LP_RADIO(0x04C)
594#define B2063_PA_SP2 B43_LP_RADIO(0x04D)
595#define B2063_PA_SP3 B43_LP_RADIO(0x04E)
596#define B2063_PA_SP4 B43_LP_RADIO(0x04F)
597#define B2063_PA_SP5 B43_LP_RADIO(0x050)
598#define B2063_PA_SP6 B43_LP_RADIO(0x051)
599#define B2063_PA_SP7 B43_LP_RADIO(0x052)
600#define B2063_TX_BB_SP1 B43_LP_RADIO(0x053)
601#define B2063_TX_BB_SP2 B43_LP_RADIO(0x054)
602#define B2063_TX_BB_SP3 B43_LP_RADIO(0x055)
603#define B2063_REG_SP1 B43_LP_RADIO(0x056)
604#define B2063_BANDGAP_CTL1 B43_LP_RADIO(0x057)
605#define B2063_BANDGAP_CTL2 B43_LP_RADIO(0x058)
606#define B2063_LPO_CTL1 B43_LP_RADIO(0x059)
607#define B2063_RC_CALIB_CTL1 B43_LP_RADIO(0x05A)
608#define B2063_RC_CALIB_CTL2 B43_LP_RADIO(0x05B)
609#define B2063_RC_CALIB_CTL3 B43_LP_RADIO(0x05C)
610#define B2063_RC_CALIB_CTL4 B43_LP_RADIO(0x05D)
611#define B2063_RC_CALIB_CTL5 B43_LP_RADIO(0x05E)
612#define B2063_RC_CALIB_CTL6 B43_LP_RADIO(0x05F)
613#define B2063_RC_CALIB_CTL7 B43_LP_RADIO(0x060)
614#define B2063_RC_CALIB_CTL8 B43_LP_RADIO(0x061)
615#define B2063_RC_CALIB_CTL9 B43_LP_RADIO(0x062)
616#define B2063_RC_CALIB_CTL10 B43_LP_RADIO(0x063)
617#define B2063_PLL_JTAG_CALNRST B43_LP_RADIO(0x064)
618#define B2063_PLL_JTAG_IN_PLL1 B43_LP_RADIO(0x065)
619#define B2063_PLL_JTAG_IN_PLL2 B43_LP_RADIO(0x066)
620#define B2063_PLL_JTAG_PLL_CP1 B43_LP_RADIO(0x067)
621#define B2063_PLL_JTAG_PLL_CP2 B43_LP_RADIO(0x068)
622#define B2063_PLL_JTAG_PLL_CP3 B43_LP_RADIO(0x069)
623#define B2063_PLL_JTAG_PLL_CP4 B43_LP_RADIO(0x06A)
624#define B2063_PLL_JTAG_PLL_CTL1 B43_LP_RADIO(0x06B)
625#define B2063_PLL_JTAG_PLL_LF1 B43_LP_RADIO(0x06C)
626#define B2063_PLL_JTAG_PLL_LF2 B43_LP_RADIO(0x06D)
627#define B2063_PLL_JTAG_PLL_LF3 B43_LP_RADIO(0x06E)
628#define B2063_PLL_JTAG_PLL_LF4 B43_LP_RADIO(0x06F)
629#define B2063_PLL_JTAG_PLL_SG1 B43_LP_RADIO(0x070)
630#define B2063_PLL_JTAG_PLL_SG2 B43_LP_RADIO(0x071)
631#define B2063_PLL_JTAG_PLL_SG3 B43_LP_RADIO(0x072)
632#define B2063_PLL_JTAG_PLL_SG4 B43_LP_RADIO(0x073)
633#define B2063_PLL_JTAG_PLL_SG5 B43_LP_RADIO(0x074)
634#define B2063_PLL_JTAG_PLL_VCO1 B43_LP_RADIO(0x075)
635#define B2063_PLL_JTAG_PLL_VCO2 B43_LP_RADIO(0x076)
636#define B2063_PLL_JTAG_PLL_VCO_CALIB1 B43_LP_RADIO(0x077)
637#define B2063_PLL_JTAG_PLL_VCO_CALIB2 B43_LP_RADIO(0x078)
638#define B2063_PLL_JTAG_PLL_VCO_CALIB3 B43_LP_RADIO(0x079)
639#define B2063_PLL_JTAG_PLL_VCO_CALIB4 B43_LP_RADIO(0x07A)
640#define B2063_PLL_JTAG_PLL_VCO_CALIB5 B43_LP_RADIO(0x07B)
641#define B2063_PLL_JTAG_PLL_VCO_CALIB6 B43_LP_RADIO(0x07C)
642#define B2063_PLL_JTAG_PLL_VCO_CALIB7 B43_LP_RADIO(0x07D)
643#define B2063_PLL_JTAG_PLL_VCO_CALIB8 B43_LP_RADIO(0x07E)
644#define B2063_PLL_JTAG_PLL_VCO_CALIB9 B43_LP_RADIO(0x07F)
645#define B2063_PLL_JTAG_PLL_VCO_CALIB10 B43_LP_RADIO(0x080)
646#define B2063_PLL_JTAG_PLL_XTAL_12 B43_LP_RADIO(0x081)
647#define B2063_PLL_JTAG_PLL_XTAL3 B43_LP_RADIO(0x082)
648#define B2063_LOGEN_ACL1 B43_LP_RADIO(0x083)
649#define B2063_LOGEN_ACL2 B43_LP_RADIO(0x084)
650#define B2063_LOGEN_ACL3 B43_LP_RADIO(0x085)
651#define B2063_LOGEN_ACL4 B43_LP_RADIO(0x086)
652#define B2063_LOGEN_ACL5 B43_LP_RADIO(0x087)
653#define B2063_LO_CALIB_INPUTS B43_LP_RADIO(0x088)
654#define B2063_LO_CALIB_CTL1 B43_LP_RADIO(0x089)
655#define B2063_LO_CALIB_CTL2 B43_LP_RADIO(0x08A)
656#define B2063_LO_CALIB_CTL3 B43_LP_RADIO(0x08B)
657#define B2063_LO_CALIB_WAITCNT B43_LP_RADIO(0x08C)
658#define B2063_LO_CALIB_OVR1 B43_LP_RADIO(0x08D)
659#define B2063_LO_CALIB_OVR2 B43_LP_RADIO(0x08E)
660#define B2063_LO_CALIB_OVAL1 B43_LP_RADIO(0x08F)
661#define B2063_LO_CALIB_OVAL2 B43_LP_RADIO(0x090)
662#define B2063_LO_CALIB_OVAL3 B43_LP_RADIO(0x091)
663#define B2063_LO_CALIB_OVAL4 B43_LP_RADIO(0x092)
664#define B2063_LO_CALIB_OVAL5 B43_LP_RADIO(0x093)
665#define B2063_LO_CALIB_OVAL6 B43_LP_RADIO(0x094)
666#define B2063_LO_CALIB_OVAL7 B43_LP_RADIO(0x095)
667#define B2063_LO_CALIB_CALVLD1 B43_LP_RADIO(0x096)
668#define B2063_LO_CALIB_CALVLD2 B43_LP_RADIO(0x097)
669#define B2063_LO_CALIB_CVAL1 B43_LP_RADIO(0x098)
670#define B2063_LO_CALIB_CVAL2 B43_LP_RADIO(0x099)
671#define B2063_LO_CALIB_CVAL3 B43_LP_RADIO(0x09A)
672#define B2063_LO_CALIB_CVAL4 B43_LP_RADIO(0x09B)
673#define B2063_LO_CALIB_CVAL5 B43_LP_RADIO(0x09C)
674#define B2063_LO_CALIB_CVAL6 B43_LP_RADIO(0x09D)
675#define B2063_LO_CALIB_CVAL7 B43_LP_RADIO(0x09E)
676#define B2063_LOGEN_CALIB_EN B43_LP_RADIO(0x09F)
677#define B2063_LOGEN_PEAKDET1 B43_LP_RADIO(0x0A0)
678#define B2063_LOGEN_RCCR1 B43_LP_RADIO(0x0A1)
679#define B2063_LOGEN_VCOBUF1 B43_LP_RADIO(0x0A2)
680#define B2063_LOGEN_MIXER1 B43_LP_RADIO(0x0A3)
681#define B2063_LOGEN_MIXER2 B43_LP_RADIO(0x0A4)
682#define B2063_LOGEN_BUF1 B43_LP_RADIO(0x0A5)
683#define B2063_LOGEN_BUF2 B43_LP_RADIO(0x0A6)
684#define B2063_LOGEN_DIV1 B43_LP_RADIO(0x0A7)
685#define B2063_LOGEN_DIV2 B43_LP_RADIO(0x0A8)
686#define B2063_LOGEN_DIV3 B43_LP_RADIO(0x0A9)
687#define B2063_LOGEN_CBUFRX1 B43_LP_RADIO(0x0AA)
688#define B2063_LOGEN_CBUFRX2 B43_LP_RADIO(0x0AB)
689#define B2063_LOGEN_CBUFTX1 B43_LP_RADIO(0x0AC)
690#define B2063_LOGEN_CBUFTX2 B43_LP_RADIO(0x0AD)
691#define B2063_LOGEN_IDAC1 B43_LP_RADIO(0x0AE)
692#define B2063_LOGEN_SPARE1 B43_LP_RADIO(0x0AF)
693#define B2063_LOGEN_SPARE2 B43_LP_RADIO(0x0B0)
694#define B2063_LOGEN_SPARE3 B43_LP_RADIO(0x0B1)
695#define B2063_G_RX_1ST1 B43_LP_RADIO(0x0B2)
696#define B2063_G_RX_1ST2 B43_LP_RADIO(0x0B3)
697#define B2063_G_RX_1ST3 B43_LP_RADIO(0x0B4)
698#define B2063_G_RX_2ND1 B43_LP_RADIO(0x0B5)
699#define B2063_G_RX_2ND2 B43_LP_RADIO(0x0B6)
700#define B2063_G_RX_2ND3 B43_LP_RADIO(0x0B7)
701#define B2063_G_RX_2ND4 B43_LP_RADIO(0x0B8)
702#define B2063_G_RX_2ND5 B43_LP_RADIO(0x0B9)
703#define B2063_G_RX_2ND6 B43_LP_RADIO(0x0BA)
704#define B2063_G_RX_2ND7 B43_LP_RADIO(0x0BB)
705#define B2063_G_RX_2ND8 B43_LP_RADIO(0x0BC)
706#define B2063_G_RX_PS1 B43_LP_RADIO(0x0BD)
707#define B2063_G_RX_PS2 B43_LP_RADIO(0x0BE)
708#define B2063_G_RX_PS3 B43_LP_RADIO(0x0BF)
709#define B2063_G_RX_PS4 B43_LP_RADIO(0x0C0)
710#define B2063_G_RX_PS5 B43_LP_RADIO(0x0C1)
711#define B2063_G_RX_MIX1 B43_LP_RADIO(0x0C2)
712#define B2063_G_RX_MIX2 B43_LP_RADIO(0x0C3)
713#define B2063_G_RX_MIX3 B43_LP_RADIO(0x0C4)
714#define B2063_G_RX_MIX4 B43_LP_RADIO(0x0C5)
715#define B2063_G_RX_MIX5 B43_LP_RADIO(0x0C6)
716#define B2063_G_RX_MIX6 B43_LP_RADIO(0x0C7)
717#define B2063_G_RX_MIX7 B43_LP_RADIO(0x0C8)
718#define B2063_G_RX_MIX8 B43_LP_RADIO(0x0C9)
719#define B2063_G_RX_PDET1 B43_LP_RADIO(0x0CA)
720#define B2063_G_RX_SPARES1 B43_LP_RADIO(0x0CB)
721#define B2063_G_RX_SPARES2 B43_LP_RADIO(0x0CC)
722#define B2063_G_RX_SPARES3 B43_LP_RADIO(0x0CD)
723#define B2063_A_RX_1ST1 B43_LP_RADIO(0x0CE)
724#define B2063_A_RX_1ST2 B43_LP_RADIO(0x0CF)
725#define B2063_A_RX_1ST3 B43_LP_RADIO(0x0D0)
726#define B2063_A_RX_1ST4 B43_LP_RADIO(0x0D1)
727#define B2063_A_RX_1ST5 B43_LP_RADIO(0x0D2)
728#define B2063_A_RX_2ND1 B43_LP_RADIO(0x0D3)
729#define B2063_A_RX_2ND2 B43_LP_RADIO(0x0D4)
730#define B2063_A_RX_2ND3 B43_LP_RADIO(0x0D5)
731#define B2063_A_RX_2ND4 B43_LP_RADIO(0x0D6)
732#define B2063_A_RX_2ND5 B43_LP_RADIO(0x0D7)
733#define B2063_A_RX_2ND6 B43_LP_RADIO(0x0D8)
734#define B2063_A_RX_2ND7 B43_LP_RADIO(0x0D9)
735#define B2063_A_RX_PS1 B43_LP_RADIO(0x0DA)
736#define B2063_A_RX_PS2 B43_LP_RADIO(0x0DB)
737#define B2063_A_RX_PS3 B43_LP_RADIO(0x0DC)
738#define B2063_A_RX_PS4 B43_LP_RADIO(0x0DD)
739#define B2063_A_RX_PS5 B43_LP_RADIO(0x0DE)
740#define B2063_A_RX_PS6 B43_LP_RADIO(0x0DF)
741#define B2063_A_RX_MIX1 B43_LP_RADIO(0x0E0)
742#define B2063_A_RX_MIX2 B43_LP_RADIO(0x0E1)
743#define B2063_A_RX_MIX3 B43_LP_RADIO(0x0E2)
744#define B2063_A_RX_MIX4 B43_LP_RADIO(0x0E3)
745#define B2063_A_RX_MIX5 B43_LP_RADIO(0x0E4)
746#define B2063_A_RX_MIX6 B43_LP_RADIO(0x0E5)
747#define B2063_A_RX_MIX7 B43_LP_RADIO(0x0E6)
748#define B2063_A_RX_MIX8 B43_LP_RADIO(0x0E7)
749#define B2063_A_RX_PWRDET1 B43_LP_RADIO(0x0E8)
750#define B2063_A_RX_SPARE1 B43_LP_RADIO(0x0E9)
751#define B2063_A_RX_SPARE2 B43_LP_RADIO(0x0EA)
752#define B2063_A_RX_SPARE3 B43_LP_RADIO(0x0EB)
753#define B2063_RX_TIA_CTL1 B43_LP_RADIO(0x0EC)
754#define B2063_RX_TIA_CTL2 B43_LP_RADIO(0x0ED)
755#define B2063_RX_TIA_CTL3 B43_LP_RADIO(0x0EE)
756#define B2063_RX_TIA_CTL4 B43_LP_RADIO(0x0EF)
757#define B2063_RX_TIA_CTL5 B43_LP_RADIO(0x0F0)
758#define B2063_RX_TIA_CTL6 B43_LP_RADIO(0x0F1)
759#define B2063_RX_BB_CTL1 B43_LP_RADIO(0x0F2)
760#define B2063_RX_BB_CTL2 B43_LP_RADIO(0x0F3)
761#define B2063_RX_BB_CTL3 B43_LP_RADIO(0x0F4)
762#define B2063_RX_BB_CTL4 B43_LP_RADIO(0x0F5)
763#define B2063_RX_BB_CTL5 B43_LP_RADIO(0x0F6)
764#define B2063_RX_BB_CTL6 B43_LP_RADIO(0x0F7)
765#define B2063_RX_BB_CTL7 B43_LP_RADIO(0x0F8)
766#define B2063_RX_BB_CTL8 B43_LP_RADIO(0x0F9)
767#define B2063_RX_BB_CTL9 B43_LP_RADIO(0x0FA)
768#define B2063_TX_RF_CTL1 B43_LP_RADIO(0x0FB)
769#define B2063_TX_RF_IDAC_LO_RF_I B43_LP_RADIO(0x0FC)
770#define B2063_TX_RF_IDAC_LO_RF_Q B43_LP_RADIO(0x0FD)
771#define B2063_TX_RF_IDAC_LO_BB_I B43_LP_RADIO(0x0FE)
772#define B2063_TX_RF_IDAC_LO_BB_Q B43_LP_RADIO(0x0FF)
773#define B2063_TX_RF_CTL2 B43_LP_RADIO(0x100)
774#define B2063_TX_RF_CTL3 B43_LP_RADIO(0x101)
775#define B2063_TX_RF_CTL4 B43_LP_RADIO(0x102)
776#define B2063_TX_RF_CTL5 B43_LP_RADIO(0x103)
777#define B2063_TX_RF_CTL6 B43_LP_RADIO(0x104)
778#define B2063_TX_RF_CTL7 B43_LP_RADIO(0x105)
779#define B2063_TX_RF_CTL8 B43_LP_RADIO(0x106)
780#define B2063_TX_RF_CTL9 B43_LP_RADIO(0x107)
781#define B2063_TX_RF_CTL10 B43_LP_RADIO(0x108)
782#define B2063_TX_RF_CTL14 B43_LP_RADIO(0x109)
783#define B2063_TX_RF_CTL15 B43_LP_RADIO(0x10A)
784#define B2063_PA_CTL1 B43_LP_RADIO(0x10B)
785#define B2063_PA_CTL2 B43_LP_RADIO(0x10C)
786#define B2063_PA_CTL3 B43_LP_RADIO(0x10D)
787#define B2063_PA_CTL4 B43_LP_RADIO(0x10E)
788#define B2063_PA_CTL5 B43_LP_RADIO(0x10F)
789#define B2063_PA_CTL6 B43_LP_RADIO(0x110)
790#define B2063_PA_CTL7 B43_LP_RADIO(0x111)
791#define B2063_PA_CTL8 B43_LP_RADIO(0x112)
792#define B2063_PA_CTL9 B43_LP_RADIO(0x113)
793#define B2063_PA_CTL10 B43_LP_RADIO(0x114)
794#define B2063_PA_CTL11 B43_LP_RADIO(0x115)
795#define B2063_PA_CTL12 B43_LP_RADIO(0x116)
796#define B2063_PA_CTL13 B43_LP_RADIO(0x117)
797#define B2063_TX_BB_CTL1 B43_LP_RADIO(0x118)
798#define B2063_TX_BB_CTL2 B43_LP_RADIO(0x119)
799#define B2063_TX_BB_CTL3 B43_LP_RADIO(0x11A)
800#define B2063_TX_BB_CTL4 B43_LP_RADIO(0x11B)
801#define B2063_GPIO_CTL1 B43_LP_RADIO(0x11C)
802#define B2063_VREG_CTL1 B43_LP_RADIO(0x11D)
803#define B2063_AMUX_CTL1 B43_LP_RADIO(0x11E)
804#define B2063_IQ_CALIB_GVAR B43_LP_RADIO(0x11F)
805#define B2063_IQ_CALIB_CTL1 B43_LP_RADIO(0x120)
806#define B2063_IQ_CALIB_CTL2 B43_LP_RADIO(0x121)
807#define B2063_TEMPSENSE_CTL1 B43_LP_RADIO(0x122)
808#define B2063_TEMPSENSE_CTL2 B43_LP_RADIO(0x123)
809#define B2063_TX_RX_LOOPBACK1 B43_LP_RADIO(0x124)
810#define B2063_TX_RX_LOOPBACK2 B43_LP_RADIO(0x125)
811#define B2063_EXT_TSSI_CTL1 B43_LP_RADIO(0x126)
812#define B2063_EXT_TSSI_CTL2 B43_LP_RADIO(0x127)
813#define B2063_AFE_CTL B43_LP_RADIO(0x128)
814
815
816
817enum b43_lpphy_txpctl_mode {
818 B43_LPPHY_TXPCTL_UNKNOWN = 0,
819 B43_LPPHY_TXPCTL_OFF,
820 B43_LPPHY_TXPCTL_SW,
821 B43_LPPHY_TXPCTL_HW,
822};
823
824struct b43_phy_lp {
825
826 enum b43_lpphy_txpctl_mode txpctl_mode;
827
828
829 u8 tx_isolation_med_band;
830
831 u8 tx_isolation_low_band;
832
833 u8 tx_isolation_hi_band;
834
835
836 u16 max_tx_pwr_med_band;
837
838 u16 max_tx_pwr_low_band;
839
840 u16 max_tx_pwr_hi_band;
841
842
843
844 u16 tx_max_rate[15];
845 u16 tx_max_ratel[15];
846 u16 tx_max_rateh[15];
847
848
849 s16 txpa[3], txpal[3], txpah[3];
850
851
852 u8 rx_pwr_offset;
853
854
855 u16 tssi_tx_count;
856
857 u16 tssi_idx;
858
859 u16 tssi_npt;
860
861
862 u16 tgt_tx_freq;
863
864
865 s8 tx_pwr_idx_over;
866
867
868 u8 rssi_vf;
869
870 u8 rssi_vc;
871
872 u8 rssi_gs;
873
874
875 u8 rc_cap;
876
877 u8 bx_arch;
878
879
880 u8 full_calib_chan;
881
882
883 bool tx_iqloc_best_coeffs_valid;
884 u8 tx_iqloc_best_coeffs[11];
885
886
887 u16 dig_flt_state[9];
888
889 bool crs_usr_disable, crs_sys_disable;
890
891 unsigned int pdiv;
892
893
894 u8 channel;
895
896
897 int antenna;
898
899
900 int tx_tone_freq;
901};
902
903enum tssi_mux_mode {
904 TSSI_MUX_PREPA,
905 TSSI_MUX_POSTPA,
906 TSSI_MUX_EXT,
907};
908
909struct b43_phy_operations;
910extern const struct b43_phy_operations b43_phyops_lp;
911
912#endif
913