linux/drivers/net/wireless/iwlwifi/dvm/commands.h
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   1/******************************************************************************
   2 *
   3 * This file is provided under a dual BSD/GPLv2 license.  When using or
   4 * redistributing this file, you may do so under either license.
   5 *
   6 * GPL LICENSE SUMMARY
   7 *
   8 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of version 2 of the GNU General Public License as
  12 * published by the Free Software Foundation.
  13 *
  14 * This program is distributed in the hope that it will be useful, but
  15 * WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17 * General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22 * USA
  23 *
  24 * The full GNU General Public License is included in this distribution
  25 * in the file called COPYING.
  26 *
  27 * Contact Information:
  28 *  Intel Linux Wireless <ilw@linux.intel.com>
  29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30 *
  31 * BSD LICENSE
  32 *
  33 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
  34 * All rights reserved.
  35 *
  36 * Redistribution and use in source and binary forms, with or without
  37 * modification, are permitted provided that the following conditions
  38 * are met:
  39 *
  40 *  * Redistributions of source code must retain the above copyright
  41 *    notice, this list of conditions and the following disclaimer.
  42 *  * Redistributions in binary form must reproduce the above copyright
  43 *    notice, this list of conditions and the following disclaimer in
  44 *    the documentation and/or other materials provided with the
  45 *    distribution.
  46 *  * Neither the name Intel Corporation nor the names of its
  47 *    contributors may be used to endorse or promote products derived
  48 *    from this software without specific prior written permission.
  49 *
  50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61 *
  62 *****************************************************************************/
  63/*
  64 * Please use this file (commands.h) only for uCode API definitions.
  65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
  66 * Please use dev.h for driver implementation definitions.
  67 */
  68
  69#ifndef __iwl_commands_h__
  70#define __iwl_commands_h__
  71
  72#include <linux/ieee80211.h>
  73#include <linux/types.h>
  74
  75
  76enum {
  77        REPLY_ALIVE = 0x1,
  78        REPLY_ERROR = 0x2,
  79        REPLY_ECHO = 0x3,               /* test command */
  80
  81        /* RXON and QOS commands */
  82        REPLY_RXON = 0x10,
  83        REPLY_RXON_ASSOC = 0x11,
  84        REPLY_QOS_PARAM = 0x13,
  85        REPLY_RXON_TIMING = 0x14,
  86
  87        /* Multi-Station support */
  88        REPLY_ADD_STA = 0x18,
  89        REPLY_REMOVE_STA = 0x19,
  90        REPLY_REMOVE_ALL_STA = 0x1a,    /* not used */
  91        REPLY_TXFIFO_FLUSH = 0x1e,
  92
  93        /* Security */
  94        REPLY_WEPKEY = 0x20,
  95
  96        /* RX, TX, LEDs */
  97        REPLY_TX = 0x1c,
  98        REPLY_LEDS_CMD = 0x48,
  99        REPLY_TX_LINK_QUALITY_CMD = 0x4e,
 100
 101        /* WiMAX coexistence */
 102        COEX_PRIORITY_TABLE_CMD = 0x5a,
 103        COEX_MEDIUM_NOTIFICATION = 0x5b,
 104        COEX_EVENT_CMD = 0x5c,
 105
 106        /* Calibration */
 107        TEMPERATURE_NOTIFICATION = 0x62,
 108        CALIBRATION_CFG_CMD = 0x65,
 109        CALIBRATION_RES_NOTIFICATION = 0x66,
 110        CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
 111
 112        /* 802.11h related */
 113        REPLY_QUIET_CMD = 0x71,         /* not used */
 114        REPLY_CHANNEL_SWITCH = 0x72,
 115        CHANNEL_SWITCH_NOTIFICATION = 0x73,
 116        REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
 117        SPECTRUM_MEASURE_NOTIFICATION = 0x75,
 118
 119        /* Power Management */
 120        POWER_TABLE_CMD = 0x77,
 121        PM_SLEEP_NOTIFICATION = 0x7A,
 122        PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
 123
 124        /* Scan commands and notifications */
 125        REPLY_SCAN_CMD = 0x80,
 126        REPLY_SCAN_ABORT_CMD = 0x81,
 127        SCAN_START_NOTIFICATION = 0x82,
 128        SCAN_RESULTS_NOTIFICATION = 0x83,
 129        SCAN_COMPLETE_NOTIFICATION = 0x84,
 130
 131        /* IBSS/AP commands */
 132        BEACON_NOTIFICATION = 0x90,
 133        REPLY_TX_BEACON = 0x91,
 134        WHO_IS_AWAKE_NOTIFICATION = 0x94,       /* not used */
 135
 136        /* Miscellaneous commands */
 137        REPLY_TX_POWER_DBM_CMD = 0x95,
 138        QUIET_NOTIFICATION = 0x96,              /* not used */
 139        REPLY_TX_PWR_TABLE_CMD = 0x97,
 140        REPLY_TX_POWER_DBM_CMD_V1 = 0x98,       /* old version of API */
 141        TX_ANT_CONFIGURATION_CMD = 0x98,
 142        MEASURE_ABORT_NOTIFICATION = 0x99,      /* not used */
 143
 144        /* Bluetooth device coexistence config command */
 145        REPLY_BT_CONFIG = 0x9b,
 146
 147        /* Statistics */
 148        REPLY_STATISTICS_CMD = 0x9c,
 149        STATISTICS_NOTIFICATION = 0x9d,
 150
 151        /* RF-KILL commands and notifications */
 152        REPLY_CARD_STATE_CMD = 0xa0,
 153        CARD_STATE_NOTIFICATION = 0xa1,
 154
 155        /* Missed beacons notification */
 156        MISSED_BEACONS_NOTIFICATION = 0xa2,
 157
 158        REPLY_CT_KILL_CONFIG_CMD = 0xa4,
 159        SENSITIVITY_CMD = 0xa8,
 160        REPLY_PHY_CALIBRATION_CMD = 0xb0,
 161        REPLY_RX_PHY_CMD = 0xc0,
 162        REPLY_RX_MPDU_CMD = 0xc1,
 163        REPLY_RX = 0xc3,
 164        REPLY_COMPRESSED_BA = 0xc5,
 165
 166        /* BT Coex */
 167        REPLY_BT_COEX_PRIO_TABLE = 0xcc,
 168        REPLY_BT_COEX_PROT_ENV = 0xcd,
 169        REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
 170
 171        /* PAN commands */
 172        REPLY_WIPAN_PARAMS = 0xb2,
 173        REPLY_WIPAN_RXON = 0xb3,        /* use REPLY_RXON structure */
 174        REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
 175        REPLY_WIPAN_RXON_ASSOC = 0xb6,  /* use REPLY_RXON_ASSOC structure */
 176        REPLY_WIPAN_QOS_PARAM = 0xb7,   /* use REPLY_QOS_PARAM structure */
 177        REPLY_WIPAN_WEPKEY = 0xb8,      /* use REPLY_WEPKEY structure */
 178        REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
 179        REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
 180        REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
 181
 182        REPLY_WOWLAN_PATTERNS = 0xe0,
 183        REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
 184        REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
 185        REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
 186        REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
 187        REPLY_WOWLAN_GET_STATUS = 0xe5,
 188        REPLY_D3_CONFIG = 0xd3,
 189
 190        REPLY_MAX = 0xff
 191};
 192
 193/*
 194 * Minimum number of queues. MAX_NUM is defined in hw specific files.
 195 * Set the minimum to accommodate
 196 *  - 4 standard TX queues
 197 *  - the command queue
 198 *  - 4 PAN TX queues
 199 *  - the PAN multicast queue, and
 200 *  - the AUX (TX during scan dwell) queue.
 201 */
 202#define IWL_MIN_NUM_QUEUES      11
 203
 204/*
 205 * Command queue depends on iPAN support.
 206 */
 207#define IWL_DEFAULT_CMD_QUEUE_NUM       4
 208#define IWL_IPAN_CMD_QUEUE_NUM          9
 209
 210#define IWL_TX_FIFO_BK          0       /* shared */
 211#define IWL_TX_FIFO_BE          1
 212#define IWL_TX_FIFO_VI          2       /* shared */
 213#define IWL_TX_FIFO_VO          3
 214#define IWL_TX_FIFO_BK_IPAN     IWL_TX_FIFO_BK
 215#define IWL_TX_FIFO_BE_IPAN     4
 216#define IWL_TX_FIFO_VI_IPAN     IWL_TX_FIFO_VI
 217#define IWL_TX_FIFO_VO_IPAN     5
 218/* re-uses the VO FIFO, uCode will properly flush/schedule */
 219#define IWL_TX_FIFO_AUX         5
 220#define IWL_TX_FIFO_UNUSED      255
 221
 222#define IWLAGN_CMD_FIFO_NUM     7
 223
 224/*
 225 * This queue number is required for proper operation
 226 * because the ucode will stop/start the scheduler as
 227 * required.
 228 */
 229#define IWL_IPAN_MCAST_QUEUE    8
 230
 231/******************************************************************************
 232 * (0)
 233 * Commonly used structures and definitions:
 234 * Command header, rate_n_flags, txpower
 235 *
 236 *****************************************************************************/
 237
 238/**
 239 * iwlagn rate_n_flags bit fields
 240 *
 241 * rate_n_flags format is used in following iwlagn commands:
 242 *  REPLY_RX (response only)
 243 *  REPLY_RX_MPDU (response only)
 244 *  REPLY_TX (both command and response)
 245 *  REPLY_TX_LINK_QUALITY_CMD
 246 *
 247 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
 248 *  2-0:  0)   6 Mbps
 249 *        1)  12 Mbps
 250 *        2)  18 Mbps
 251 *        3)  24 Mbps
 252 *        4)  36 Mbps
 253 *        5)  48 Mbps
 254 *        6)  54 Mbps
 255 *        7)  60 Mbps
 256 *
 257 *  4-3:  0)  Single stream (SISO)
 258 *        1)  Dual stream (MIMO)
 259 *        2)  Triple stream (MIMO)
 260 *
 261 *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
 262 *
 263 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
 264 *  3-0:  0xD)   6 Mbps
 265 *        0xF)   9 Mbps
 266 *        0x5)  12 Mbps
 267 *        0x7)  18 Mbps
 268 *        0x9)  24 Mbps
 269 *        0xB)  36 Mbps
 270 *        0x1)  48 Mbps
 271 *        0x3)  54 Mbps
 272 *
 273 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
 274 *  6-0:   10)  1 Mbps
 275 *         20)  2 Mbps
 276 *         55)  5.5 Mbps
 277 *        110)  11 Mbps
 278 */
 279#define RATE_MCS_CODE_MSK 0x7
 280#define RATE_MCS_SPATIAL_POS 3
 281#define RATE_MCS_SPATIAL_MSK 0x18
 282#define RATE_MCS_HT_DUP_POS 5
 283#define RATE_MCS_HT_DUP_MSK 0x20
 284/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
 285#define RATE_MCS_RATE_MSK 0xff
 286
 287/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
 288#define RATE_MCS_FLAGS_POS 8
 289#define RATE_MCS_HT_POS 8
 290#define RATE_MCS_HT_MSK 0x100
 291
 292/* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
 293#define RATE_MCS_CCK_POS 9
 294#define RATE_MCS_CCK_MSK 0x200
 295
 296/* Bit 10: (1) Use Green Field preamble */
 297#define RATE_MCS_GF_POS 10
 298#define RATE_MCS_GF_MSK 0x400
 299
 300/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
 301#define RATE_MCS_HT40_POS 11
 302#define RATE_MCS_HT40_MSK 0x800
 303
 304/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
 305#define RATE_MCS_DUP_POS 12
 306#define RATE_MCS_DUP_MSK 0x1000
 307
 308/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
 309#define RATE_MCS_SGI_POS 13
 310#define RATE_MCS_SGI_MSK 0x2000
 311
 312/**
 313 * rate_n_flags Tx antenna masks
 314 * 4965 has 2 transmitters
 315 * 5100 has 1 transmitter B
 316 * 5150 has 1 transmitter A
 317 * 5300 has 3 transmitters
 318 * 5350 has 3 transmitters
 319 * bit14:16
 320 */
 321#define RATE_MCS_ANT_POS        14
 322#define RATE_MCS_ANT_A_MSK      0x04000
 323#define RATE_MCS_ANT_B_MSK      0x08000
 324#define RATE_MCS_ANT_C_MSK      0x10000
 325#define RATE_MCS_ANT_AB_MSK     (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
 326#define RATE_MCS_ANT_ABC_MSK    (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
 327#define RATE_ANT_NUM 3
 328
 329#define POWER_TABLE_NUM_ENTRIES                 33
 330#define POWER_TABLE_NUM_HT_OFDM_ENTRIES         32
 331#define POWER_TABLE_CCK_ENTRY                   32
 332
 333#define IWL_PWR_NUM_HT_OFDM_ENTRIES             24
 334#define IWL_PWR_CCK_ENTRIES                     2
 335
 336/**
 337 * struct tx_power_dual_stream
 338 *
 339 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
 340 *
 341 * Same format as iwl_tx_power_dual_stream, but __le32
 342 */
 343struct tx_power_dual_stream {
 344        __le32 dw;
 345} __packed;
 346
 347/**
 348 * Command REPLY_TX_POWER_DBM_CMD = 0x98
 349 * struct iwlagn_tx_power_dbm_cmd
 350 */
 351#define IWLAGN_TX_POWER_AUTO 0x7f
 352#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
 353
 354struct iwlagn_tx_power_dbm_cmd {
 355        s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
 356        u8 flags;
 357        s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
 358        u8 reserved;
 359} __packed;
 360
 361/**
 362 * Command TX_ANT_CONFIGURATION_CMD = 0x98
 363 * This command is used to configure valid Tx antenna.
 364 * By default uCode concludes the valid antenna according to the radio flavor.
 365 * This command enables the driver to override/modify this conclusion.
 366 */
 367struct iwl_tx_ant_config_cmd {
 368        __le32 valid;
 369} __packed;
 370
 371/******************************************************************************
 372 * (0a)
 373 * Alive and Error Commands & Responses:
 374 *
 375 *****************************************************************************/
 376
 377#define UCODE_VALID_OK  cpu_to_le32(0x1)
 378
 379/**
 380 * REPLY_ALIVE = 0x1 (response only, not a command)
 381 *
 382 * uCode issues this "alive" notification once the runtime image is ready
 383 * to receive commands from the driver.  This is the *second* "alive"
 384 * notification that the driver will receive after rebooting uCode;
 385 * this "alive" is indicated by subtype field != 9.
 386 *
 387 * See comments documenting "BSM" (bootstrap state machine).
 388 *
 389 * This response includes two pointers to structures within the device's
 390 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
 391 *
 392 * 1)  log_event_table_ptr indicates base of the event log.  This traces
 393 *     a 256-entry history of uCode execution within a circular buffer.
 394 *     Its header format is:
 395 *
 396 *      __le32 log_size;     log capacity (in number of entries)
 397 *      __le32 type;         (1) timestamp with each entry, (0) no timestamp
 398 *      __le32 wraps;        # times uCode has wrapped to top of circular buffer
 399 *      __le32 write_index;  next circular buffer entry that uCode would fill
 400 *
 401 *     The header is followed by the circular buffer of log entries.  Entries
 402 *     with timestamps have the following format:
 403 *
 404 *      __le32 event_id;     range 0 - 1500
 405 *      __le32 timestamp;    low 32 bits of TSF (of network, if associated)
 406 *      __le32 data;         event_id-specific data value
 407 *
 408 *     Entries without timestamps contain only event_id and data.
 409 *
 410 *
 411 * 2)  error_event_table_ptr indicates base of the error log.  This contains
 412 *     information about any uCode error that occurs.  For agn, the format
 413 *     of the error log is defined by struct iwl_error_event_table.
 414 *
 415 * The Linux driver can print both logs to the system log when a uCode error
 416 * occurs.
 417 */
 418
 419/*
 420 * Note: This structure is read from the device with IO accesses,
 421 * and the reading already does the endian conversion. As it is
 422 * read with u32-sized accesses, any members with a different size
 423 * need to be ordered correctly though!
 424 */
 425struct iwl_error_event_table {
 426        u32 valid;              /* (nonzero) valid, (0) log is empty */
 427        u32 error_id;           /* type of error */
 428        u32 pc;                 /* program counter */
 429        u32 blink1;             /* branch link */
 430        u32 blink2;             /* branch link */
 431        u32 ilink1;             /* interrupt link */
 432        u32 ilink2;             /* interrupt link */
 433        u32 data1;              /* error-specific data */
 434        u32 data2;              /* error-specific data */
 435        u32 line;               /* source code line of error */
 436        u32 bcon_time;          /* beacon timer */
 437        u32 tsf_low;            /* network timestamp function timer */
 438        u32 tsf_hi;             /* network timestamp function timer */
 439        u32 gp1;                /* GP1 timer register */
 440        u32 gp2;                /* GP2 timer register */
 441        u32 gp3;                /* GP3 timer register */
 442        u32 ucode_ver;          /* uCode version */
 443        u32 hw_ver;             /* HW Silicon version */
 444        u32 brd_ver;            /* HW board version */
 445        u32 log_pc;             /* log program counter */
 446        u32 frame_ptr;          /* frame pointer */
 447        u32 stack_ptr;          /* stack pointer */
 448        u32 hcmd;               /* last host command header */
 449        u32 isr0;               /* isr status register LMPM_NIC_ISR0:
 450                                 * rxtx_flag */
 451        u32 isr1;               /* isr status register LMPM_NIC_ISR1:
 452                                 * host_flag */
 453        u32 isr2;               /* isr status register LMPM_NIC_ISR2:
 454                                 * enc_flag */
 455        u32 isr3;               /* isr status register LMPM_NIC_ISR3:
 456                                 * time_flag */
 457        u32 isr4;               /* isr status register LMPM_NIC_ISR4:
 458                                 * wico interrupt */
 459        u32 isr_pref;           /* isr status register LMPM_NIC_PREF_STAT */
 460        u32 wait_event;         /* wait event() caller address */
 461        u32 l2p_control;        /* L2pControlField */
 462        u32 l2p_duration;       /* L2pDurationField */
 463        u32 l2p_mhvalid;        /* L2pMhValidBits */
 464        u32 l2p_addr_match;     /* L2pAddrMatchStat */
 465        u32 lmpm_pmg_sel;       /* indicate which clocks are turned on
 466                                 * (LMPM_PMG_SEL) */
 467        u32 u_timestamp;        /* indicate when the date and time of the
 468                                 * compilation */
 469        u32 flow_handler;       /* FH read/write pointers, RX credit */
 470} __packed;
 471
 472struct iwl_alive_resp {
 473        u8 ucode_minor;
 474        u8 ucode_major;
 475        __le16 reserved1;
 476        u8 sw_rev[8];
 477        u8 ver_type;
 478        u8 ver_subtype;                 /* not "9" for runtime alive */
 479        __le16 reserved2;
 480        __le32 log_event_table_ptr;     /* SRAM address for event log */
 481        __le32 error_event_table_ptr;   /* SRAM address for error log */
 482        __le32 timestamp;
 483        __le32 is_valid;
 484} __packed;
 485
 486/*
 487 * REPLY_ERROR = 0x2 (response only, not a command)
 488 */
 489struct iwl_error_resp {
 490        __le32 error_type;
 491        u8 cmd_id;
 492        u8 reserved1;
 493        __le16 bad_cmd_seq_num;
 494        __le32 error_info;
 495        __le64 timestamp;
 496} __packed;
 497
 498/******************************************************************************
 499 * (1)
 500 * RXON Commands & Responses:
 501 *
 502 *****************************************************************************/
 503
 504/*
 505 * Rx config defines & structure
 506 */
 507/* rx_config device types  */
 508enum {
 509        RXON_DEV_TYPE_AP = 1,
 510        RXON_DEV_TYPE_ESS = 3,
 511        RXON_DEV_TYPE_IBSS = 4,
 512        RXON_DEV_TYPE_SNIFFER = 6,
 513        RXON_DEV_TYPE_CP = 7,
 514        RXON_DEV_TYPE_2STA = 8,
 515        RXON_DEV_TYPE_P2P = 9,
 516};
 517
 518
 519#define RXON_RX_CHAIN_DRIVER_FORCE_MSK          cpu_to_le16(0x1 << 0)
 520#define RXON_RX_CHAIN_DRIVER_FORCE_POS          (0)
 521#define RXON_RX_CHAIN_VALID_MSK                 cpu_to_le16(0x7 << 1)
 522#define RXON_RX_CHAIN_VALID_POS                 (1)
 523#define RXON_RX_CHAIN_FORCE_SEL_MSK             cpu_to_le16(0x7 << 4)
 524#define RXON_RX_CHAIN_FORCE_SEL_POS             (4)
 525#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK        cpu_to_le16(0x7 << 7)
 526#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS        (7)
 527#define RXON_RX_CHAIN_CNT_MSK                   cpu_to_le16(0x3 << 10)
 528#define RXON_RX_CHAIN_CNT_POS                   (10)
 529#define RXON_RX_CHAIN_MIMO_CNT_MSK              cpu_to_le16(0x3 << 12)
 530#define RXON_RX_CHAIN_MIMO_CNT_POS              (12)
 531#define RXON_RX_CHAIN_MIMO_FORCE_MSK            cpu_to_le16(0x1 << 14)
 532#define RXON_RX_CHAIN_MIMO_FORCE_POS            (14)
 533
 534/* rx_config flags */
 535/* band & modulation selection */
 536#define RXON_FLG_BAND_24G_MSK           cpu_to_le32(1 << 0)
 537#define RXON_FLG_CCK_MSK                cpu_to_le32(1 << 1)
 538/* auto detection enable */
 539#define RXON_FLG_AUTO_DETECT_MSK        cpu_to_le32(1 << 2)
 540/* TGg protection when tx */
 541#define RXON_FLG_TGG_PROTECT_MSK        cpu_to_le32(1 << 3)
 542/* cck short slot & preamble */
 543#define RXON_FLG_SHORT_SLOT_MSK          cpu_to_le32(1 << 4)
 544#define RXON_FLG_SHORT_PREAMBLE_MSK     cpu_to_le32(1 << 5)
 545/* antenna selection */
 546#define RXON_FLG_DIS_DIV_MSK            cpu_to_le32(1 << 7)
 547#define RXON_FLG_ANT_SEL_MSK            cpu_to_le32(0x0f00)
 548#define RXON_FLG_ANT_A_MSK              cpu_to_le32(1 << 8)
 549#define RXON_FLG_ANT_B_MSK              cpu_to_le32(1 << 9)
 550/* radar detection enable */
 551#define RXON_FLG_RADAR_DETECT_MSK       cpu_to_le32(1 << 12)
 552#define RXON_FLG_TGJ_NARROW_BAND_MSK    cpu_to_le32(1 << 13)
 553/* rx response to host with 8-byte TSF
 554* (according to ON_AIR deassertion) */
 555#define RXON_FLG_TSF2HOST_MSK           cpu_to_le32(1 << 15)
 556
 557
 558/* HT flags */
 559#define RXON_FLG_CTRL_CHANNEL_LOC_POS           (22)
 560#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK        cpu_to_le32(0x1 << 22)
 561
 562#define RXON_FLG_HT_OPERATING_MODE_POS          (23)
 563
 564#define RXON_FLG_HT_PROT_MSK                    cpu_to_le32(0x1 << 23)
 565#define RXON_FLG_HT40_PROT_MSK                  cpu_to_le32(0x2 << 23)
 566
 567#define RXON_FLG_CHANNEL_MODE_POS               (25)
 568#define RXON_FLG_CHANNEL_MODE_MSK               cpu_to_le32(0x3 << 25)
 569
 570/* channel mode */
 571enum {
 572        CHANNEL_MODE_LEGACY = 0,
 573        CHANNEL_MODE_PURE_40 = 1,
 574        CHANNEL_MODE_MIXED = 2,
 575        CHANNEL_MODE_RESERVED = 3,
 576};
 577#define RXON_FLG_CHANNEL_MODE_LEGACY    cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
 578#define RXON_FLG_CHANNEL_MODE_PURE_40   cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
 579#define RXON_FLG_CHANNEL_MODE_MIXED     cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
 580
 581/* CTS to self (if spec allows) flag */
 582#define RXON_FLG_SELF_CTS_EN                    cpu_to_le32(0x1<<30)
 583
 584/* rx_config filter flags */
 585/* accept all data frames */
 586#define RXON_FILTER_PROMISC_MSK         cpu_to_le32(1 << 0)
 587/* pass control & management to host */
 588#define RXON_FILTER_CTL2HOST_MSK        cpu_to_le32(1 << 1)
 589/* accept multi-cast */
 590#define RXON_FILTER_ACCEPT_GRP_MSK      cpu_to_le32(1 << 2)
 591/* don't decrypt uni-cast frames */
 592#define RXON_FILTER_DIS_DECRYPT_MSK     cpu_to_le32(1 << 3)
 593/* don't decrypt multi-cast frames */
 594#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
 595/* STA is associated */
 596#define RXON_FILTER_ASSOC_MSK           cpu_to_le32(1 << 5)
 597/* transfer to host non bssid beacons in associated state */
 598#define RXON_FILTER_BCON_AWARE_MSK      cpu_to_le32(1 << 6)
 599
 600/**
 601 * REPLY_RXON = 0x10 (command, has simple generic response)
 602 *
 603 * RXON tunes the radio tuner to a service channel, and sets up a number
 604 * of parameters that are used primarily for Rx, but also for Tx operations.
 605 *
 606 * NOTE:  When tuning to a new channel, driver must set the
 607 *        RXON_FILTER_ASSOC_MSK to 0.  This will clear station-dependent
 608 *        info within the device, including the station tables, tx retry
 609 *        rate tables, and txpower tables.  Driver must build a new station
 610 *        table and txpower table before transmitting anything on the RXON
 611 *        channel.
 612 *
 613 * NOTE:  All RXONs wipe clean the internal txpower table.  Driver must
 614 *        issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
 615 *        regardless of whether RXON_FILTER_ASSOC_MSK is set.
 616 */
 617
 618struct iwl_rxon_cmd {
 619        u8 node_addr[6];
 620        __le16 reserved1;
 621        u8 bssid_addr[6];
 622        __le16 reserved2;
 623        u8 wlap_bssid_addr[6];
 624        __le16 reserved3;
 625        u8 dev_type;
 626        u8 air_propagation;
 627        __le16 rx_chain;
 628        u8 ofdm_basic_rates;
 629        u8 cck_basic_rates;
 630        __le16 assoc_id;
 631        __le32 flags;
 632        __le32 filter_flags;
 633        __le16 channel;
 634        u8 ofdm_ht_single_stream_basic_rates;
 635        u8 ofdm_ht_dual_stream_basic_rates;
 636        u8 ofdm_ht_triple_stream_basic_rates;
 637        u8 reserved5;
 638        __le16 acquisition_data;
 639        __le16 reserved6;
 640} __packed;
 641
 642/*
 643 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
 644 */
 645struct iwl_rxon_assoc_cmd {
 646        __le32 flags;
 647        __le32 filter_flags;
 648        u8 ofdm_basic_rates;
 649        u8 cck_basic_rates;
 650        __le16 reserved1;
 651        u8 ofdm_ht_single_stream_basic_rates;
 652        u8 ofdm_ht_dual_stream_basic_rates;
 653        u8 ofdm_ht_triple_stream_basic_rates;
 654        u8 reserved2;
 655        __le16 rx_chain_select_flags;
 656        __le16 acquisition_data;
 657        __le32 reserved3;
 658} __packed;
 659
 660#define IWL_CONN_MAX_LISTEN_INTERVAL    10
 661#define IWL_MAX_UCODE_BEACON_INTERVAL   4 /* 4096 */
 662
 663/*
 664 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
 665 */
 666struct iwl_rxon_time_cmd {
 667        __le64 timestamp;
 668        __le16 beacon_interval;
 669        __le16 atim_window;
 670        __le32 beacon_init_val;
 671        __le16 listen_interval;
 672        u8 dtim_period;
 673        u8 delta_cp_bss_tbtts;
 674} __packed;
 675
 676/*
 677 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
 678 */
 679/**
 680 * struct iwl5000_channel_switch_cmd
 681 * @band: 0- 5.2GHz, 1- 2.4GHz
 682 * @expect_beacon: 0- resume transmits after channel switch
 683 *                 1- wait for beacon to resume transmits
 684 * @channel: new channel number
 685 * @rxon_flags: Rx on flags
 686 * @rxon_filter_flags: filtering parameters
 687 * @switch_time: switch time in extended beacon format
 688 * @reserved: reserved bytes
 689 */
 690struct iwl5000_channel_switch_cmd {
 691        u8 band;
 692        u8 expect_beacon;
 693        __le16 channel;
 694        __le32 rxon_flags;
 695        __le32 rxon_filter_flags;
 696        __le32 switch_time;
 697        __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
 698} __packed;
 699
 700/**
 701 * struct iwl6000_channel_switch_cmd
 702 * @band: 0- 5.2GHz, 1- 2.4GHz
 703 * @expect_beacon: 0- resume transmits after channel switch
 704 *                 1- wait for beacon to resume transmits
 705 * @channel: new channel number
 706 * @rxon_flags: Rx on flags
 707 * @rxon_filter_flags: filtering parameters
 708 * @switch_time: switch time in extended beacon format
 709 * @reserved: reserved bytes
 710 */
 711struct iwl6000_channel_switch_cmd {
 712        u8 band;
 713        u8 expect_beacon;
 714        __le16 channel;
 715        __le32 rxon_flags;
 716        __le32 rxon_filter_flags;
 717        __le32 switch_time;
 718        __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
 719} __packed;
 720
 721/*
 722 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
 723 */
 724struct iwl_csa_notification {
 725        __le16 band;
 726        __le16 channel;
 727        __le32 status;          /* 0 - OK, 1 - fail */
 728} __packed;
 729
 730/******************************************************************************
 731 * (2)
 732 * Quality-of-Service (QOS) Commands & Responses:
 733 *
 734 *****************************************************************************/
 735
 736/**
 737 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
 738 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
 739 *
 740 * @cw_min: Contention window, start value in numbers of slots.
 741 *          Should be a power-of-2, minus 1.  Device's default is 0x0f.
 742 * @cw_max: Contention window, max value in numbers of slots.
 743 *          Should be a power-of-2, minus 1.  Device's default is 0x3f.
 744 * @aifsn:  Number of slots in Arbitration Interframe Space (before
 745 *          performing random backoff timing prior to Tx).  Device default 1.
 746 * @edca_txop:  Length of Tx opportunity, in uSecs.  Device default is 0.
 747 *
 748 * Device will automatically increase contention window by (2*CW) + 1 for each
 749 * transmission retry.  Device uses cw_max as a bit mask, ANDed with new CW
 750 * value, to cap the CW value.
 751 */
 752struct iwl_ac_qos {
 753        __le16 cw_min;
 754        __le16 cw_max;
 755        u8 aifsn;
 756        u8 reserved1;
 757        __le16 edca_txop;
 758} __packed;
 759
 760/* QoS flags defines */
 761#define QOS_PARAM_FLG_UPDATE_EDCA_MSK   cpu_to_le32(0x01)
 762#define QOS_PARAM_FLG_TGN_MSK           cpu_to_le32(0x02)
 763#define QOS_PARAM_FLG_TXOP_TYPE_MSK     cpu_to_le32(0x10)
 764
 765/* Number of Access Categories (AC) (EDCA), queues 0..3 */
 766#define AC_NUM                4
 767
 768/*
 769 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
 770 *
 771 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
 772 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
 773 */
 774struct iwl_qosparam_cmd {
 775        __le32 qos_flags;
 776        struct iwl_ac_qos ac[AC_NUM];
 777} __packed;
 778
 779/******************************************************************************
 780 * (3)
 781 * Add/Modify Stations Commands & Responses:
 782 *
 783 *****************************************************************************/
 784/*
 785 * Multi station support
 786 */
 787
 788/* Special, dedicated locations within device's station table */
 789#define IWL_AP_ID               0
 790#define IWL_AP_ID_PAN           1
 791#define IWL_STA_ID              2
 792#define IWLAGN_PAN_BCAST_ID     14
 793#define IWLAGN_BROADCAST_ID     15
 794#define IWLAGN_STATION_COUNT    16
 795
 796#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
 797
 798#define STA_FLG_TX_RATE_MSK             cpu_to_le32(1 << 2)
 799#define STA_FLG_PWR_SAVE_MSK            cpu_to_le32(1 << 8)
 800#define STA_FLG_PAN_STATION             cpu_to_le32(1 << 13)
 801#define STA_FLG_RTS_MIMO_PROT_MSK       cpu_to_le32(1 << 17)
 802#define STA_FLG_AGG_MPDU_8US_MSK        cpu_to_le32(1 << 18)
 803#define STA_FLG_MAX_AGG_SIZE_POS        (19)
 804#define STA_FLG_MAX_AGG_SIZE_MSK        cpu_to_le32(3 << 19)
 805#define STA_FLG_HT40_EN_MSK             cpu_to_le32(1 << 21)
 806#define STA_FLG_MIMO_DIS_MSK            cpu_to_le32(1 << 22)
 807#define STA_FLG_AGG_MPDU_DENSITY_POS    (23)
 808#define STA_FLG_AGG_MPDU_DENSITY_MSK    cpu_to_le32(7 << 23)
 809
 810/* Use in mode field.  1: modify existing entry, 0: add new station entry */
 811#define STA_CONTROL_MODIFY_MSK          0x01
 812
 813/* key flags __le16*/
 814#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
 815#define STA_KEY_FLG_NO_ENC      cpu_to_le16(0x0000)
 816#define STA_KEY_FLG_WEP         cpu_to_le16(0x0001)
 817#define STA_KEY_FLG_CCMP        cpu_to_le16(0x0002)
 818#define STA_KEY_FLG_TKIP        cpu_to_le16(0x0003)
 819
 820#define STA_KEY_FLG_KEYID_POS   8
 821#define STA_KEY_FLG_INVALID     cpu_to_le16(0x0800)
 822/* wep key is either from global key (0) or from station info array (1) */
 823#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
 824
 825/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
 826#define STA_KEY_FLG_KEY_SIZE_MSK     cpu_to_le16(0x1000)
 827#define STA_KEY_MULTICAST_MSK        cpu_to_le16(0x4000)
 828#define STA_KEY_MAX_NUM         8
 829#define STA_KEY_MAX_NUM_PAN     16
 830/* must not match WEP_INVALID_OFFSET */
 831#define IWLAGN_HW_KEY_DEFAULT   0xfe
 832
 833/* Flags indicate whether to modify vs. don't change various station params */
 834#define STA_MODIFY_KEY_MASK             0x01
 835#define STA_MODIFY_TID_DISABLE_TX       0x02
 836#define STA_MODIFY_TX_RATE_MSK          0x04
 837#define STA_MODIFY_ADDBA_TID_MSK        0x08
 838#define STA_MODIFY_DELBA_TID_MSK        0x10
 839#define STA_MODIFY_SLEEP_TX_COUNT_MSK   0x20
 840
 841/* Receiver address (actually, Rx station's index into station table),
 842 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
 843#define BUILD_RAxTID(sta_id, tid)       (((sta_id) << 4) + (tid))
 844
 845/* agn */
 846struct iwl_keyinfo {
 847        __le16 key_flags;
 848        u8 tkip_rx_tsc_byte2;   /* TSC[2] for key mix ph1 detection */
 849        u8 reserved1;
 850        __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
 851        u8 key_offset;
 852        u8 reserved2;
 853        u8 key[16];             /* 16-byte unicast decryption key */
 854        __le64 tx_secur_seq_cnt;
 855        __le64 hw_tkip_mic_rx_key;
 856        __le64 hw_tkip_mic_tx_key;
 857} __packed;
 858
 859/**
 860 * struct sta_id_modify
 861 * @addr[ETH_ALEN]: station's MAC address
 862 * @sta_id: index of station in uCode's station table
 863 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
 864 *
 865 * Driver selects unused table index when adding new station,
 866 * or the index to a pre-existing station entry when modifying that station.
 867 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
 868 *
 869 * modify_mask flags select which parameters to modify vs. leave alone.
 870 */
 871struct sta_id_modify {
 872        u8 addr[ETH_ALEN];
 873        __le16 reserved1;
 874        u8 sta_id;
 875        u8 modify_mask;
 876        __le16 reserved2;
 877} __packed;
 878
 879/*
 880 * REPLY_ADD_STA = 0x18 (command)
 881 *
 882 * The device contains an internal table of per-station information,
 883 * with info on security keys, aggregation parameters, and Tx rates for
 884 * initial Tx attempt and any retries (agn devices uses
 885 * REPLY_TX_LINK_QUALITY_CMD,
 886 *
 887 * REPLY_ADD_STA sets up the table entry for one station, either creating
 888 * a new entry, or modifying a pre-existing one.
 889 *
 890 * NOTE:  RXON command (without "associated" bit set) wipes the station table
 891 *        clean.  Moving into RF_KILL state does this also.  Driver must set up
 892 *        new station table before transmitting anything on the RXON channel
 893 *        (except active scans or active measurements; those commands carry
 894 *        their own txpower/rate setup data).
 895 *
 896 *        When getting started on a new channel, driver must set up the
 897 *        IWL_BROADCAST_ID entry (last entry in the table).  For a client
 898 *        station in a BSS, once an AP is selected, driver sets up the AP STA
 899 *        in the IWL_AP_ID entry (1st entry in the table).  BROADCAST and AP
 900 *        are all that are needed for a BSS client station.  If the device is
 901 *        used as AP, or in an IBSS network, driver must set up station table
 902 *        entries for all STAs in network, starting with index IWL_STA_ID.
 903 */
 904
 905struct iwl_addsta_cmd {
 906        u8 mode;                /* 1: modify existing, 0: add new station */
 907        u8 reserved[3];
 908        struct sta_id_modify sta;
 909        struct iwl_keyinfo key;
 910        __le32 station_flags;           /* STA_FLG_* */
 911        __le32 station_flags_msk;       /* STA_FLG_* */
 912
 913        /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
 914         * corresponding to bit (e.g. bit 5 controls TID 5).
 915         * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
 916        __le16 tid_disable_tx;
 917        __le16 legacy_reserved;
 918
 919        /* TID for which to add block-ack support.
 920         * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
 921        u8 add_immediate_ba_tid;
 922
 923        /* TID for which to remove block-ack support.
 924         * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
 925        u8 remove_immediate_ba_tid;
 926
 927        /* Starting Sequence Number for added block-ack support.
 928         * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
 929        __le16 add_immediate_ba_ssn;
 930
 931        /*
 932         * Number of packets OK to transmit to station even though
 933         * it is asleep -- used to synchronise PS-poll and u-APSD
 934         * responses while ucode keeps track of STA sleep state.
 935         */
 936        __le16 sleep_tx_count;
 937
 938        __le16 reserved2;
 939} __packed;
 940
 941
 942#define ADD_STA_SUCCESS_MSK             0x1
 943#define ADD_STA_NO_ROOM_IN_TABLE        0x2
 944#define ADD_STA_NO_BLOCK_ACK_RESOURCE   0x4
 945#define ADD_STA_MODIFY_NON_EXIST_STA    0x8
 946/*
 947 * REPLY_ADD_STA = 0x18 (response)
 948 */
 949struct iwl_add_sta_resp {
 950        u8 status;      /* ADD_STA_* */
 951} __packed;
 952
 953#define REM_STA_SUCCESS_MSK              0x1
 954/*
 955 *  REPLY_REM_STA = 0x19 (response)
 956 */
 957struct iwl_rem_sta_resp {
 958        u8 status;
 959} __packed;
 960
 961/*
 962 *  REPLY_REM_STA = 0x19 (command)
 963 */
 964struct iwl_rem_sta_cmd {
 965        u8 num_sta;     /* number of removed stations */
 966        u8 reserved[3];
 967        u8 addr[ETH_ALEN]; /* MAC addr of the first station */
 968        u8 reserved2[2];
 969} __packed;
 970
 971
 972/* WiFi queues mask */
 973#define IWL_SCD_BK_MSK                  cpu_to_le32(BIT(0))
 974#define IWL_SCD_BE_MSK                  cpu_to_le32(BIT(1))
 975#define IWL_SCD_VI_MSK                  cpu_to_le32(BIT(2))
 976#define IWL_SCD_VO_MSK                  cpu_to_le32(BIT(3))
 977#define IWL_SCD_MGMT_MSK                cpu_to_le32(BIT(3))
 978
 979/* PAN queues mask */
 980#define IWL_PAN_SCD_BK_MSK              cpu_to_le32(BIT(4))
 981#define IWL_PAN_SCD_BE_MSK              cpu_to_le32(BIT(5))
 982#define IWL_PAN_SCD_VI_MSK              cpu_to_le32(BIT(6))
 983#define IWL_PAN_SCD_VO_MSK              cpu_to_le32(BIT(7))
 984#define IWL_PAN_SCD_MGMT_MSK            cpu_to_le32(BIT(7))
 985#define IWL_PAN_SCD_MULTICAST_MSK       cpu_to_le32(BIT(8))
 986
 987#define IWL_AGG_TX_QUEUE_MSK            cpu_to_le32(0xffc00)
 988
 989#define IWL_DROP_ALL                    BIT(1)
 990
 991/*
 992 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
 993 *
 994 * When using full FIFO flush this command checks the scheduler HW block WR/RD
 995 * pointers to check if all the frames were transferred by DMA into the
 996 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
 997 * empty the command can finish.
 998 * This command is used to flush the TXFIFO from transmit commands, it may
 999 * operate on single or multiple queues, the command queue can't be flushed by
1000 * this command. The command response is returned when all the queue flush
1001 * operations are done. Each TX command flushed return response with the FLUSH
1002 * status set in the TX response status. When FIFO flush operation is used,
1003 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1004 * are set.
1005 *
1006 * @queue_control: bit mask for which queues to flush
1007 * @flush_control: flush controls
1008 *      0: Dump single MSDU
1009 *      1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1010 *      2: Dump all FIFO
1011 */
1012struct iwl_txfifo_flush_cmd {
1013        __le32 queue_control;
1014        __le16 flush_control;
1015        __le16 reserved;
1016} __packed;
1017
1018/*
1019 * REPLY_WEP_KEY = 0x20
1020 */
1021struct iwl_wep_key {
1022        u8 key_index;
1023        u8 key_offset;
1024        u8 reserved1[2];
1025        u8 key_size;
1026        u8 reserved2[3];
1027        u8 key[16];
1028} __packed;
1029
1030struct iwl_wep_cmd {
1031        u8 num_keys;
1032        u8 global_key_type;
1033        u8 flags;
1034        u8 reserved;
1035        struct iwl_wep_key key[0];
1036} __packed;
1037
1038#define WEP_KEY_WEP_TYPE 1
1039#define WEP_KEYS_MAX 4
1040#define WEP_INVALID_OFFSET 0xff
1041#define WEP_KEY_LEN_64 5
1042#define WEP_KEY_LEN_128 13
1043
1044/******************************************************************************
1045 * (4)
1046 * Rx Responses:
1047 *
1048 *****************************************************************************/
1049
1050#define RX_RES_STATUS_NO_CRC32_ERROR    cpu_to_le32(1 << 0)
1051#define RX_RES_STATUS_NO_RXE_OVERFLOW   cpu_to_le32(1 << 1)
1052
1053#define RX_RES_PHY_FLAGS_BAND_24_MSK    cpu_to_le16(1 << 0)
1054#define RX_RES_PHY_FLAGS_MOD_CCK_MSK            cpu_to_le16(1 << 1)
1055#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK     cpu_to_le16(1 << 2)
1056#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK        cpu_to_le16(1 << 3)
1057#define RX_RES_PHY_FLAGS_ANTENNA_MSK            0x70
1058#define RX_RES_PHY_FLAGS_ANTENNA_POS            4
1059#define RX_RES_PHY_FLAGS_AGG_MSK                cpu_to_le16(1 << 7)
1060
1061#define RX_RES_STATUS_SEC_TYPE_MSK      (0x7 << 8)
1062#define RX_RES_STATUS_SEC_TYPE_NONE     (0x0 << 8)
1063#define RX_RES_STATUS_SEC_TYPE_WEP      (0x1 << 8)
1064#define RX_RES_STATUS_SEC_TYPE_CCMP     (0x2 << 8)
1065#define RX_RES_STATUS_SEC_TYPE_TKIP     (0x3 << 8)
1066#define RX_RES_STATUS_SEC_TYPE_ERR      (0x7 << 8)
1067
1068#define RX_RES_STATUS_STATION_FOUND     (1<<6)
1069#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH  (1<<7)
1070
1071#define RX_RES_STATUS_DECRYPT_TYPE_MSK  (0x3 << 11)
1072#define RX_RES_STATUS_NOT_DECRYPT       (0x0 << 11)
1073#define RX_RES_STATUS_DECRYPT_OK        (0x3 << 11)
1074#define RX_RES_STATUS_BAD_ICV_MIC       (0x1 << 11)
1075#define RX_RES_STATUS_BAD_KEY_TTAK      (0x2 << 11)
1076
1077#define RX_MPDU_RES_STATUS_ICV_OK       (0x20)
1078#define RX_MPDU_RES_STATUS_MIC_OK       (0x40)
1079#define RX_MPDU_RES_STATUS_TTAK_OK      (1 << 7)
1080#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1081
1082
1083#define IWLAGN_RX_RES_PHY_CNT 8
1084#define IWLAGN_RX_RES_AGC_IDX     1
1085#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1086#define IWLAGN_RX_RES_RSSI_C_IDX  3
1087#define IWLAGN_OFDM_AGC_MSK 0xfe00
1088#define IWLAGN_OFDM_AGC_BIT_POS 9
1089#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1090#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1091#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1092#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1093#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1094#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1095#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1096#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1097#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1098
1099struct iwlagn_non_cfg_phy {
1100        __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT];  /* up to 8 phy entries */
1101} __packed;
1102
1103
1104/*
1105 * REPLY_RX = 0xc3 (response only, not a command)
1106 * Used only for legacy (non 11n) frames.
1107 */
1108struct iwl_rx_phy_res {
1109        u8 non_cfg_phy_cnt;     /* non configurable DSP phy data byte count */
1110        u8 cfg_phy_cnt;         /* configurable DSP phy data byte count */
1111        u8 stat_id;             /* configurable DSP phy data set ID */
1112        u8 reserved1;
1113        __le64 timestamp;       /* TSF at on air rise */
1114        __le32 beacon_time_stamp; /* beacon at on-air rise */
1115        __le16 phy_flags;       /* general phy flags: band, modulation, ... */
1116        __le16 channel;         /* channel number */
1117        u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1118        __le32 rate_n_flags;    /* RATE_MCS_* */
1119        __le16 byte_count;      /* frame's byte-count */
1120        __le16 frame_time;      /* frame's time on the air */
1121} __packed;
1122
1123struct iwl_rx_mpdu_res_start {
1124        __le16 byte_count;
1125        __le16 reserved;
1126} __packed;
1127
1128
1129/******************************************************************************
1130 * (5)
1131 * Tx Commands & Responses:
1132 *
1133 * Driver must place each REPLY_TX command into one of the prioritized Tx
1134 * queues in host DRAM, shared between driver and device (see comments for
1135 * SCD registers and Tx/Rx Queues).  When the device's Tx scheduler and uCode
1136 * are preparing to transmit, the device pulls the Tx command over the PCI
1137 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1138 * from which data will be transmitted.
1139 *
1140 * uCode handles all timing and protocol related to control frames
1141 * (RTS/CTS/ACK), based on flags in the Tx command.  uCode and Tx scheduler
1142 * handle reception of block-acks; uCode updates the host driver via
1143 * REPLY_COMPRESSED_BA.
1144 *
1145 * uCode handles retrying Tx when an ACK is expected but not received.
1146 * This includes trying lower data rates than the one requested in the Tx
1147 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1148 *
1149 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1150 * This command must be executed after every RXON command, before Tx can occur.
1151 *****************************************************************************/
1152
1153/* REPLY_TX Tx flags field */
1154
1155/*
1156 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1157 * before this frame. if CTS-to-self required check
1158 * RXON_FLG_SELF_CTS_EN status.
1159 */
1160#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1161
1162/* 1: Expect ACK from receiving station
1163 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1164 * Set this for unicast frames, but not broadcast/multicast. */
1165#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1166
1167/* For agn devices:
1168 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1169 *    Tx command's initial_rate_index indicates first rate to try;
1170 *    uCode walks through table for additional Tx attempts.
1171 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1172 *    This rate will be used for all Tx attempts; it will not be scaled. */
1173#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1174
1175/* 1: Expect immediate block-ack.
1176 * Set when Txing a block-ack request frame.  Also set TX_CMD_FLG_ACK_MSK. */
1177#define TX_CMD_FLG_IMM_BA_RSP_MASK  cpu_to_le32(1 << 6)
1178
1179/* Tx antenna selection field; reserved (0) for agn devices. */
1180#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1181
1182/* 1: Ignore Bluetooth priority for this frame.
1183 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1184#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1185
1186/* 1: uCode overrides sequence control field in MAC header.
1187 * 0: Driver provides sequence control field in MAC header.
1188 * Set this for management frames, non-QOS data frames, non-unicast frames,
1189 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1190#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1191
1192/* 1: This frame is non-last MPDU; more fragments are coming.
1193 * 0: Last fragment, or not using fragmentation. */
1194#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1195
1196/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1197 * 0: No TSF required in outgoing frame.
1198 * Set this for transmitting beacons and probe responses. */
1199#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1200
1201/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1202 *    alignment of frame's payload data field.
1203 * 0: No pad
1204 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1205 * field (but not both).  Driver must align frame data (i.e. data following
1206 * MAC header) to DWORD boundary. */
1207#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1208
1209/* accelerate aggregation support
1210 * 0 - no CCMP encryption; 1 - CCMP encryption */
1211#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1212
1213/* HCCA-AP - disable duration overwriting. */
1214#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1215
1216
1217/*
1218 * TX command security control
1219 */
1220#define TX_CMD_SEC_WEP          0x01
1221#define TX_CMD_SEC_CCM          0x02
1222#define TX_CMD_SEC_TKIP         0x03
1223#define TX_CMD_SEC_MSK          0x03
1224#define TX_CMD_SEC_SHIFT        6
1225#define TX_CMD_SEC_KEY128       0x08
1226
1227/*
1228 * security overhead sizes
1229 */
1230#define WEP_IV_LEN 4
1231#define WEP_ICV_LEN 4
1232#define CCMP_MIC_LEN 8
1233#define TKIP_ICV_LEN 4
1234
1235/*
1236 * REPLY_TX = 0x1c (command)
1237 */
1238
1239/*
1240 * 4965 uCode updates these Tx attempt count values in host DRAM.
1241 * Used for managing Tx retries when expecting block-acks.
1242 * Driver should set these fields to 0.
1243 */
1244struct iwl_dram_scratch {
1245        u8 try_cnt;             /* Tx attempts */
1246        u8 bt_kill_cnt;         /* Tx attempts blocked by Bluetooth device */
1247        __le16 reserved;
1248} __packed;
1249
1250struct iwl_tx_cmd {
1251        /*
1252         * MPDU byte count:
1253         * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1254         * + 8 byte IV for CCM or TKIP (not used for WEP)
1255         * + Data payload
1256         * + 8-byte MIC (not used for CCM/WEP)
1257         * NOTE:  Does not include Tx command bytes, post-MAC pad bytes,
1258         *        MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1259         * Range: 14-2342 bytes.
1260         */
1261        __le16 len;
1262
1263        /*
1264         * MPDU or MSDU byte count for next frame.
1265         * Used for fragmentation and bursting, but not 11n aggregation.
1266         * Same as "len", but for next frame.  Set to 0 if not applicable.
1267         */
1268        __le16 next_frame_len;
1269
1270        __le32 tx_flags;        /* TX_CMD_FLG_* */
1271
1272        /* uCode may modify this field of the Tx command (in host DRAM!).
1273         * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1274        struct iwl_dram_scratch scratch;
1275
1276        /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1277        __le32 rate_n_flags;    /* RATE_MCS_* */
1278
1279        /* Index of destination station in uCode's station table */
1280        u8 sta_id;
1281
1282        /* Type of security encryption:  CCM or TKIP */
1283        u8 sec_ctl;             /* TX_CMD_SEC_* */
1284
1285        /*
1286         * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1287         * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set.  Normally "0" for
1288         * data frames, this field may be used to selectively reduce initial
1289         * rate (via non-0 value) for special frames (e.g. management), while
1290         * still supporting rate scaling for all frames.
1291         */
1292        u8 initial_rate_index;
1293        u8 reserved;
1294        u8 key[16];
1295        __le16 next_frame_flags;
1296        __le16 reserved2;
1297        union {
1298                __le32 life_time;
1299                __le32 attempt;
1300        } stop_time;
1301
1302        /* Host DRAM physical address pointer to "scratch" in this command.
1303         * Must be dword aligned.  "0" in dram_lsb_ptr disables usage. */
1304        __le32 dram_lsb_ptr;
1305        u8 dram_msb_ptr;
1306
1307        u8 rts_retry_limit;     /*byte 50 */
1308        u8 data_retry_limit;    /*byte 51 */
1309        u8 tid_tspec;
1310        union {
1311                __le16 pm_frame_timeout;
1312                __le16 attempt_duration;
1313        } timeout;
1314
1315        /*
1316         * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1317         * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1318         */
1319        __le16 driver_txop;
1320
1321        /*
1322         * MAC header goes here, followed by 2 bytes padding if MAC header
1323         * length is 26 or 30 bytes, followed by payload data
1324         */
1325        u8 payload[0];
1326        struct ieee80211_hdr hdr[0];
1327} __packed;
1328
1329/*
1330 * TX command response is sent after *agn* transmission attempts.
1331 *
1332 * both postpone and abort status are expected behavior from uCode. there is
1333 * no special operation required from driver; except for RFKILL_FLUSH,
1334 * which required tx flush host command to flush all the tx frames in queues
1335 */
1336enum {
1337        TX_STATUS_SUCCESS = 0x01,
1338        TX_STATUS_DIRECT_DONE = 0x02,
1339        /* postpone TX */
1340        TX_STATUS_POSTPONE_DELAY = 0x40,
1341        TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1342        TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1343        TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1344        TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1345        /* abort TX */
1346        TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1347        TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1348        TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1349        TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1350        TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1351        TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1352        TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1353        TX_STATUS_FAIL_DEST_PS = 0x88,
1354        TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1355        TX_STATUS_FAIL_BT_RETRY = 0x8a,
1356        TX_STATUS_FAIL_STA_INVALID = 0x8b,
1357        TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1358        TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1359        TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1360        TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1361        TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1362        TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1363};
1364
1365#define TX_PACKET_MODE_REGULAR          0x0000
1366#define TX_PACKET_MODE_BURST_SEQ        0x0100
1367#define TX_PACKET_MODE_BURST_FIRST      0x0200
1368
1369enum {
1370        TX_POWER_PA_NOT_ACTIVE = 0x0,
1371};
1372
1373enum {
1374        TX_STATUS_MSK = 0x000000ff,             /* bits 0:7 */
1375        TX_STATUS_DELAY_MSK = 0x00000040,
1376        TX_STATUS_ABORT_MSK = 0x00000080,
1377        TX_PACKET_MODE_MSK = 0x0000ff00,        /* bits 8:15 */
1378        TX_FIFO_NUMBER_MSK = 0x00070000,        /* bits 16:18 */
1379        TX_RESERVED = 0x00780000,               /* bits 19:22 */
1380        TX_POWER_PA_DETECT_MSK = 0x7f800000,    /* bits 23:30 */
1381        TX_ABORT_REQUIRED_MSK = 0x80000000,     /* bits 31:31 */
1382};
1383
1384/* *******************************
1385 * TX aggregation status
1386 ******************************* */
1387
1388enum {
1389        AGG_TX_STATE_TRANSMITTED = 0x00,
1390        AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1391        AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1392        AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1393        AGG_TX_STATE_ABORT_MSK = 0x08,
1394        AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1395        AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1396        AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1397        AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1398        AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1399        AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1400        AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1401        AGG_TX_STATE_DELAY_TX_MSK = 0x400
1402};
1403
1404#define AGG_TX_STATUS_MSK       0x00000fff      /* bits 0:11 */
1405#define AGG_TX_TRY_MSK          0x0000f000      /* bits 12:15 */
1406#define AGG_TX_TRY_POS          12
1407
1408#define AGG_TX_STATE_LAST_SENT_MSK  (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1409                                     AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1410                                     AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1411
1412/* # tx attempts for first frame in aggregation */
1413#define AGG_TX_STATE_TRY_CNT_POS 12
1414#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1415
1416/* Command ID and sequence number of Tx command for this frame */
1417#define AGG_TX_STATE_SEQ_NUM_POS 16
1418#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1419
1420/*
1421 * REPLY_TX = 0x1c (response)
1422 *
1423 * This response may be in one of two slightly different formats, indicated
1424 * by the frame_count field:
1425 *
1426 * 1)  No aggregation (frame_count == 1).  This reports Tx results for
1427 *     a single frame.  Multiple attempts, at various bit rates, may have
1428 *     been made for this frame.
1429 *
1430 * 2)  Aggregation (frame_count > 1).  This reports Tx results for
1431 *     2 or more frames that used block-acknowledge.  All frames were
1432 *     transmitted at same rate.  Rate scaling may have been used if first
1433 *     frame in this new agg block failed in previous agg block(s).
1434 *
1435 *     Note that, for aggregation, ACK (block-ack) status is not delivered here;
1436 *     block-ack has not been received by the time the agn device records
1437 *     this status.
1438 *     This status relates to reasons the tx might have been blocked or aborted
1439 *     within the sending station (this agn device), rather than whether it was
1440 *     received successfully by the destination station.
1441 */
1442struct agg_tx_status {
1443        __le16 status;
1444        __le16 sequence;
1445} __packed;
1446
1447/*
1448 * definitions for initial rate index field
1449 * bits [3:0] initial rate index
1450 * bits [6:4] rate table color, used for the initial rate
1451 * bit-7 invalid rate indication
1452 *   i.e. rate was not chosen from rate table
1453 *   or rate table color was changed during frame retries
1454 * refer tlc rate info
1455 */
1456
1457#define IWL50_TX_RES_INIT_RATE_INDEX_POS        0
1458#define IWL50_TX_RES_INIT_RATE_INDEX_MSK        0x0f
1459#define IWL50_TX_RES_RATE_TABLE_COLOR_POS       4
1460#define IWL50_TX_RES_RATE_TABLE_COLOR_MSK       0x70
1461#define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1462
1463/* refer to ra_tid */
1464#define IWLAGN_TX_RES_TID_POS   0
1465#define IWLAGN_TX_RES_TID_MSK   0x0f
1466#define IWLAGN_TX_RES_RA_POS    4
1467#define IWLAGN_TX_RES_RA_MSK    0xf0
1468
1469struct iwlagn_tx_resp {
1470        u8 frame_count;         /* 1 no aggregation, >1 aggregation */
1471        u8 bt_kill_count;       /* # blocked by bluetooth (unused for agg) */
1472        u8 failure_rts;         /* # failures due to unsuccessful RTS */
1473        u8 failure_frame;       /* # failures due to no ACK (unused for agg) */
1474
1475        /* For non-agg:  Rate at which frame was successful.
1476         * For agg:  Rate at which all frames were transmitted. */
1477        __le32 rate_n_flags;    /* RATE_MCS_*  */
1478
1479        /* For non-agg:  RTS + CTS + frame tx attempts time + ACK.
1480         * For agg:  RTS + CTS + aggregation tx time + block-ack time. */
1481        __le16 wireless_media_time;     /* uSecs */
1482
1483        u8 pa_status;           /* RF power amplifier measurement (not used) */
1484        u8 pa_integ_res_a[3];
1485        u8 pa_integ_res_b[3];
1486        u8 pa_integ_res_C[3];
1487
1488        __le32 tfd_info;
1489        __le16 seq_ctl;
1490        __le16 byte_cnt;
1491        u8 tlc_info;
1492        u8 ra_tid;              /* tid (0:3), sta_id (4:7) */
1493        __le16 frame_ctrl;
1494        /*
1495         * For non-agg:  frame status TX_STATUS_*
1496         * For agg:  status of 1st frame, AGG_TX_STATE_*; other frame status
1497         *           fields follow this one, up to frame_count.
1498         *           Bit fields:
1499         *           11- 0:  AGG_TX_STATE_* status code
1500         *           15-12:  Retry count for 1st frame in aggregation (retries
1501         *                   occur if tx failed for this frame when it was a
1502         *                   member of a previous aggregation block).  If rate
1503         *                   scaling is used, retry count indicates the rate
1504         *                   table entry used for all frames in the new agg.
1505         *           31-16:  Sequence # for this frame's Tx cmd (not SSN!)
1506         */
1507        struct agg_tx_status status;    /* TX status (in aggregation -
1508                                         * status of 1st frame) */
1509} __packed;
1510/*
1511 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1512 *
1513 * Reports Block-Acknowledge from recipient station
1514 */
1515struct iwl_compressed_ba_resp {
1516        __le32 sta_addr_lo32;
1517        __le16 sta_addr_hi16;
1518        __le16 reserved;
1519
1520        /* Index of recipient (BA-sending) station in uCode's station table */
1521        u8 sta_id;
1522        u8 tid;
1523        __le16 seq_ctl;
1524        __le64 bitmap;
1525        __le16 scd_flow;
1526        __le16 scd_ssn;
1527        u8 txed;        /* number of frames sent */
1528        u8 txed_2_done; /* number of frames acked */
1529        __le16 reserved1;
1530} __packed;
1531
1532/*
1533 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1534 *
1535 */
1536
1537/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1538#define  LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK    (1 << 0)
1539
1540/* # of EDCA prioritized tx fifos */
1541#define  LINK_QUAL_AC_NUM AC_NUM
1542
1543/* # entries in rate scale table to support Tx retries */
1544#define  LINK_QUAL_MAX_RETRY_NUM 16
1545
1546/* Tx antenna selection values */
1547#define  LINK_QUAL_ANT_A_MSK (1 << 0)
1548#define  LINK_QUAL_ANT_B_MSK (1 << 1)
1549#define  LINK_QUAL_ANT_MSK   (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1550
1551
1552/**
1553 * struct iwl_link_qual_general_params
1554 *
1555 * Used in REPLY_TX_LINK_QUALITY_CMD
1556 */
1557struct iwl_link_qual_general_params {
1558        u8 flags;
1559
1560        /* No entries at or above this (driver chosen) index contain MIMO */
1561        u8 mimo_delimiter;
1562
1563        /* Best single antenna to use for single stream (legacy, SISO). */
1564        u8 single_stream_ant_msk;       /* LINK_QUAL_ANT_* */
1565
1566        /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1567        u8 dual_stream_ant_msk;         /* LINK_QUAL_ANT_* */
1568
1569        /*
1570         * If driver needs to use different initial rates for different
1571         * EDCA QOS access categories (as implemented by tx fifos 0-3),
1572         * this table will set that up, by indicating the indexes in the
1573         * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1574         * Otherwise, driver should set all entries to 0.
1575         *
1576         * Entry usage:
1577         * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1578         * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1579         */
1580        u8 start_rate_index[LINK_QUAL_AC_NUM];
1581} __packed;
1582
1583#define LINK_QUAL_AGG_TIME_LIMIT_DEF    (4000) /* 4 milliseconds */
1584#define LINK_QUAL_AGG_TIME_LIMIT_MAX    (8000)
1585#define LINK_QUAL_AGG_TIME_LIMIT_MIN    (100)
1586
1587#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1588#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1589#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1590
1591#define LINK_QUAL_AGG_FRAME_LIMIT_DEF   (63)
1592#define LINK_QUAL_AGG_FRAME_LIMIT_MAX   (63)
1593#define LINK_QUAL_AGG_FRAME_LIMIT_MIN   (0)
1594
1595/**
1596 * struct iwl_link_qual_agg_params
1597 *
1598 * Used in REPLY_TX_LINK_QUALITY_CMD
1599 */
1600struct iwl_link_qual_agg_params {
1601
1602        /*
1603         *Maximum number of uSec in aggregation.
1604         * default set to 4000 (4 milliseconds) if not configured in .cfg
1605         */
1606        __le16 agg_time_limit;
1607
1608        /*
1609         * Number of Tx retries allowed for a frame, before that frame will
1610         * no longer be considered for the start of an aggregation sequence
1611         * (scheduler will then try to tx it as single frame).
1612         * Driver should set this to 3.
1613         */
1614        u8 agg_dis_start_th;
1615
1616        /*
1617         * Maximum number of frames in aggregation.
1618         * 0 = no limit (default).  1 = no aggregation.
1619         * Other values = max # frames in aggregation.
1620         */
1621        u8 agg_frame_cnt_limit;
1622
1623        __le32 reserved;
1624} __packed;
1625
1626/*
1627 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1628 *
1629 * For agn devices
1630 *
1631 * Each station in the agn device's internal station table has its own table
1632 * of 16
1633 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1634 * an ACK is not received.  This command replaces the entire table for
1635 * one station.
1636 *
1637 * NOTE:  Station must already be in agn device's station table.
1638 *        Use REPLY_ADD_STA.
1639 *
1640 * The rate scaling procedures described below work well.  Of course, other
1641 * procedures are possible, and may work better for particular environments.
1642 *
1643 *
1644 * FILLING THE RATE TABLE
1645 *
1646 * Given a particular initial rate and mode, as determined by the rate
1647 * scaling algorithm described below, the Linux driver uses the following
1648 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1649 * Link Quality command:
1650 *
1651 *
1652 * 1)  If using High-throughput (HT) (SISO or MIMO) initial rate:
1653 *     a) Use this same initial rate for first 3 entries.
1654 *     b) Find next lower available rate using same mode (SISO or MIMO),
1655 *        use for next 3 entries.  If no lower rate available, switch to
1656 *        legacy mode (no HT40 channel, no MIMO, no short guard interval).
1657 *     c) If using MIMO, set command's mimo_delimiter to number of entries
1658 *        using MIMO (3 or 6).
1659 *     d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1660 *        no MIMO, no short guard interval), at the next lower bit rate
1661 *        (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1662 *        legacy procedure for remaining table entries.
1663 *
1664 * 2)  If using legacy initial rate:
1665 *     a) Use the initial rate for only one entry.
1666 *     b) For each following entry, reduce the rate to next lower available
1667 *        rate, until reaching the lowest available rate.
1668 *     c) When reducing rate, also switch antenna selection.
1669 *     d) Once lowest available rate is reached, repeat this rate until
1670 *        rate table is filled (16 entries), switching antenna each entry.
1671 *
1672 *
1673 * ACCUMULATING HISTORY
1674 *
1675 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1676 * uses two sets of frame Tx success history:  One for the current/active
1677 * modulation mode, and one for a speculative/search mode that is being
1678 * attempted. If the speculative mode turns out to be more effective (i.e.
1679 * actual transfer rate is better), then the driver continues to use the
1680 * speculative mode as the new current active mode.
1681 *
1682 * Each history set contains, separately for each possible rate, data for a
1683 * sliding window of the 62 most recent tx attempts at that rate.  The data
1684 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1685 * and attempted frames, from which the driver can additionally calculate a
1686 * success ratio (success / attempted) and number of failures
1687 * (attempted - success), and control the size of the window (attempted).
1688 * The driver uses the bit map to remove successes from the success sum, as
1689 * the oldest tx attempts fall out of the window.
1690 *
1691 * When the agn device makes multiple tx attempts for a given frame, each
1692 * attempt might be at a different rate, and have different modulation
1693 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1694 * up in the rate scaling table in the Link Quality command.  The driver must
1695 * determine which rate table entry was used for each tx attempt, to determine
1696 * which rate-specific history to update, and record only those attempts that
1697 * match the modulation characteristics of the history set.
1698 *
1699 * When using block-ack (aggregation), all frames are transmitted at the same
1700 * rate, since there is no per-attempt acknowledgment from the destination
1701 * station.  The Tx response struct iwl_tx_resp indicates the Tx rate in
1702 * rate_n_flags field.  After receiving a block-ack, the driver can update
1703 * history for the entire block all at once.
1704 *
1705 *
1706 * FINDING BEST STARTING RATE:
1707 *
1708 * When working with a selected initial modulation mode (see below), the
1709 * driver attempts to find a best initial rate.  The initial rate is the
1710 * first entry in the Link Quality command's rate table.
1711 *
1712 * 1)  Calculate actual throughput (success ratio * expected throughput, see
1713 *     table below) for current initial rate.  Do this only if enough frames
1714 *     have been attempted to make the value meaningful:  at least 6 failed
1715 *     tx attempts, or at least 8 successes.  If not enough, don't try rate
1716 *     scaling yet.
1717 *
1718 * 2)  Find available rates adjacent to current initial rate.  Available means:
1719 *     a)  supported by hardware &&
1720 *     b)  supported by association &&
1721 *     c)  within any constraints selected by user
1722 *
1723 * 3)  Gather measured throughputs for adjacent rates.  These might not have
1724 *     enough history to calculate a throughput.  That's okay, we might try
1725 *     using one of them anyway!
1726 *
1727 * 4)  Try decreasing rate if, for current rate:
1728 *     a)  success ratio is < 15% ||
1729 *     b)  lower adjacent rate has better measured throughput ||
1730 *     c)  higher adjacent rate has worse throughput, and lower is unmeasured
1731 *
1732 *     As a sanity check, if decrease was determined above, leave rate
1733 *     unchanged if:
1734 *     a)  lower rate unavailable
1735 *     b)  success ratio at current rate > 85% (very good)
1736 *     c)  current measured throughput is better than expected throughput
1737 *         of lower rate (under perfect 100% tx conditions, see table below)
1738 *
1739 * 5)  Try increasing rate if, for current rate:
1740 *     a)  success ratio is < 15% ||
1741 *     b)  both adjacent rates' throughputs are unmeasured (try it!) ||
1742 *     b)  higher adjacent rate has better measured throughput ||
1743 *     c)  lower adjacent rate has worse throughput, and higher is unmeasured
1744 *
1745 *     As a sanity check, if increase was determined above, leave rate
1746 *     unchanged if:
1747 *     a)  success ratio at current rate < 70%.  This is not particularly
1748 *         good performance; higher rate is sure to have poorer success.
1749 *
1750 * 6)  Re-evaluate the rate after each tx frame.  If working with block-
1751 *     acknowledge, history and statistics may be calculated for the entire
1752 *     block (including prior history that fits within the history windows),
1753 *     before re-evaluation.
1754 *
1755 * FINDING BEST STARTING MODULATION MODE:
1756 *
1757 * After working with a modulation mode for a "while" (and doing rate scaling),
1758 * the driver searches for a new initial mode in an attempt to improve
1759 * throughput.  The "while" is measured by numbers of attempted frames:
1760 *
1761 * For legacy mode, search for new mode after:
1762 *   480 successful frames, or 160 failed frames
1763 * For high-throughput modes (SISO or MIMO), search for new mode after:
1764 *   4500 successful frames, or 400 failed frames
1765 *
1766 * Mode switch possibilities are (3 for each mode):
1767 *
1768 * For legacy:
1769 *   Change antenna, try SISO (if HT association), try MIMO (if HT association)
1770 * For SISO:
1771 *   Change antenna, try MIMO, try shortened guard interval (SGI)
1772 * For MIMO:
1773 *   Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1774 *
1775 * When trying a new mode, use the same bit rate as the old/current mode when
1776 * trying antenna switches and shortened guard interval.  When switching to
1777 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1778 * for which the expected throughput (under perfect conditions) is about the
1779 * same or slightly better than the actual measured throughput delivered by
1780 * the old/current mode.
1781 *
1782 * Actual throughput can be estimated by multiplying the expected throughput
1783 * by the success ratio (successful / attempted tx frames).  Frame size is
1784 * not considered in this calculation; it assumes that frame size will average
1785 * out to be fairly consistent over several samples.  The following are
1786 * metric values for expected throughput assuming 100% success ratio.
1787 * Only G band has support for CCK rates:
1788 *
1789 *           RATE:  1    2    5   11    6   9   12   18   24   36   48   54   60
1790 *
1791 *              G:  7   13   35   58   40  57   72   98  121  154  177  186  186
1792 *              A:  0    0    0    0   40  57   72   98  121  154  177  186  186
1793 *     SISO 20MHz:  0    0    0    0   42  42   76  102  124  159  183  193  202
1794 * SGI SISO 20MHz:  0    0    0    0   46  46   82  110  132  168  192  202  211
1795 *     MIMO 20MHz:  0    0    0    0   74  74  123  155  179  214  236  244  251
1796 * SGI MIMO 20MHz:  0    0    0    0   81  81  131  164  188  222  243  251  257
1797 *     SISO 40MHz:  0    0    0    0   77  77  127  160  184  220  242  250  257
1798 * SGI SISO 40MHz:  0    0    0    0   83  83  135  169  193  229  250  257  264
1799 *     MIMO 40MHz:  0    0    0    0  123 123  182  214  235  264  279  285  289
1800 * SGI MIMO 40MHz:  0    0    0    0  131 131  191  222  242  270  284  289  293
1801 *
1802 * After the new mode has been tried for a short while (minimum of 6 failed
1803 * frames or 8 successful frames), compare success ratio and actual throughput
1804 * estimate of the new mode with the old.  If either is better with the new
1805 * mode, continue to use the new mode.
1806 *
1807 * Continue comparing modes until all 3 possibilities have been tried.
1808 * If moving from legacy to HT, try all 3 possibilities from the new HT
1809 * mode.  After trying all 3, a best mode is found.  Continue to use this mode
1810 * for the longer "while" described above (e.g. 480 successful frames for
1811 * legacy), and then repeat the search process.
1812 *
1813 */
1814struct iwl_link_quality_cmd {
1815
1816        /* Index of destination/recipient station in uCode's station table */
1817        u8 sta_id;
1818        u8 reserved1;
1819        __le16 control;         /* not used */
1820        struct iwl_link_qual_general_params general_params;
1821        struct iwl_link_qual_agg_params agg_params;
1822
1823        /*
1824         * Rate info; when using rate-scaling, Tx command's initial_rate_index
1825         * specifies 1st Tx rate attempted, via index into this table.
1826         * agn devices works its way through table when retrying Tx.
1827         */
1828        struct {
1829                __le32 rate_n_flags;    /* RATE_MCS_*, IWL_RATE_* */
1830        } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1831        __le32 reserved2;
1832} __packed;
1833
1834/*
1835 * BT configuration enable flags:
1836 *   bit 0 - 1: BT channel announcement enabled
1837 *           0: disable
1838 *   bit 1 - 1: priority of BT device enabled
1839 *           0: disable
1840 *   bit 2 - 1: BT 2 wire support enabled
1841 *           0: disable
1842 */
1843#define BT_COEX_DISABLE (0x0)
1844#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1845#define BT_ENABLE_PRIORITY         BIT(1)
1846#define BT_ENABLE_2_WIRE           BIT(2)
1847
1848#define BT_COEX_DISABLE (0x0)
1849#define BT_COEX_ENABLE  (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1850
1851#define BT_LEAD_TIME_MIN (0x0)
1852#define BT_LEAD_TIME_DEF (0x1E)
1853#define BT_LEAD_TIME_MAX (0xFF)
1854
1855#define BT_MAX_KILL_MIN (0x1)
1856#define BT_MAX_KILL_DEF (0x5)
1857#define BT_MAX_KILL_MAX (0xFF)
1858
1859#define BT_DURATION_LIMIT_DEF   625
1860#define BT_DURATION_LIMIT_MAX   1250
1861#define BT_DURATION_LIMIT_MIN   625
1862
1863#define BT_ON_THRESHOLD_DEF     4
1864#define BT_ON_THRESHOLD_MAX     1000
1865#define BT_ON_THRESHOLD_MIN     1
1866
1867#define BT_FRAG_THRESHOLD_DEF   0
1868#define BT_FRAG_THRESHOLD_MAX   0
1869#define BT_FRAG_THRESHOLD_MIN   0
1870
1871#define BT_AGG_THRESHOLD_DEF    1200
1872#define BT_AGG_THRESHOLD_MAX    8000
1873#define BT_AGG_THRESHOLD_MIN    400
1874
1875/*
1876 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1877 *
1878 * agn devices support hardware handshake with Bluetooth device on
1879 * same platform.  Bluetooth device alerts wireless device when it will Tx;
1880 * wireless device can delay or kill its own Tx to accommodate.
1881 */
1882struct iwl_bt_cmd {
1883        u8 flags;
1884        u8 lead_time;
1885        u8 max_kill;
1886        u8 reserved;
1887        __le32 kill_ack_mask;
1888        __le32 kill_cts_mask;
1889} __packed;
1890
1891#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION       BIT(0)
1892
1893#define IWLAGN_BT_FLAG_COEX_MODE_MASK           (BIT(3)|BIT(4)|BIT(5))
1894#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT          3
1895#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED       0
1896#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W      1
1897#define IWLAGN_BT_FLAG_COEX_MODE_3W             2
1898#define IWLAGN_BT_FLAG_COEX_MODE_4W             3
1899
1900#define IWLAGN_BT_FLAG_UCODE_DEFAULT            BIT(6)
1901/* Disable Sync PSPoll on SCO/eSCO */
1902#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE        BIT(7)
1903
1904#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD        -75 /* dBm */
1905#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD        -65 /* dBm */
1906
1907#define IWLAGN_BT_PRIO_BOOST_MAX        0xFF
1908#define IWLAGN_BT_PRIO_BOOST_MIN        0x00
1909#define IWLAGN_BT_PRIO_BOOST_DEFAULT    0xF0
1910#define IWLAGN_BT_PRIO_BOOST_DEFAULT32  0xF0F0F0F0
1911
1912#define IWLAGN_BT_MAX_KILL_DEFAULT      5
1913
1914#define IWLAGN_BT3_T7_DEFAULT           1
1915
1916enum iwl_bt_kill_idx {
1917        IWL_BT_KILL_DEFAULT = 0,
1918        IWL_BT_KILL_OVERRIDE = 1,
1919        IWL_BT_KILL_REDUCE = 2,
1920};
1921
1922#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1923#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1924#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1925#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE      cpu_to_le32(0)
1926
1927#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT  2
1928
1929#define IWLAGN_BT3_T2_DEFAULT           0xc
1930
1931#define IWLAGN_BT_VALID_ENABLE_FLAGS    cpu_to_le16(BIT(0))
1932#define IWLAGN_BT_VALID_BOOST           cpu_to_le16(BIT(1))
1933#define IWLAGN_BT_VALID_MAX_KILL        cpu_to_le16(BIT(2))
1934#define IWLAGN_BT_VALID_3W_TIMERS       cpu_to_le16(BIT(3))
1935#define IWLAGN_BT_VALID_KILL_ACK_MASK   cpu_to_le16(BIT(4))
1936#define IWLAGN_BT_VALID_KILL_CTS_MASK   cpu_to_le16(BIT(5))
1937#define IWLAGN_BT_VALID_REDUCED_TX_PWR  cpu_to_le16(BIT(6))
1938#define IWLAGN_BT_VALID_3W_LUT          cpu_to_le16(BIT(7))
1939
1940#define IWLAGN_BT_ALL_VALID_MSK         (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1941                                        IWLAGN_BT_VALID_BOOST | \
1942                                        IWLAGN_BT_VALID_MAX_KILL | \
1943                                        IWLAGN_BT_VALID_3W_TIMERS | \
1944                                        IWLAGN_BT_VALID_KILL_ACK_MASK | \
1945                                        IWLAGN_BT_VALID_KILL_CTS_MASK | \
1946                                        IWLAGN_BT_VALID_REDUCED_TX_PWR | \
1947                                        IWLAGN_BT_VALID_3W_LUT)
1948
1949#define IWLAGN_BT_REDUCED_TX_PWR        BIT(0)
1950
1951#define IWLAGN_BT_DECISION_LUT_SIZE     12
1952
1953struct iwl_basic_bt_cmd {
1954        u8 flags;
1955        u8 ledtime; /* unused */
1956        u8 max_kill;
1957        u8 bt3_timer_t7_value;
1958        __le32 kill_ack_mask;
1959        __le32 kill_cts_mask;
1960        u8 bt3_prio_sample_time;
1961        u8 bt3_timer_t2_value;
1962        __le16 bt4_reaction_time; /* unused */
1963        __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];
1964        /*
1965         * bit 0: use reduced tx power for control frame
1966         * bit 1 - 7: reserved
1967         */
1968        u8 reduce_txpower;
1969        u8 reserved;
1970        __le16 valid;
1971};
1972
1973struct iwl_bt_cmd_v1 {
1974        struct iwl_basic_bt_cmd basic;
1975        u8 prio_boost;
1976        /*
1977         * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1978         * if configure the following patterns
1979         */
1980        u8 tx_prio_boost;       /* SW boost of WiFi tx priority */
1981        __le16 rx_prio_boost;   /* SW boost of WiFi rx priority */
1982};
1983
1984struct iwl_bt_cmd_v2 {
1985        struct iwl_basic_bt_cmd basic;
1986        __le32 prio_boost;
1987        /*
1988         * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1989         * if configure the following patterns
1990         */
1991        u8 reserved;
1992        u8 tx_prio_boost;       /* SW boost of WiFi tx priority */
1993        __le16 rx_prio_boost;   /* SW boost of WiFi rx priority */
1994};
1995
1996#define IWLAGN_BT_SCO_ACTIVE    cpu_to_le32(BIT(0))
1997
1998struct iwlagn_bt_sco_cmd {
1999        __le32 flags;
2000};
2001
2002/******************************************************************************
2003 * (6)
2004 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2005 *
2006 *****************************************************************************/
2007
2008/*
2009 * Spectrum Management
2010 */
2011#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK         | \
2012                                 RXON_FILTER_CTL2HOST_MSK        | \
2013                                 RXON_FILTER_ACCEPT_GRP_MSK      | \
2014                                 RXON_FILTER_DIS_DECRYPT_MSK     | \
2015                                 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2016                                 RXON_FILTER_ASSOC_MSK           | \
2017                                 RXON_FILTER_BCON_AWARE_MSK)
2018
2019struct iwl_measure_channel {
2020        __le32 duration;        /* measurement duration in extended beacon
2021                                 * format */
2022        u8 channel;             /* channel to measure */
2023        u8 type;                /* see enum iwl_measure_type */
2024        __le16 reserved;
2025} __packed;
2026
2027/*
2028 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2029 */
2030struct iwl_spectrum_cmd {
2031        __le16 len;             /* number of bytes starting from token */
2032        u8 token;               /* token id */
2033        u8 id;                  /* measurement id -- 0 or 1 */
2034        u8 origin;              /* 0 = TGh, 1 = other, 2 = TGk */
2035        u8 periodic;            /* 1 = periodic */
2036        __le16 path_loss_timeout;
2037        __le32 start_time;      /* start time in extended beacon format */
2038        __le32 reserved2;
2039        __le32 flags;           /* rxon flags */
2040        __le32 filter_flags;    /* rxon filter flags */
2041        __le16 channel_count;   /* minimum 1, maximum 10 */
2042        __le16 reserved3;
2043        struct iwl_measure_channel channels[10];
2044} __packed;
2045
2046/*
2047 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2048 */
2049struct iwl_spectrum_resp {
2050        u8 token;
2051        u8 id;                  /* id of the prior command replaced, or 0xff */
2052        __le16 status;          /* 0 - command will be handled
2053                                 * 1 - cannot handle (conflicts with another
2054                                 *     measurement) */
2055} __packed;
2056
2057enum iwl_measurement_state {
2058        IWL_MEASUREMENT_START = 0,
2059        IWL_MEASUREMENT_STOP = 1,
2060};
2061
2062enum iwl_measurement_status {
2063        IWL_MEASUREMENT_OK = 0,
2064        IWL_MEASUREMENT_CONCURRENT = 1,
2065        IWL_MEASUREMENT_CSA_CONFLICT = 2,
2066        IWL_MEASUREMENT_TGH_CONFLICT = 3,
2067        /* 4-5 reserved */
2068        IWL_MEASUREMENT_STOPPED = 6,
2069        IWL_MEASUREMENT_TIMEOUT = 7,
2070        IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2071};
2072
2073#define NUM_ELEMENTS_IN_HISTOGRAM 8
2074
2075struct iwl_measurement_histogram {
2076        __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2077        __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM];  /* in 1usec counts */
2078} __packed;
2079
2080/* clear channel availability counters */
2081struct iwl_measurement_cca_counters {
2082        __le32 ofdm;
2083        __le32 cck;
2084} __packed;
2085
2086enum iwl_measure_type {
2087        IWL_MEASURE_BASIC = (1 << 0),
2088        IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2089        IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2090        IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2091        IWL_MEASURE_FRAME = (1 << 4),
2092        /* bits 5:6 are reserved */
2093        IWL_MEASURE_IDLE = (1 << 7),
2094};
2095
2096/*
2097 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2098 */
2099struct iwl_spectrum_notification {
2100        u8 id;                  /* measurement id -- 0 or 1 */
2101        u8 token;
2102        u8 channel_index;       /* index in measurement channel list */
2103        u8 state;               /* 0 - start, 1 - stop */
2104        __le32 start_time;      /* lower 32-bits of TSF */
2105        u8 band;                /* 0 - 5.2GHz, 1 - 2.4GHz */
2106        u8 channel;
2107        u8 type;                /* see enum iwl_measurement_type */
2108        u8 reserved1;
2109        /* NOTE:  cca_ofdm, cca_cck, basic_type, and histogram are only only
2110         * valid if applicable for measurement type requested. */
2111        __le32 cca_ofdm;        /* cca fraction time in 40Mhz clock periods */
2112        __le32 cca_cck;         /* cca fraction time in 44Mhz clock periods */
2113        __le32 cca_time;        /* channel load time in usecs */
2114        u8 basic_type;          /* 0 - bss, 1 - ofdm preamble, 2 -
2115                                 * unidentified */
2116        u8 reserved2[3];
2117        struct iwl_measurement_histogram histogram;
2118        __le32 stop_time;       /* lower 32-bits of TSF */
2119        __le32 status;          /* see iwl_measurement_status */
2120} __packed;
2121
2122/******************************************************************************
2123 * (7)
2124 * Power Management Commands, Responses, Notifications:
2125 *
2126 *****************************************************************************/
2127
2128/**
2129 * struct iwl_powertable_cmd - Power Table Command
2130 * @flags: See below:
2131 *
2132 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2133 *
2134 * PM allow:
2135 *   bit 0 - '0' Driver not allow power management
2136 *           '1' Driver allow PM (use rest of parameters)
2137 *
2138 * uCode send sleep notifications:
2139 *   bit 1 - '0' Don't send sleep notification
2140 *           '1' send sleep notification (SEND_PM_NOTIFICATION)
2141 *
2142 * Sleep over DTIM
2143 *   bit 2 - '0' PM have to walk up every DTIM
2144 *           '1' PM could sleep over DTIM till listen Interval.
2145 *
2146 * PCI power managed
2147 *   bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2148 *           '1' !(PCI_CFG_LINK_CTRL & 0x1)
2149 *
2150 * Fast PD
2151 *   bit 4 - '1' Put radio to sleep when receiving frame for others
2152 *
2153 * Force sleep Modes
2154 *   bit 31/30- '00' use both mac/xtal sleeps
2155 *              '01' force Mac sleep
2156 *              '10' force xtal sleep
2157 *              '11' Illegal set
2158 *
2159 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2160 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2161 * for every DTIM.
2162 */
2163#define IWL_POWER_VEC_SIZE 5
2164
2165#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK        cpu_to_le16(BIT(0))
2166#define IWL_POWER_POWER_SAVE_ENA_MSK            cpu_to_le16(BIT(0))
2167#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK      cpu_to_le16(BIT(1))
2168#define IWL_POWER_SLEEP_OVER_DTIM_MSK           cpu_to_le16(BIT(2))
2169#define IWL_POWER_PCI_PM_MSK                    cpu_to_le16(BIT(3))
2170#define IWL_POWER_FAST_PD                       cpu_to_le16(BIT(4))
2171#define IWL_POWER_BEACON_FILTERING              cpu_to_le16(BIT(5))
2172#define IWL_POWER_SHADOW_REG_ENA                cpu_to_le16(BIT(6))
2173#define IWL_POWER_CT_KILL_SET                   cpu_to_le16(BIT(7))
2174#define IWL_POWER_BT_SCO_ENA                    cpu_to_le16(BIT(8))
2175#define IWL_POWER_ADVANCE_PM_ENA_MSK            cpu_to_le16(BIT(9))
2176
2177struct iwl_powertable_cmd {
2178        __le16 flags;
2179        u8 keep_alive_seconds;
2180        u8 debug_flags;
2181        __le32 rx_data_timeout;
2182        __le32 tx_data_timeout;
2183        __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2184        __le32 keep_alive_beacons;
2185} __packed;
2186
2187/*
2188 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2189 * all devices identical.
2190 */
2191struct iwl_sleep_notification {
2192        u8 pm_sleep_mode;
2193        u8 pm_wakeup_src;
2194        __le16 reserved;
2195        __le32 sleep_time;
2196        __le32 tsf_low;
2197        __le32 bcon_timer;
2198} __packed;
2199
2200/* Sleep states.  all devices identical. */
2201enum {
2202        IWL_PM_NO_SLEEP = 0,
2203        IWL_PM_SLP_MAC = 1,
2204        IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2205        IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2206        IWL_PM_SLP_PHY = 4,
2207        IWL_PM_SLP_REPENT = 5,
2208        IWL_PM_WAKEUP_BY_TIMER = 6,
2209        IWL_PM_WAKEUP_BY_DRIVER = 7,
2210        IWL_PM_WAKEUP_BY_RFKILL = 8,
2211        /* 3 reserved */
2212        IWL_PM_NUM_OF_MODES = 12,
2213};
2214
2215/*
2216 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2217 */
2218#define CARD_STATE_CMD_DISABLE 0x00     /* Put card to sleep */
2219#define CARD_STATE_CMD_ENABLE  0x01     /* Wake up card */
2220#define CARD_STATE_CMD_HALT    0x02     /* Power down permanently */
2221struct iwl_card_state_cmd {
2222        __le32 status;          /* CARD_STATE_CMD_* request new power state */
2223} __packed;
2224
2225/*
2226 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2227 */
2228struct iwl_card_state_notif {
2229        __le32 flags;
2230} __packed;
2231
2232#define HW_CARD_DISABLED   0x01
2233#define SW_CARD_DISABLED   0x02
2234#define CT_CARD_DISABLED   0x04
2235#define RXON_CARD_DISABLED 0x10
2236
2237struct iwl_ct_kill_config {
2238        __le32   reserved;
2239        __le32   critical_temperature_M;
2240        __le32   critical_temperature_R;
2241}  __packed;
2242
2243/* 1000, and 6x00 */
2244struct iwl_ct_kill_throttling_config {
2245        __le32   critical_temperature_exit;
2246        __le32   reserved;
2247        __le32   critical_temperature_enter;
2248}  __packed;
2249
2250/******************************************************************************
2251 * (8)
2252 * Scan Commands, Responses, Notifications:
2253 *
2254 *****************************************************************************/
2255
2256#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2257#define SCAN_CHANNEL_TYPE_ACTIVE  cpu_to_le32(1)
2258
2259/**
2260 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2261 *
2262 * One for each channel in the scan list.
2263 * Each channel can independently select:
2264 * 1)  SSID for directed active scans
2265 * 2)  Txpower setting (for rate specified within Tx command)
2266 * 3)  How long to stay on-channel (behavior may be modified by quiet_time,
2267 *     quiet_plcp_th, good_CRC_th)
2268 *
2269 * To avoid uCode errors, make sure the following are true (see comments
2270 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2271 * 1)  If using passive_dwell (i.e. passive_dwell != 0):
2272 *     active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2273 * 2)  quiet_time <= active_dwell
2274 * 3)  If restricting off-channel time (i.e. max_out_time !=0):
2275 *     passive_dwell < max_out_time
2276 *     active_dwell < max_out_time
2277 */
2278
2279struct iwl_scan_channel {
2280        /*
2281         * type is defined as:
2282         * 0:0 1 = active, 0 = passive
2283         * 1:20 SSID direct bit map; if a bit is set, then corresponding
2284         *     SSID IE is transmitted in probe request.
2285         * 21:31 reserved
2286         */
2287        __le32 type;
2288        __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2289        u8 tx_gain;             /* gain for analog radio */
2290        u8 dsp_atten;           /* gain for DSP */
2291        __le16 active_dwell;    /* in 1024-uSec TU (time units), typ 5-50 */
2292        __le16 passive_dwell;   /* in 1024-uSec TU (time units), typ 20-500 */
2293} __packed;
2294
2295/* set number of direct probes __le32 type */
2296#define IWL_SCAN_PROBE_MASK(n)  cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2297
2298/**
2299 * struct iwl_ssid_ie - directed scan network information element
2300 *
2301 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2302 * selected by "type" bit field in struct iwl_scan_channel;
2303 * each channel may select different ssids from among the 20 entries.
2304 * SSID IEs get transmitted in reverse order of entry.
2305 */
2306struct iwl_ssid_ie {
2307        u8 id;
2308        u8 len;
2309        u8 ssid[32];
2310} __packed;
2311
2312#define PROBE_OPTION_MAX                20
2313#define TX_CMD_LIFE_TIME_INFINITE       cpu_to_le32(0xFFFFFFFF)
2314#define IWL_GOOD_CRC_TH_DISABLED        0
2315#define IWL_GOOD_CRC_TH_DEFAULT         cpu_to_le16(1)
2316#define IWL_GOOD_CRC_TH_NEVER           cpu_to_le16(0xffff)
2317#define IWL_MAX_CMD_SIZE 4096
2318
2319/*
2320 * REPLY_SCAN_CMD = 0x80 (command)
2321 *
2322 * The hardware scan command is very powerful; the driver can set it up to
2323 * maintain (relatively) normal network traffic while doing a scan in the
2324 * background.  The max_out_time and suspend_time control the ratio of how
2325 * long the device stays on an associated network channel ("service channel")
2326 * vs. how long it's away from the service channel, i.e. tuned to other channels
2327 * for scanning.
2328 *
2329 * max_out_time is the max time off-channel (in usec), and suspend_time
2330 * is how long (in "extended beacon" format) that the scan is "suspended"
2331 * after returning to the service channel.  That is, suspend_time is the
2332 * time that we stay on the service channel, doing normal work, between
2333 * scan segments.  The driver may set these parameters differently to support
2334 * scanning when associated vs. not associated, and light vs. heavy traffic
2335 * loads when associated.
2336 *
2337 * After receiving this command, the device's scan engine does the following;
2338 *
2339 * 1)  Sends SCAN_START notification to driver
2340 * 2)  Checks to see if it has time to do scan for one channel
2341 * 3)  Sends NULL packet, with power-save (PS) bit set to 1,
2342 *     to tell AP that we're going off-channel
2343 * 4)  Tunes to first channel in scan list, does active or passive scan
2344 * 5)  Sends SCAN_RESULT notification to driver
2345 * 6)  Checks to see if it has time to do scan on *next* channel in list
2346 * 7)  Repeats 4-6 until it no longer has time to scan the next channel
2347 *     before max_out_time expires
2348 * 8)  Returns to service channel
2349 * 9)  Sends NULL packet with PS=0 to tell AP that we're back
2350 * 10) Stays on service channel until suspend_time expires
2351 * 11) Repeats entire process 2-10 until list is complete
2352 * 12) Sends SCAN_COMPLETE notification
2353 *
2354 * For fast, efficient scans, the scan command also has support for staying on
2355 * a channel for just a short time, if doing active scanning and getting no
2356 * responses to the transmitted probe request.  This time is controlled by
2357 * quiet_time, and the number of received packets below which a channel is
2358 * considered "quiet" is controlled by quiet_plcp_threshold.
2359 *
2360 * For active scanning on channels that have regulatory restrictions against
2361 * blindly transmitting, the scan can listen before transmitting, to make sure
2362 * that there is already legitimate activity on the channel.  If enough
2363 * packets are cleanly received on the channel (controlled by good_CRC_th,
2364 * typical value 1), the scan engine starts transmitting probe requests.
2365 *
2366 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2367 *
2368 * To avoid uCode errors, see timing restrictions described under
2369 * struct iwl_scan_channel.
2370 */
2371
2372enum iwl_scan_flags {
2373        /* BIT(0) currently unused */
2374        IWL_SCAN_FLAGS_ACTION_FRAME_TX  = BIT(1),
2375        /* bits 2-7 reserved */
2376};
2377
2378struct iwl_scan_cmd {
2379        __le16 len;
2380        u8 scan_flags;          /* scan flags: see enum iwl_scan_flags */
2381        u8 channel_count;       /* # channels in channel list */
2382        __le16 quiet_time;      /* dwell only this # millisecs on quiet channel
2383                                 * (only for active scan) */
2384        __le16 quiet_plcp_th;   /* quiet chnl is < this # pkts (typ. 1) */
2385        __le16 good_CRC_th;     /* passive -> active promotion threshold */
2386        __le16 rx_chain;        /* RXON_RX_CHAIN_* */
2387        __le32 max_out_time;    /* max usec to be away from associated (service)
2388                                 * channel */
2389        __le32 suspend_time;    /* pause scan this long (in "extended beacon
2390                                 * format") when returning to service chnl:
2391                                 */
2392        __le32 flags;           /* RXON_FLG_* */
2393        __le32 filter_flags;    /* RXON_FILTER_* */
2394
2395        /* For active scans (set to all-0s for passive scans).
2396         * Does not include payload.  Must specify Tx rate; no rate scaling. */
2397        struct iwl_tx_cmd tx_cmd;
2398
2399        /* For directed active scans (set to all-0s otherwise) */
2400        struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2401
2402        /*
2403         * Probe request frame, followed by channel list.
2404         *
2405         * Size of probe request frame is specified by byte count in tx_cmd.
2406         * Channel list follows immediately after probe request frame.
2407         * Number of channels in list is specified by channel_count.
2408         * Each channel in list is of type:
2409         *
2410         * struct iwl_scan_channel channels[0];
2411         *
2412         * NOTE:  Only one band of channels can be scanned per pass.  You
2413         * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2414         * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2415         * before requesting another scan.
2416         */
2417        u8 data[0];
2418} __packed;
2419
2420/* Can abort will notify by complete notification with abort status. */
2421#define CAN_ABORT_STATUS        cpu_to_le32(0x1)
2422/* complete notification statuses */
2423#define ABORT_STATUS            0x2
2424
2425/*
2426 * REPLY_SCAN_CMD = 0x80 (response)
2427 */
2428struct iwl_scanreq_notification {
2429        __le32 status;          /* 1: okay, 2: cannot fulfill request */
2430} __packed;
2431
2432/*
2433 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2434 */
2435struct iwl_scanstart_notification {
2436        __le32 tsf_low;
2437        __le32 tsf_high;
2438        __le32 beacon_timer;
2439        u8 channel;
2440        u8 band;
2441        u8 reserved[2];
2442        __le32 status;
2443} __packed;
2444
2445#define  SCAN_OWNER_STATUS 0x1
2446#define  MEASURE_OWNER_STATUS 0x2
2447
2448#define IWL_PROBE_STATUS_OK             0
2449#define IWL_PROBE_STATUS_TX_FAILED      BIT(0)
2450/* error statuses combined with TX_FAILED */
2451#define IWL_PROBE_STATUS_FAIL_TTL       BIT(1)
2452#define IWL_PROBE_STATUS_FAIL_BT        BIT(2)
2453
2454#define NUMBER_OF_STATISTICS 1  /* first __le32 is good CRC */
2455/*
2456 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2457 */
2458struct iwl_scanresults_notification {
2459        u8 channel;
2460        u8 band;
2461        u8 probe_status;
2462        u8 num_probe_not_sent; /* not enough time to send */
2463        __le32 tsf_low;
2464        __le32 tsf_high;
2465        __le32 statistics[NUMBER_OF_STATISTICS];
2466} __packed;
2467
2468/*
2469 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2470 */
2471struct iwl_scancomplete_notification {
2472        u8 scanned_channels;
2473        u8 status;
2474        u8 bt_status;   /* BT On/Off status */
2475        u8 last_channel;
2476        __le32 tsf_low;
2477        __le32 tsf_high;
2478} __packed;
2479
2480
2481/******************************************************************************
2482 * (9)
2483 * IBSS/AP Commands and Notifications:
2484 *
2485 *****************************************************************************/
2486
2487enum iwl_ibss_manager {
2488        IWL_NOT_IBSS_MANAGER = 0,
2489        IWL_IBSS_MANAGER = 1,
2490};
2491
2492/*
2493 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2494 */
2495
2496struct iwlagn_beacon_notif {
2497        struct iwlagn_tx_resp beacon_notify_hdr;
2498        __le32 low_tsf;
2499        __le32 high_tsf;
2500        __le32 ibss_mgr_status;
2501} __packed;
2502
2503/*
2504 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2505 */
2506
2507struct iwl_tx_beacon_cmd {
2508        struct iwl_tx_cmd tx;
2509        __le16 tim_idx;
2510        u8 tim_size;
2511        u8 reserved1;
2512        struct ieee80211_hdr frame[0];  /* beacon frame */
2513} __packed;
2514
2515/******************************************************************************
2516 * (10)
2517 * Statistics Commands and Notifications:
2518 *
2519 *****************************************************************************/
2520
2521#define IWL_TEMP_CONVERT 260
2522
2523#define SUP_RATE_11A_MAX_NUM_CHANNELS  8
2524#define SUP_RATE_11B_MAX_NUM_CHANNELS  4
2525#define SUP_RATE_11G_MAX_NUM_CHANNELS  12
2526
2527/* Used for passing to driver number of successes and failures per rate */
2528struct rate_histogram {
2529        union {
2530                __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2531                __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2532                __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2533        } success;
2534        union {
2535                __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2536                __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2537                __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2538        } failed;
2539} __packed;
2540
2541/* statistics command response */
2542
2543struct statistics_dbg {
2544        __le32 burst_check;
2545        __le32 burst_count;
2546        __le32 wait_for_silence_timeout_cnt;
2547        __le32 reserved[3];
2548} __packed;
2549
2550struct statistics_rx_phy {
2551        __le32 ina_cnt;
2552        __le32 fina_cnt;
2553        __le32 plcp_err;
2554        __le32 crc32_err;
2555        __le32 overrun_err;
2556        __le32 early_overrun_err;
2557        __le32 crc32_good;
2558        __le32 false_alarm_cnt;
2559        __le32 fina_sync_err_cnt;
2560        __le32 sfd_timeout;
2561        __le32 fina_timeout;
2562        __le32 unresponded_rts;
2563        __le32 rxe_frame_limit_overrun;
2564        __le32 sent_ack_cnt;
2565        __le32 sent_cts_cnt;
2566        __le32 sent_ba_rsp_cnt;
2567        __le32 dsp_self_kill;
2568        __le32 mh_format_err;
2569        __le32 re_acq_main_rssi_sum;
2570        __le32 reserved3;
2571} __packed;
2572
2573struct statistics_rx_ht_phy {
2574        __le32 plcp_err;
2575        __le32 overrun_err;
2576        __le32 early_overrun_err;
2577        __le32 crc32_good;
2578        __le32 crc32_err;
2579        __le32 mh_format_err;
2580        __le32 agg_crc32_good;
2581        __le32 agg_mpdu_cnt;
2582        __le32 agg_cnt;
2583        __le32 unsupport_mcs;
2584} __packed;
2585
2586#define INTERFERENCE_DATA_AVAILABLE      cpu_to_le32(1)
2587
2588struct statistics_rx_non_phy {
2589        __le32 bogus_cts;       /* CTS received when not expecting CTS */
2590        __le32 bogus_ack;       /* ACK received when not expecting ACK */
2591        __le32 non_bssid_frames;        /* number of frames with BSSID that
2592                                         * doesn't belong to the STA BSSID */
2593        __le32 filtered_frames; /* count frames that were dumped in the
2594                                 * filtering process */
2595        __le32 non_channel_beacons;     /* beacons with our bss id but not on
2596                                         * our serving channel */
2597        __le32 channel_beacons; /* beacons with our bss id and in our
2598                                 * serving channel */
2599        __le32 num_missed_bcon; /* number of missed beacons */
2600        __le32 adc_rx_saturation_time;  /* count in 0.8us units the time the
2601                                         * ADC was in saturation */
2602        __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2603                                          * for INA */
2604        __le32 beacon_silence_rssi_a;   /* RSSI silence after beacon frame */
2605        __le32 beacon_silence_rssi_b;   /* RSSI silence after beacon frame */
2606        __le32 beacon_silence_rssi_c;   /* RSSI silence after beacon frame */
2607        __le32 interference_data_flag;  /* flag for interference data
2608                                         * availability. 1 when data is
2609                                         * available. */
2610        __le32 channel_load;            /* counts RX Enable time in uSec */
2611        __le32 dsp_false_alarms;        /* DSP false alarm (both OFDM
2612                                         * and CCK) counter */
2613        __le32 beacon_rssi_a;
2614        __le32 beacon_rssi_b;
2615        __le32 beacon_rssi_c;
2616        __le32 beacon_energy_a;
2617        __le32 beacon_energy_b;
2618        __le32 beacon_energy_c;
2619} __packed;
2620
2621struct statistics_rx_non_phy_bt {
2622        struct statistics_rx_non_phy common;
2623        /* additional stats for bt */
2624        __le32 num_bt_kills;
2625        __le32 reserved[2];
2626} __packed;
2627
2628struct statistics_rx {
2629        struct statistics_rx_phy ofdm;
2630        struct statistics_rx_phy cck;
2631        struct statistics_rx_non_phy general;
2632        struct statistics_rx_ht_phy ofdm_ht;
2633} __packed;
2634
2635struct statistics_rx_bt {
2636        struct statistics_rx_phy ofdm;
2637        struct statistics_rx_phy cck;
2638        struct statistics_rx_non_phy_bt general;
2639        struct statistics_rx_ht_phy ofdm_ht;
2640} __packed;
2641
2642/**
2643 * struct statistics_tx_power - current tx power
2644 *
2645 * @ant_a: current tx power on chain a in 1/2 dB step
2646 * @ant_b: current tx power on chain b in 1/2 dB step
2647 * @ant_c: current tx power on chain c in 1/2 dB step
2648 */
2649struct statistics_tx_power {
2650        u8 ant_a;
2651        u8 ant_b;
2652        u8 ant_c;
2653        u8 reserved;
2654} __packed;
2655
2656struct statistics_tx_non_phy_agg {
2657        __le32 ba_timeout;
2658        __le32 ba_reschedule_frames;
2659        __le32 scd_query_agg_frame_cnt;
2660        __le32 scd_query_no_agg;
2661        __le32 scd_query_agg;
2662        __le32 scd_query_mismatch;
2663        __le32 frame_not_ready;
2664        __le32 underrun;
2665        __le32 bt_prio_kill;
2666        __le32 rx_ba_rsp_cnt;
2667} __packed;
2668
2669struct statistics_tx {
2670        __le32 preamble_cnt;
2671        __le32 rx_detected_cnt;
2672        __le32 bt_prio_defer_cnt;
2673        __le32 bt_prio_kill_cnt;
2674        __le32 few_bytes_cnt;
2675        __le32 cts_timeout;
2676        __le32 ack_timeout;
2677        __le32 expected_ack_cnt;
2678        __le32 actual_ack_cnt;
2679        __le32 dump_msdu_cnt;
2680        __le32 burst_abort_next_frame_mismatch_cnt;
2681        __le32 burst_abort_missing_next_frame_cnt;
2682        __le32 cts_timeout_collision;
2683        __le32 ack_or_ba_timeout_collision;
2684        struct statistics_tx_non_phy_agg agg;
2685        /*
2686         * "tx_power" are optional parameters provided by uCode,
2687         * 6000 series is the only device provide the information,
2688         * Those are reserved fields for all the other devices
2689         */
2690        struct statistics_tx_power tx_power;
2691        __le32 reserved1;
2692} __packed;
2693
2694
2695struct statistics_div {
2696        __le32 tx_on_a;
2697        __le32 tx_on_b;
2698        __le32 exec_time;
2699        __le32 probe_time;
2700        __le32 reserved1;
2701        __le32 reserved2;
2702} __packed;
2703
2704struct statistics_general_common {
2705        __le32 temperature;   /* radio temperature */
2706        __le32 temperature_m; /* radio voltage */
2707        struct statistics_dbg dbg;
2708        __le32 sleep_time;
2709        __le32 slots_out;
2710        __le32 slots_idle;
2711        __le32 ttl_timestamp;
2712        struct statistics_div div;
2713        __le32 rx_enable_counter;
2714        /*
2715         * num_of_sos_states:
2716         *  count the number of times we have to re-tune
2717         *  in order to get out of bad PHY status
2718         */
2719        __le32 num_of_sos_states;
2720} __packed;
2721
2722struct statistics_bt_activity {
2723        /* Tx statistics */
2724        __le32 hi_priority_tx_req_cnt;
2725        __le32 hi_priority_tx_denied_cnt;
2726        __le32 lo_priority_tx_req_cnt;
2727        __le32 lo_priority_tx_denied_cnt;
2728        /* Rx statistics */
2729        __le32 hi_priority_rx_req_cnt;
2730        __le32 hi_priority_rx_denied_cnt;
2731        __le32 lo_priority_rx_req_cnt;
2732        __le32 lo_priority_rx_denied_cnt;
2733} __packed;
2734
2735struct statistics_general {
2736        struct statistics_general_common common;
2737        __le32 reserved2;
2738        __le32 reserved3;
2739} __packed;
2740
2741struct statistics_general_bt {
2742        struct statistics_general_common common;
2743        struct statistics_bt_activity activity;
2744        __le32 reserved2;
2745        __le32 reserved3;
2746} __packed;
2747
2748#define UCODE_STATISTICS_CLEAR_MSK              (0x1 << 0)
2749#define UCODE_STATISTICS_FREQUENCY_MSK          (0x1 << 1)
2750#define UCODE_STATISTICS_NARROW_BAND_MSK        (0x1 << 2)
2751
2752/*
2753 * REPLY_STATISTICS_CMD = 0x9c,
2754 * all devices identical.
2755 *
2756 * This command triggers an immediate response containing uCode statistics.
2757 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2758 *
2759 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2760 * internal copy of the statistics (counters) after issuing the response.
2761 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2762 *
2763 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2764 * STATISTICS_NOTIFICATIONs after received beacons (see below).  This flag
2765 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2766 */
2767#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1)     /* see above */
2768#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2769struct iwl_statistics_cmd {
2770        __le32 configuration_flags;     /* IWL_STATS_CONF_* */
2771} __packed;
2772
2773/*
2774 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2775 *
2776 * By default, uCode issues this notification after receiving a beacon
2777 * while associated.  To disable this behavior, set DISABLE_NOTIF flag in the
2778 * REPLY_STATISTICS_CMD 0x9c, above.
2779 *
2780 * Statistics counters continue to increment beacon after beacon, but are
2781 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2782 * 0x9c with CLEAR_STATS bit set (see above).
2783 *
2784 * uCode also issues this notification during scans.  uCode clears statistics
2785 * appropriately so that each notification contains statistics for only the
2786 * one channel that has just been scanned.
2787 */
2788#define STATISTICS_REPLY_FLG_BAND_24G_MSK         cpu_to_le32(0x2)
2789#define STATISTICS_REPLY_FLG_HT40_MODE_MSK        cpu_to_le32(0x8)
2790
2791struct iwl_notif_statistics {
2792        __le32 flag;
2793        struct statistics_rx rx;
2794        struct statistics_tx tx;
2795        struct statistics_general general;
2796} __packed;
2797
2798struct iwl_bt_notif_statistics {
2799        __le32 flag;
2800        struct statistics_rx_bt rx;
2801        struct statistics_tx tx;
2802        struct statistics_general_bt general;
2803} __packed;
2804
2805/*
2806 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2807 *
2808 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2809 * in regardless of how many missed beacons, which mean when driver receive the
2810 * notification, inside the command, it can find all the beacons information
2811 * which include number of total missed beacons, number of consecutive missed
2812 * beacons, number of beacons received and number of beacons expected to
2813 * receive.
2814 *
2815 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2816 * in order to bring the radio/PHY back to working state; which has no relation
2817 * to when driver will perform sensitivity calibration.
2818 *
2819 * Driver should set it own missed_beacon_threshold to decide when to perform
2820 * sensitivity calibration based on number of consecutive missed beacons in
2821 * order to improve overall performance, especially in noisy environment.
2822 *
2823 */
2824
2825#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2826#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2827#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2828
2829struct iwl_missed_beacon_notif {
2830        __le32 consecutive_missed_beacons;
2831        __le32 total_missed_becons;
2832        __le32 num_expected_beacons;
2833        __le32 num_recvd_beacons;
2834} __packed;
2835
2836
2837/******************************************************************************
2838 * (11)
2839 * Rx Calibration Commands:
2840 *
2841 * With the uCode used for open source drivers, most Tx calibration (except
2842 * for Tx Power) and most Rx calibration is done by uCode during the
2843 * "initialize" phase of uCode boot.  Driver must calibrate only:
2844 *
2845 * 1)  Tx power (depends on temperature), described elsewhere
2846 * 2)  Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2847 * 3)  Receiver sensitivity (to optimize signal detection)
2848 *
2849 *****************************************************************************/
2850
2851/**
2852 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2853 *
2854 * This command sets up the Rx signal detector for a sensitivity level that
2855 * is high enough to lock onto all signals within the associated network,
2856 * but low enough to ignore signals that are below a certain threshold, so as
2857 * not to have too many "false alarms".  False alarms are signals that the
2858 * Rx DSP tries to lock onto, but then discards after determining that they
2859 * are noise.
2860 *
2861 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2862 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2863 * time listening, not transmitting).  Driver must adjust sensitivity so that
2864 * the ratio of actual false alarms to actual Rx time falls within this range.
2865 *
2866 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2867 * received beacon.  These provide information to the driver to analyze the
2868 * sensitivity.  Don't analyze statistics that come in from scanning, or any
2869 * other non-associated-network source.  Pertinent statistics include:
2870 *
2871 * From "general" statistics (struct statistics_rx_non_phy):
2872 *
2873 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2874 *   Measure of energy of desired signal.  Used for establishing a level
2875 *   below which the device does not detect signals.
2876 *
2877 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2878 *   Measure of background noise in silent period after beacon.
2879 *
2880 * channel_load
2881 *   uSecs of actual Rx time during beacon period (varies according to
2882 *   how much time was spent transmitting).
2883 *
2884 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2885 *
2886 * false_alarm_cnt
2887 *   Signal locks abandoned early (before phy-level header).
2888 *
2889 * plcp_err
2890 *   Signal locks abandoned late (during phy-level header).
2891 *
2892 * NOTE:  Both false_alarm_cnt and plcp_err increment monotonically from
2893 *        beacon to beacon, i.e. each value is an accumulation of all errors
2894 *        before and including the latest beacon.  Values will wrap around to 0
2895 *        after counting up to 2^32 - 1.  Driver must differentiate vs.
2896 *        previous beacon's values to determine # false alarms in the current
2897 *        beacon period.
2898 *
2899 * Total number of false alarms = false_alarms + plcp_errs
2900 *
2901 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2902 * (notice that the start points for OFDM are at or close to settings for
2903 * maximum sensitivity):
2904 *
2905 *                                             START  /  MIN  /  MAX
2906 *   HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX          90   /   85  /  120
2907 *   HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX     170   /  170  /  210
2908 *   HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX         105   /  105  /  140
2909 *   HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX     220   /  220  /  270
2910 *
2911 *   If actual rate of OFDM false alarms (+ plcp_errors) is too high
2912 *   (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2913 *   by *adding* 1 to all 4 of the table entries above, up to the max for
2914 *   each entry.  Conversely, if false alarm rate is too low (less than 5
2915 *   for each 204.8 msecs listening), *subtract* 1 from each entry to
2916 *   increase sensitivity.
2917 *
2918 * For CCK sensitivity, keep track of the following:
2919 *
2920 *   1).  20-beacon history of maximum background noise, indicated by
2921 *        (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2922 *        3 receivers.  For any given beacon, the "silence reference" is
2923 *        the maximum of last 60 samples (20 beacons * 3 receivers).
2924 *
2925 *   2).  10-beacon history of strongest signal level, as indicated
2926 *        by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2927 *        i.e. the strength of the signal through the best receiver at the
2928 *        moment.  These measurements are "upside down", with lower values
2929 *        for stronger signals, so max energy will be *minimum* value.
2930 *
2931 *        Then for any given beacon, the driver must determine the *weakest*
2932 *        of the strongest signals; this is the minimum level that needs to be
2933 *        successfully detected, when using the best receiver at the moment.
2934 *        "Max cck energy" is the maximum (higher value means lower energy!)
2935 *        of the last 10 minima.  Once this is determined, driver must add
2936 *        a little margin by adding "6" to it.
2937 *
2938 *   3).  Number of consecutive beacon periods with too few false alarms.
2939 *        Reset this to 0 at the first beacon period that falls within the
2940 *        "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2941 *
2942 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2943 * (notice that the start points for CCK are at maximum sensitivity):
2944 *
2945 *                                             START  /  MIN  /  MAX
2946 *   HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX         125   /  125  /  200
2947 *   HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX     200   /  200  /  400
2948 *   HD_MIN_ENERGY_CCK_DET_INDEX                100   /    0  /  100
2949 *
2950 *   If actual rate of CCK false alarms (+ plcp_errors) is too high
2951 *   (greater than 50 for each 204.8 msecs listening), method for reducing
2952 *   sensitivity is:
2953 *
2954 *   1)  *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2955 *       up to max 400.
2956 *
2957 *   2)  If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2958 *       sensitivity has been reduced a significant amount; bring it up to
2959 *       a moderate 161.  Otherwise, *add* 3, up to max 200.
2960 *
2961 *   3)  a)  If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2962 *       sensitivity has been reduced only a moderate or small amount;
2963 *       *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2964 *       down to min 0.  Otherwise (if gain has been significantly reduced),
2965 *       don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2966 *
2967 *       b)  Save a snapshot of the "silence reference".
2968 *
2969 *   If actual rate of CCK false alarms (+ plcp_errors) is too low
2970 *   (less than 5 for each 204.8 msecs listening), method for increasing
2971 *   sensitivity is used only if:
2972 *
2973 *   1a)  Previous beacon did not have too many false alarms
2974 *   1b)  AND difference between previous "silence reference" and current
2975 *        "silence reference" (prev - current) is 2 or more,
2976 *   OR 2)  100 or more consecutive beacon periods have had rate of
2977 *          less than 5 false alarms per 204.8 milliseconds rx time.
2978 *
2979 *   Method for increasing sensitivity:
2980 *
2981 *   1)  *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2982 *       down to min 125.
2983 *
2984 *   2)  *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2985 *       down to min 200.
2986 *
2987 *   3)  *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2988 *
2989 *   If actual rate of CCK false alarms (+ plcp_errors) is within good range
2990 *   (between 5 and 50 for each 204.8 msecs listening):
2991 *
2992 *   1)  Save a snapshot of the silence reference.
2993 *
2994 *   2)  If previous beacon had too many CCK false alarms (+ plcp_errors),
2995 *       give some extra margin to energy threshold by *subtracting* 8
2996 *       from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2997 *
2998 *   For all cases (too few, too many, good range), make sure that the CCK
2999 *   detection threshold (energy) is below the energy level for robust
3000 *   detection over the past 10 beacon periods, the "Max cck energy".
3001 *   Lower values mean higher energy; this means making sure that the value
3002 *   in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3003 *
3004 */
3005
3006/*
3007 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
3008 */
3009#define HD_TABLE_SIZE  (11)     /* number of entries */
3010#define HD_MIN_ENERGY_CCK_DET_INDEX                 (0) /* table indexes */
3011#define HD_MIN_ENERGY_OFDM_DET_INDEX                (1)
3012#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX          (2)
3013#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX      (3)
3014#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX      (4)
3015#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX          (5)
3016#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX      (6)
3017#define HD_BARKER_CORR_TH_ADD_MIN_INDEX             (7)
3018#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX         (8)
3019#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX          (9)
3020#define HD_OFDM_ENERGY_TH_IN_INDEX                  (10)
3021
3022/*
3023 * Additional table entries in enhance SENSITIVITY_CMD
3024 */
3025#define HD_INA_NON_SQUARE_DET_OFDM_INDEX                (11)
3026#define HD_INA_NON_SQUARE_DET_CCK_INDEX                 (12)
3027#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX           (13)
3028#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX          (14)
3029#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX      (15)
3030#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX              (16)
3031#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX          (17)
3032#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX           (18)
3033#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX       (19)
3034#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX               (20)
3035#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX           (21)
3036#define HD_RESERVED                                     (22)
3037
3038/* number of entries for enhanced tbl */
3039#define ENHANCE_HD_TABLE_SIZE  (23)
3040
3041/* number of additional entries for enhanced tbl */
3042#define ENHANCE_HD_TABLE_ENTRIES  (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3043
3044#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1              cpu_to_le16(0)
3045#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1               cpu_to_le16(0)
3046#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1         cpu_to_le16(0)
3047#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1        cpu_to_le16(668)
3048#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1    cpu_to_le16(4)
3049#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1            cpu_to_le16(486)
3050#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1        cpu_to_le16(37)
3051#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1         cpu_to_le16(853)
3052#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1     cpu_to_le16(4)
3053#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1             cpu_to_le16(476)
3054#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1         cpu_to_le16(99)
3055
3056#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2              cpu_to_le16(1)
3057#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2               cpu_to_le16(1)
3058#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2         cpu_to_le16(1)
3059#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2        cpu_to_le16(600)
3060#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2    cpu_to_le16(40)
3061#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2            cpu_to_le16(486)
3062#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2        cpu_to_le16(45)
3063#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2         cpu_to_le16(853)
3064#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2     cpu_to_le16(60)
3065#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2             cpu_to_le16(476)
3066#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2         cpu_to_le16(99)
3067
3068
3069/* Control field in struct iwl_sensitivity_cmd */
3070#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE   cpu_to_le16(0)
3071#define SENSITIVITY_CMD_CONTROL_WORK_TABLE      cpu_to_le16(1)
3072
3073/**
3074 * struct iwl_sensitivity_cmd
3075 * @control:  (1) updates working table, (0) updates default table
3076 * @table:  energy threshold values, use HD_* as index into table
3077 *
3078 * Always use "1" in "control" to update uCode's working table and DSP.
3079 */
3080struct iwl_sensitivity_cmd {
3081        __le16 control;                 /* always use "1" */
3082        __le16 table[HD_TABLE_SIZE];    /* use HD_* as index */
3083} __packed;
3084
3085/*
3086 *
3087 */
3088struct iwl_enhance_sensitivity_cmd {
3089        __le16 control;                 /* always use "1" */
3090        __le16 enhance_table[ENHANCE_HD_TABLE_SIZE];    /* use HD_* as index */
3091} __packed;
3092
3093
3094/**
3095 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3096 *
3097 * This command sets the relative gains of agn device's 3 radio receiver chains.
3098 *
3099 * After the first association, driver should accumulate signal and noise
3100 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3101 * beacons from the associated network (don't collect statistics that come
3102 * in from scanning, or any other non-network source).
3103 *
3104 * DISCONNECTED ANTENNA:
3105 *
3106 * Driver should determine which antennas are actually connected, by comparing
3107 * average beacon signal levels for the 3 Rx chains.  Accumulate (add) the
3108 * following values over 20 beacons, one accumulator for each of the chains
3109 * a/b/c, from struct statistics_rx_non_phy:
3110 *
3111 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3112 *
3113 * Find the strongest signal from among a/b/c.  Compare the other two to the
3114 * strongest.  If any signal is more than 15 dB (times 20, unless you
3115 * divide the accumulated values by 20) below the strongest, the driver
3116 * considers that antenna to be disconnected, and should not try to use that
3117 * antenna/chain for Rx or Tx.  If both A and B seem to be disconnected,
3118 * driver should declare the stronger one as connected, and attempt to use it
3119 * (A and B are the only 2 Tx chains!).
3120 *
3121 *
3122 * RX BALANCE:
3123 *
3124 * Driver should balance the 3 receivers (but just the ones that are connected
3125 * to antennas, see above) for gain, by comparing the average signal levels
3126 * detected during the silence after each beacon (background noise).
3127 * Accumulate (add) the following values over 20 beacons, one accumulator for
3128 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3129 *
3130 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3131 *
3132 * Find the weakest background noise level from among a/b/c.  This Rx chain
3133 * will be the reference, with 0 gain adjustment.  Attenuate other channels by
3134 * finding noise difference:
3135 *
3136 * (accum_noise[i] - accum_noise[reference]) / 30
3137 *
3138 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3139 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3140 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3141 * and set bit 2 to indicate "reduce gain".  The value for the reference
3142 * (weakest) chain should be "0".
3143 *
3144 * diff_gain_[abc] bit fields:
3145 *   2: (1) reduce gain, (0) increase gain
3146 * 1-0: amount of gain, units of 1.5 dB
3147 */
3148
3149/* Phy calibration command for series */
3150enum {
3151        IWL_PHY_CALIBRATE_DC_CMD                = 8,
3152        IWL_PHY_CALIBRATE_LO_CMD                = 9,
3153        IWL_PHY_CALIBRATE_TX_IQ_CMD             = 11,
3154        IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD       = 15,
3155        IWL_PHY_CALIBRATE_BASE_BAND_CMD         = 16,
3156        IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD        = 17,
3157        IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD       = 18,
3158};
3159
3160/* This enum defines the bitmap of various calibrations to enable in both
3161 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3162 */
3163enum iwl_ucode_calib_cfg {
3164        IWL_CALIB_CFG_RX_BB_IDX                 = BIT(0),
3165        IWL_CALIB_CFG_DC_IDX                    = BIT(1),
3166        IWL_CALIB_CFG_LO_IDX                    = BIT(2),
3167        IWL_CALIB_CFG_TX_IQ_IDX                 = BIT(3),
3168        IWL_CALIB_CFG_RX_IQ_IDX                 = BIT(4),
3169        IWL_CALIB_CFG_NOISE_IDX                 = BIT(5),
3170        IWL_CALIB_CFG_CRYSTAL_IDX               = BIT(6),
3171        IWL_CALIB_CFG_TEMPERATURE_IDX           = BIT(7),
3172        IWL_CALIB_CFG_PAPD_IDX                  = BIT(8),
3173        IWL_CALIB_CFG_SENSITIVITY_IDX           = BIT(9),
3174        IWL_CALIB_CFG_TX_PWR_IDX                = BIT(10),
3175};
3176
3177#define IWL_CALIB_INIT_CFG_ALL  cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX |   \
3178                                        IWL_CALIB_CFG_DC_IDX |          \
3179                                        IWL_CALIB_CFG_LO_IDX |          \
3180                                        IWL_CALIB_CFG_TX_IQ_IDX |       \
3181                                        IWL_CALIB_CFG_RX_IQ_IDX |       \
3182                                        IWL_CALIB_CFG_CRYSTAL_IDX)
3183
3184#define IWL_CALIB_RT_CFG_ALL    cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX |   \
3185                                        IWL_CALIB_CFG_DC_IDX |          \
3186                                        IWL_CALIB_CFG_LO_IDX |          \
3187                                        IWL_CALIB_CFG_TX_IQ_IDX |       \
3188                                        IWL_CALIB_CFG_RX_IQ_IDX |       \
3189                                        IWL_CALIB_CFG_TEMPERATURE_IDX | \
3190                                        IWL_CALIB_CFG_PAPD_IDX |        \
3191                                        IWL_CALIB_CFG_TX_PWR_IDX |      \
3192                                        IWL_CALIB_CFG_CRYSTAL_IDX)
3193
3194#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK       cpu_to_le32(BIT(0))
3195
3196struct iwl_calib_cfg_elmnt_s {
3197        __le32 is_enable;
3198        __le32 start;
3199        __le32 send_res;
3200        __le32 apply_res;
3201        __le32 reserved;
3202} __packed;
3203
3204struct iwl_calib_cfg_status_s {
3205        struct iwl_calib_cfg_elmnt_s once;
3206        struct iwl_calib_cfg_elmnt_s perd;
3207        __le32 flags;
3208} __packed;
3209
3210struct iwl_calib_cfg_cmd {
3211        struct iwl_calib_cfg_status_s ucd_calib_cfg;
3212        struct iwl_calib_cfg_status_s drv_calib_cfg;
3213        __le32 reserved1;
3214} __packed;
3215
3216struct iwl_calib_hdr {
3217        u8 op_code;
3218        u8 first_group;
3219        u8 groups_num;
3220        u8 data_valid;
3221} __packed;
3222
3223struct iwl_calib_cmd {
3224        struct iwl_calib_hdr hdr;
3225        u8 data[0];
3226} __packed;
3227
3228struct iwl_calib_xtal_freq_cmd {
3229        struct iwl_calib_hdr hdr;
3230        u8 cap_pin1;
3231        u8 cap_pin2;
3232        u8 pad[2];
3233} __packed;
3234
3235#define DEFAULT_RADIO_SENSOR_OFFSET    cpu_to_le16(2700)
3236struct iwl_calib_temperature_offset_cmd {
3237        struct iwl_calib_hdr hdr;
3238        __le16 radio_sensor_offset;
3239        __le16 reserved;
3240} __packed;
3241
3242struct iwl_calib_temperature_offset_v2_cmd {
3243        struct iwl_calib_hdr hdr;
3244        __le16 radio_sensor_offset_high;
3245        __le16 radio_sensor_offset_low;
3246        __le16 burntVoltageRef;
3247        __le16 reserved;
3248} __packed;
3249
3250/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3251struct iwl_calib_chain_noise_reset_cmd {
3252        struct iwl_calib_hdr hdr;
3253        u8 data[0];
3254};
3255
3256/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3257struct iwl_calib_chain_noise_gain_cmd {
3258        struct iwl_calib_hdr hdr;
3259        u8 delta_gain_1;
3260        u8 delta_gain_2;
3261        u8 pad[2];
3262} __packed;
3263
3264/******************************************************************************
3265 * (12)
3266 * Miscellaneous Commands:
3267 *
3268 *****************************************************************************/
3269
3270/*
3271 * LEDs Command & Response
3272 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3273 *
3274 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3275 * this command turns it on or off, or sets up a periodic blinking cycle.
3276 */
3277struct iwl_led_cmd {
3278        __le32 interval;        /* "interval" in uSec */
3279        u8 id;                  /* 1: Activity, 2: Link, 3: Tech */
3280        u8 off;                 /* # intervals off while blinking;
3281                                 * "0", with >0 "on" value, turns LED on */
3282        u8 on;                  /* # intervals on while blinking;
3283                                 * "0", regardless of "off", turns LED off */
3284        u8 reserved;
3285} __packed;
3286
3287/*
3288 * station priority table entries
3289 * also used as potential "events" value for both
3290 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3291 */
3292
3293/*
3294 * COEX events entry flag masks
3295 * RP - Requested Priority
3296 * WP - Win Medium Priority: priority assigned when the contention has been won
3297 */
3298#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG        (0x1)
3299#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG        (0x2)
3300#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG  (0x4)
3301
3302#define COEX_CU_UNASSOC_IDLE_RP               4
3303#define COEX_CU_UNASSOC_MANUAL_SCAN_RP        4
3304#define COEX_CU_UNASSOC_AUTO_SCAN_RP          4
3305#define COEX_CU_CALIBRATION_RP                4
3306#define COEX_CU_PERIODIC_CALIBRATION_RP       4
3307#define COEX_CU_CONNECTION_ESTAB_RP           4
3308#define COEX_CU_ASSOCIATED_IDLE_RP            4
3309#define COEX_CU_ASSOC_MANUAL_SCAN_RP          4
3310#define COEX_CU_ASSOC_AUTO_SCAN_RP            4
3311#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP         4
3312#define COEX_CU_RF_ON_RP                      6
3313#define COEX_CU_RF_OFF_RP                     4
3314#define COEX_CU_STAND_ALONE_DEBUG_RP          6
3315#define COEX_CU_IPAN_ASSOC_LEVEL_RP           4
3316#define COEX_CU_RSRVD1_RP                     4
3317#define COEX_CU_RSRVD2_RP                     4
3318
3319#define COEX_CU_UNASSOC_IDLE_WP               3
3320#define COEX_CU_UNASSOC_MANUAL_SCAN_WP        3
3321#define COEX_CU_UNASSOC_AUTO_SCAN_WP          3
3322#define COEX_CU_CALIBRATION_WP                3
3323#define COEX_CU_PERIODIC_CALIBRATION_WP       3
3324#define COEX_CU_CONNECTION_ESTAB_WP           3
3325#define COEX_CU_ASSOCIATED_IDLE_WP            3
3326#define COEX_CU_ASSOC_MANUAL_SCAN_WP          3
3327#define COEX_CU_ASSOC_AUTO_SCAN_WP            3
3328#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP         3
3329#define COEX_CU_RF_ON_WP                      3
3330#define COEX_CU_RF_OFF_WP                     3
3331#define COEX_CU_STAND_ALONE_DEBUG_WP          6
3332#define COEX_CU_IPAN_ASSOC_LEVEL_WP           3
3333#define COEX_CU_RSRVD1_WP                     3
3334#define COEX_CU_RSRVD2_WP                     3
3335
3336#define COEX_UNASSOC_IDLE_FLAGS                     0
3337#define COEX_UNASSOC_MANUAL_SCAN_FLAGS          \
3338        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3339        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3340#define COEX_UNASSOC_AUTO_SCAN_FLAGS            \
3341        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3342        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3343#define COEX_CALIBRATION_FLAGS                  \
3344        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3345        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3346#define COEX_PERIODIC_CALIBRATION_FLAGS             0
3347/*
3348 * COEX_CONNECTION_ESTAB:
3349 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3350 */
3351#define COEX_CONNECTION_ESTAB_FLAGS             \
3352        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3353        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |    \
3354        COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3355#define COEX_ASSOCIATED_IDLE_FLAGS                  0
3356#define COEX_ASSOC_MANUAL_SCAN_FLAGS            \
3357        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3358        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3359#define COEX_ASSOC_AUTO_SCAN_FLAGS              \
3360        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3361         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3362#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS               0
3363#define COEX_RF_ON_FLAGS                            0
3364#define COEX_RF_OFF_FLAGS                           0
3365#define COEX_STAND_ALONE_DEBUG_FLAGS            \
3366        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3367         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3368#define COEX_IPAN_ASSOC_LEVEL_FLAGS             \
3369        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3370         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |   \
3371         COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3372#define COEX_RSRVD1_FLAGS                           0
3373#define COEX_RSRVD2_FLAGS                           0
3374/*
3375 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3376 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3377 */
3378#define COEX_CU_RF_ON_FLAGS                     \
3379        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3380         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |   \
3381         COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3382
3383
3384enum {
3385        /* un-association part */
3386        COEX_UNASSOC_IDLE               = 0,
3387        COEX_UNASSOC_MANUAL_SCAN        = 1,
3388        COEX_UNASSOC_AUTO_SCAN          = 2,
3389        /* calibration */
3390        COEX_CALIBRATION                = 3,
3391        COEX_PERIODIC_CALIBRATION       = 4,
3392        /* connection */
3393        COEX_CONNECTION_ESTAB           = 5,
3394        /* association part */
3395        COEX_ASSOCIATED_IDLE            = 6,
3396        COEX_ASSOC_MANUAL_SCAN          = 7,
3397        COEX_ASSOC_AUTO_SCAN            = 8,
3398        COEX_ASSOC_ACTIVE_LEVEL         = 9,
3399        /* RF ON/OFF */
3400        COEX_RF_ON                      = 10,
3401        COEX_RF_OFF                     = 11,
3402        COEX_STAND_ALONE_DEBUG          = 12,
3403        /* IPAN */
3404        COEX_IPAN_ASSOC_LEVEL           = 13,
3405        /* reserved */
3406        COEX_RSRVD1                     = 14,
3407        COEX_RSRVD2                     = 15,
3408        COEX_NUM_OF_EVENTS              = 16
3409};
3410
3411/*
3412 * Coexistence WIFI/WIMAX  Command
3413 * COEX_PRIORITY_TABLE_CMD = 0x5a
3414 *
3415 */
3416struct iwl_wimax_coex_event_entry {
3417        u8 request_prio;
3418        u8 win_medium_prio;
3419        u8 reserved;
3420        u8 flags;
3421} __packed;
3422
3423/* COEX flag masks */
3424
3425/* Station table is valid */
3426#define COEX_FLAGS_STA_TABLE_VALID_MSK      (0x1)
3427/* UnMask wake up src at unassociated sleep */
3428#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK    (0x4)
3429/* UnMask wake up src at associated sleep */
3430#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK      (0x8)
3431/* Enable CoEx feature. */
3432#define COEX_FLAGS_COEX_ENABLE_MSK          (0x80)
3433
3434struct iwl_wimax_coex_cmd {
3435        u8 flags;
3436        u8 reserved[3];
3437        struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3438} __packed;
3439
3440/*
3441 * Coexistence MEDIUM NOTIFICATION
3442 * COEX_MEDIUM_NOTIFICATION = 0x5b
3443 *
3444 * notification from uCode to host to indicate medium changes
3445 *
3446 */
3447/*
3448 * status field
3449 * bit 0 - 2: medium status
3450 * bit 3: medium change indication
3451 * bit 4 - 31: reserved
3452 */
3453/* status option values, (0 - 2 bits) */
3454#define COEX_MEDIUM_BUSY        (0x0) /* radio belongs to WiMAX */
3455#define COEX_MEDIUM_ACTIVE      (0x1) /* radio belongs to WiFi */
3456#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3457#define COEX_MEDIUM_MSK         (0x7)
3458
3459/* send notification status (1 bit) */
3460#define COEX_MEDIUM_CHANGED     (0x8)
3461#define COEX_MEDIUM_CHANGED_MSK (0x8)
3462#define COEX_MEDIUM_SHIFT       (3)
3463
3464struct iwl_coex_medium_notification {
3465        __le32 status;
3466        __le32 events;
3467} __packed;
3468
3469/*
3470 * Coexistence EVENT  Command
3471 * COEX_EVENT_CMD = 0x5c
3472 *
3473 * send from host to uCode for coex event request.
3474 */
3475/* flags options */
3476#define COEX_EVENT_REQUEST_MSK  (0x1)
3477
3478struct iwl_coex_event_cmd {
3479        u8 flags;
3480        u8 event;
3481        __le16 reserved;
3482} __packed;
3483
3484struct iwl_coex_event_resp {
3485        __le32 status;
3486} __packed;
3487
3488
3489/******************************************************************************
3490 * Bluetooth Coexistence commands
3491 *
3492 *****************************************************************************/
3493
3494/*
3495 * BT Status notification
3496 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3497 */
3498enum iwl_bt_coex_profile_traffic_load {
3499        IWL_BT_COEX_TRAFFIC_LOAD_NONE =         0,
3500        IWL_BT_COEX_TRAFFIC_LOAD_LOW =          1,
3501        IWL_BT_COEX_TRAFFIC_LOAD_HIGH =         2,
3502        IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS =   3,
3503/*
3504 * There are no more even though below is a u8, the
3505 * indication from the BT device only has two bits.
3506 */
3507};
3508
3509#define BT_SESSION_ACTIVITY_1_UART_MSG          0x1
3510#define BT_SESSION_ACTIVITY_2_UART_MSG          0x2
3511
3512/* BT UART message - Share Part (BT -> WiFi) */
3513#define BT_UART_MSG_FRAME1MSGTYPE_POS           (0)
3514#define BT_UART_MSG_FRAME1MSGTYPE_MSK           \
3515                (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3516#define BT_UART_MSG_FRAME1SSN_POS               (3)
3517#define BT_UART_MSG_FRAME1SSN_MSK               \
3518                (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3519#define BT_UART_MSG_FRAME1UPDATEREQ_POS         (5)
3520#define BT_UART_MSG_FRAME1UPDATEREQ_MSK         \
3521                (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3522#define BT_UART_MSG_FRAME1RESERVED_POS          (6)
3523#define BT_UART_MSG_FRAME1RESERVED_MSK          \
3524                (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3525
3526#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS   (0)
3527#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK   \
3528                (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3529#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS       (2)
3530#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK       \
3531                (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3532#define BT_UART_MSG_FRAME2CHLSEQN_POS           (4)
3533#define BT_UART_MSG_FRAME2CHLSEQN_MSK           \
3534                (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3535#define BT_UART_MSG_FRAME2INBAND_POS            (5)
3536#define BT_UART_MSG_FRAME2INBAND_MSK            \
3537                (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3538#define BT_UART_MSG_FRAME2RESERVED_POS          (6)
3539#define BT_UART_MSG_FRAME2RESERVED_MSK          \
3540                (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3541
3542#define BT_UART_MSG_FRAME3SCOESCO_POS           (0)
3543#define BT_UART_MSG_FRAME3SCOESCO_MSK           \
3544                (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3545#define BT_UART_MSG_FRAME3SNIFF_POS             (1)
3546#define BT_UART_MSG_FRAME3SNIFF_MSK             \
3547                (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3548#define BT_UART_MSG_FRAME3A2DP_POS              (2)
3549#define BT_UART_MSG_FRAME3A2DP_MSK              \
3550                (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3551#define BT_UART_MSG_FRAME3ACL_POS               (3)
3552#define BT_UART_MSG_FRAME3ACL_MSK               \
3553                (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3554#define BT_UART_MSG_FRAME3MASTER_POS            (4)
3555#define BT_UART_MSG_FRAME3MASTER_MSK            \
3556                (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3557#define BT_UART_MSG_FRAME3OBEX_POS              (5)
3558#define BT_UART_MSG_FRAME3OBEX_MSK              \
3559                (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3560#define BT_UART_MSG_FRAME3RESERVED_POS          (6)
3561#define BT_UART_MSG_FRAME3RESERVED_MSK          \
3562                (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3563
3564#define BT_UART_MSG_FRAME4IDLEDURATION_POS      (0)
3565#define BT_UART_MSG_FRAME4IDLEDURATION_MSK      \
3566                (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3567#define BT_UART_MSG_FRAME4RESERVED_POS          (6)
3568#define BT_UART_MSG_FRAME4RESERVED_MSK          \
3569                (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3570
3571#define BT_UART_MSG_FRAME5TXACTIVITY_POS        (0)
3572#define BT_UART_MSG_FRAME5TXACTIVITY_MSK        \
3573                (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3574#define BT_UART_MSG_FRAME5RXACTIVITY_POS        (2)
3575#define BT_UART_MSG_FRAME5RXACTIVITY_MSK        \
3576                (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3577#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS    (4)
3578#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK    \
3579                (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3580#define BT_UART_MSG_FRAME5RESERVED_POS          (6)
3581#define BT_UART_MSG_FRAME5RESERVED_MSK          \
3582                (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3583
3584#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS     (0)
3585#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK     \
3586                (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3587#define BT_UART_MSG_FRAME6DISCOVERABLE_POS      (5)
3588#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK      \
3589                (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3590#define BT_UART_MSG_FRAME6RESERVED_POS          (6)
3591#define BT_UART_MSG_FRAME6RESERVED_MSK          \
3592                (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3593
3594#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS     (0)
3595#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK     \
3596                (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3597#define BT_UART_MSG_FRAME7PAGE_POS              (3)
3598#define BT_UART_MSG_FRAME7PAGE_MSK              \
3599                (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3600#define BT_UART_MSG_FRAME7INQUIRY_POS           (4)
3601#define BT_UART_MSG_FRAME7INQUIRY_MSK           \
3602                (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3603#define BT_UART_MSG_FRAME7CONNECTABLE_POS       (5)
3604#define BT_UART_MSG_FRAME7CONNECTABLE_MSK       \
3605                (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3606#define BT_UART_MSG_FRAME7RESERVED_POS          (6)
3607#define BT_UART_MSG_FRAME7RESERVED_MSK          \
3608                (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3609
3610/* BT Session Activity 2 UART message (BT -> WiFi) */
3611#define BT_UART_MSG_2_FRAME1RESERVED1_POS       (5)
3612#define BT_UART_MSG_2_FRAME1RESERVED1_MSK       \
3613                (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3614#define BT_UART_MSG_2_FRAME1RESERVED2_POS       (6)
3615#define BT_UART_MSG_2_FRAME1RESERVED2_MSK       \
3616                (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3617
3618#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS  (0)
3619#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK  \
3620                (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3621#define BT_UART_MSG_2_FRAME2RESERVED_POS        (6)
3622#define BT_UART_MSG_2_FRAME2RESERVED_MSK        \
3623                (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3624
3625#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS   (0)
3626#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK   \
3627                (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3628#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS   (4)
3629#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK   \
3630                (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3631#define BT_UART_MSG_2_FRAME3LEMASTER_POS        (5)
3632#define BT_UART_MSG_2_FRAME3LEMASTER_MSK        \
3633                (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3634#define BT_UART_MSG_2_FRAME3RESERVED_POS        (6)
3635#define BT_UART_MSG_2_FRAME3RESERVED_MSK        \
3636                (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3637
3638#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS   (0)
3639#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK   \
3640                (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3641#define BT_UART_MSG_2_FRAME4NUMLECONN_POS       (4)
3642#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK       \
3643                (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3644#define BT_UART_MSG_2_FRAME4RESERVED_POS        (6)
3645#define BT_UART_MSG_2_FRAME4RESERVED_MSK        \
3646                (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3647
3648#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS       (0)
3649#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK       \
3650                (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3651#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS  (4)
3652#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK  \
3653                (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3654#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS     (5)
3655#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK     \
3656                (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3657#define BT_UART_MSG_2_FRAME5RESERVED_POS        (6)
3658#define BT_UART_MSG_2_FRAME5RESERVED_MSK        \
3659                (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3660
3661#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS  (0)
3662#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK  \
3663                (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3664#define BT_UART_MSG_2_FRAME6RFU_POS             (5)
3665#define BT_UART_MSG_2_FRAME6RFU_MSK             \
3666                (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3667#define BT_UART_MSG_2_FRAME6RESERVED_POS        (6)
3668#define BT_UART_MSG_2_FRAME6RESERVED_MSK        \
3669                (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3670
3671#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS  (0)
3672#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK  \
3673                (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3674#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS      (3)
3675#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK      \
3676                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3677#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS      (4)
3678#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK      \
3679                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3680#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS  (5)
3681#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK  \
3682                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3683#define BT_UART_MSG_2_FRAME7RESERVED_POS        (6)
3684#define BT_UART_MSG_2_FRAME7RESERVED_MSK        \
3685                (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3686
3687
3688#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD     (-62)
3689#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD    (-65)
3690
3691struct iwl_bt_uart_msg {
3692        u8 header;
3693        u8 frame1;
3694        u8 frame2;
3695        u8 frame3;
3696        u8 frame4;
3697        u8 frame5;
3698        u8 frame6;
3699        u8 frame7;
3700} __packed;
3701
3702struct iwl_bt_coex_profile_notif {
3703        struct iwl_bt_uart_msg last_bt_uart_msg;
3704        u8 bt_status; /* 0 - off, 1 - on */
3705        u8 bt_traffic_load; /* 0 .. 3? */
3706        u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3707        u8 reserved;
3708} __packed;
3709
3710#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3711#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3712#define IWL_BT_COEX_PRIO_TBL_PRIO_POS           1
3713#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK          0x0e
3714#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS       4
3715#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK      0xf0
3716#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT         1
3717
3718/*
3719 * BT Coexistence Priority table
3720 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3721 */
3722enum bt_coex_prio_table_events {
3723        BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3724        BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3725        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3726        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3727        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3728        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3729        BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3730        BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3731        BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3732        BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3733        BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3734        BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3735        BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3736        BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3737        BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3738        BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3739        /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3740        BT_COEX_PRIO_TBL_EVT_MAX,
3741};
3742
3743enum bt_coex_prio_table_priorities {
3744        BT_COEX_PRIO_TBL_DISABLED = 0,
3745        BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3746        BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3747        BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3748        BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3749        BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3750        BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3751        BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3752        BT_COEX_PRIO_TBL_MAX,
3753};
3754
3755struct iwl_bt_coex_prio_table_cmd {
3756        u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3757} __packed;
3758
3759#define IWL_BT_COEX_ENV_CLOSE   0
3760#define IWL_BT_COEX_ENV_OPEN    1
3761/*
3762 * BT Protection Envelope
3763 * REPLY_BT_COEX_PROT_ENV = 0xcd
3764 */
3765struct iwl_bt_coex_prot_env_cmd {
3766        u8 action; /* 0 = closed, 1 = open */
3767        u8 type; /* 0 .. 15 */
3768        u8 reserved[2];
3769} __packed;
3770
3771/*
3772 * REPLY_D3_CONFIG
3773 */
3774enum iwlagn_d3_wakeup_filters {
3775        IWLAGN_D3_WAKEUP_RFKILL         = BIT(0),
3776        IWLAGN_D3_WAKEUP_SYSASSERT      = BIT(1),
3777};
3778
3779struct iwlagn_d3_config_cmd {
3780        __le32 min_sleep_time;
3781        __le32 wakeup_flags;
3782} __packed;
3783
3784/*
3785 * REPLY_WOWLAN_PATTERNS
3786 */
3787#define IWLAGN_WOWLAN_MIN_PATTERN_LEN   16
3788#define IWLAGN_WOWLAN_MAX_PATTERN_LEN   128
3789
3790struct iwlagn_wowlan_pattern {
3791        u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3792        u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3793        u8 mask_size;
3794        u8 pattern_size;
3795        __le16 reserved;
3796} __packed;
3797
3798#define IWLAGN_WOWLAN_MAX_PATTERNS      20
3799
3800struct iwlagn_wowlan_patterns_cmd {
3801        __le32 n_patterns;
3802        struct iwlagn_wowlan_pattern patterns[];
3803} __packed;
3804
3805/*
3806 * REPLY_WOWLAN_WAKEUP_FILTER
3807 */
3808enum iwlagn_wowlan_wakeup_filters {
3809        IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET       = BIT(0),
3810        IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH      = BIT(1),
3811        IWLAGN_WOWLAN_WAKEUP_BEACON_MISS        = BIT(2),
3812        IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE        = BIT(3),
3813        IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL     = BIT(4),
3814        IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ      = BIT(5),
3815        IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE     = BIT(6),
3816        IWLAGN_WOWLAN_WAKEUP_ALWAYS             = BIT(7),
3817        IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT  = BIT(8),
3818};
3819
3820struct iwlagn_wowlan_wakeup_filter_cmd {
3821        __le32 enabled;
3822        __le16 non_qos_seq;
3823        __le16 reserved;
3824        __le16 qos_seq[8];
3825};
3826
3827/*
3828 * REPLY_WOWLAN_TSC_RSC_PARAMS
3829 */
3830#define IWLAGN_NUM_RSC  16
3831
3832struct tkip_sc {
3833        __le16 iv16;
3834        __le16 pad;
3835        __le32 iv32;
3836} __packed;
3837
3838struct iwlagn_tkip_rsc_tsc {
3839        struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3840        struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3841        struct tkip_sc tsc;
3842} __packed;
3843
3844struct aes_sc {
3845        __le64 pn;
3846} __packed;
3847
3848struct iwlagn_aes_rsc_tsc {
3849        struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3850        struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3851        struct aes_sc tsc;
3852} __packed;
3853
3854union iwlagn_all_tsc_rsc {
3855        struct iwlagn_tkip_rsc_tsc tkip;
3856        struct iwlagn_aes_rsc_tsc aes;
3857};
3858
3859struct iwlagn_wowlan_rsc_tsc_params_cmd {
3860        union iwlagn_all_tsc_rsc all_tsc_rsc;
3861} __packed;
3862
3863/*
3864 * REPLY_WOWLAN_TKIP_PARAMS
3865 */
3866#define IWLAGN_MIC_KEY_SIZE     8
3867#define IWLAGN_P1K_SIZE         5
3868struct iwlagn_mic_keys {
3869        u8 tx[IWLAGN_MIC_KEY_SIZE];
3870        u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3871        u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3872} __packed;
3873
3874struct iwlagn_p1k_cache {
3875        __le16 p1k[IWLAGN_P1K_SIZE];
3876} __packed;
3877
3878#define IWLAGN_NUM_RX_P1K_CACHE 2
3879
3880struct iwlagn_wowlan_tkip_params_cmd {
3881        struct iwlagn_mic_keys mic_keys;
3882        struct iwlagn_p1k_cache tx;
3883        struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3884        struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3885} __packed;
3886
3887/*
3888 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3889 */
3890
3891#define IWLAGN_KCK_MAX_SIZE     32
3892#define IWLAGN_KEK_MAX_SIZE     32
3893
3894struct iwlagn_wowlan_kek_kck_material_cmd {
3895        u8      kck[IWLAGN_KCK_MAX_SIZE];
3896        u8      kek[IWLAGN_KEK_MAX_SIZE];
3897        __le16  kck_len;
3898        __le16  kek_len;
3899        __le64  replay_ctr;
3900} __packed;
3901
3902#define RF_KILL_INDICATOR_FOR_WOWLAN    0x87
3903
3904/*
3905 * REPLY_WOWLAN_GET_STATUS = 0xe5
3906 */
3907struct iwlagn_wowlan_status {
3908        __le64 replay_ctr;
3909        __le32 rekey_status;
3910        __le32 wakeup_reason;
3911        u8 pattern_number;
3912        u8 reserved1;
3913        __le16 qos_seq_ctr[8];
3914        __le16 non_qos_seq_ctr;
3915        __le16 reserved2;
3916        union iwlagn_all_tsc_rsc tsc_rsc;
3917        __le16 reserved3;
3918} __packed;
3919
3920/*
3921 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3922 */
3923
3924/*
3925 * Minimum slot time in TU
3926 */
3927#define IWL_MIN_SLOT_TIME       20
3928
3929/**
3930 * struct iwl_wipan_slot
3931 * @width: Time in TU
3932 * @type:
3933 *   0 - BSS
3934 *   1 - PAN
3935 */
3936struct iwl_wipan_slot {
3937        __le16 width;
3938        u8 type;
3939        u8 reserved;
3940} __packed;
3941
3942#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS          BIT(1)  /* reserved */
3943#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET        BIT(2)  /* reserved */
3944#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE               BIT(3)  /* reserved */
3945#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF        BIT(4)
3946#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE          BIT(5)
3947
3948/**
3949 * struct iwl_wipan_params_cmd
3950 * @flags:
3951 *   bit0: reserved
3952 *   bit1: CP leave channel with CTS
3953 *   bit2: CP leave channel qith Quiet
3954 *   bit3: slotted mode
3955 *     1 - work in slotted mode
3956 *     0 - work in non slotted mode
3957 *   bit4: filter beacon notification
3958 *   bit5: full tx slotted mode. if this flag is set,
3959 *         uCode will perform leaving channel methods in context switch
3960 *         also when working in same channel mode
3961 * @num_slots: 1 - 10
3962 */
3963struct iwl_wipan_params_cmd {
3964        __le16 flags;
3965        u8 reserved;
3966        u8 num_slots;
3967        struct iwl_wipan_slot slots[10];
3968} __packed;
3969
3970/*
3971 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3972 *
3973 * TODO: Figure out what this is used for,
3974 *       it can only switch between 2.4 GHz
3975 *       channels!!
3976 */
3977
3978struct iwl_wipan_p2p_channel_switch_cmd {
3979        __le16 channel;
3980        __le16 reserved;
3981};
3982
3983/*
3984 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3985 *
3986 * This is used by the device to notify us of the
3987 * NoA schedule it determined so we can forward it
3988 * to userspace for inclusion in probe responses.
3989 *
3990 * In beacons, the NoA schedule is simply appended
3991 * to the frame we give the device.
3992 */
3993
3994struct iwl_wipan_noa_descriptor {
3995        u8 count;
3996        __le32 duration;
3997        __le32 interval;
3998        __le32 starttime;
3999} __packed;
4000
4001struct iwl_wipan_noa_attribute {
4002        u8 id;
4003        __le16 length;
4004        u8 index;
4005        u8 ct_window;
4006        struct iwl_wipan_noa_descriptor descr0, descr1;
4007        u8 reserved;
4008} __packed;
4009
4010struct iwl_wipan_noa_notification {
4011        u32 noa_active;
4012        struct iwl_wipan_noa_attribute noa_attribute;
4013} __packed;
4014
4015#endif                          /* __iwl_commands_h__ */
4016