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25#ifndef __RX_H__
26#define __RX_H__
27
28#include <linux/bitops.h>
29
30#define WL1271_RX_MAX_RSSI -30
31#define WL1271_RX_MIN_RSSI -95
32
33#define SHORT_PREAMBLE_BIT BIT(0)
34#define OFDM_RATE_BIT BIT(6)
35#define PBCC_RATE_BIT BIT(7)
36
37#define PLCP_HEADER_LENGTH 8
38#define RX_DESC_PACKETID_SHIFT 11
39#define RX_MAX_PACKET_ID 3
40
41#define RX_DESC_VALID_FCS 0x0001
42#define RX_DESC_MATCH_RXADDR1 0x0002
43#define RX_DESC_MCAST 0x0004
44#define RX_DESC_STAINTIM 0x0008
45#define RX_DESC_VIRTUAL_BM 0x0010
46#define RX_DESC_BCAST 0x0020
47#define RX_DESC_MATCH_SSID 0x0040
48#define RX_DESC_MATCH_BSSID 0x0080
49#define RX_DESC_ENCRYPTION_MASK 0x0300
50#define RX_DESC_MEASURMENT 0x0400
51#define RX_DESC_SEQNUM_MASK 0x1800
52#define RX_DESC_MIC_FAIL 0x2000
53#define RX_DESC_DECRYPT_FAIL 0x4000
54
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62
63
64#define WL1271_RX_DESC_BAND_MASK 0x03
65#define WL1271_RX_DESC_ENCRYPT_MASK 0xE0
66
67#define WL1271_RX_DESC_BAND_BG 0x00
68#define WL1271_RX_DESC_BAND_J 0x01
69#define WL1271_RX_DESC_BAND_A 0x02
70
71#define WL1271_RX_DESC_STBC BIT(2)
72#define WL1271_RX_DESC_A_MPDU BIT(3)
73#define WL1271_RX_DESC_HT BIT(4)
74
75#define WL1271_RX_DESC_ENCRYPT_WEP 0x20
76#define WL1271_RX_DESC_ENCRYPT_TKIP 0x40
77#define WL1271_RX_DESC_ENCRYPT_AES 0x60
78#define WL1271_RX_DESC_ENCRYPT_GEM 0x80
79
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85
86
87#define WL1271_RX_DESC_STATUS_MASK 0x07
88
89#define WL1271_RX_DESC_SUCCESS 0x00
90#define WL1271_RX_DESC_DECRYPT_FAIL 0x01
91#define WL1271_RX_DESC_MIC_FAIL 0x02
92
93#define RX_MEM_BLOCK_MASK 0xFF
94#define RX_BUF_SIZE_MASK 0xFFF00
95#define RX_BUF_SIZE_SHIFT_DIV 6
96#define ALIGNED_RX_BUF_SIZE_MASK 0xFFFF00
97#define ALIGNED_RX_BUF_SIZE_SHIFT 8
98
99
100#define RX_BUF_UNALIGNED_PAYLOAD BIT(20)
101
102
103#define RX_BUF_PADDED_PAYLOAD BIT(30)
104
105
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107
108
109#define RX_BUF_ALIGN 2
110
111
112enum wl_rx_buf_align {
113 WLCORE_RX_BUF_ALIGNED,
114 WLCORE_RX_BUF_UNALIGNED,
115 WLCORE_RX_BUF_PADDED,
116};
117
118enum {
119 WL12XX_RX_CLASS_UNKNOWN,
120 WL12XX_RX_CLASS_MANAGEMENT,
121 WL12XX_RX_CLASS_DATA,
122 WL12XX_RX_CLASS_QOS_DATA,
123 WL12XX_RX_CLASS_BCN_PRBRSP,
124 WL12XX_RX_CLASS_EAPOL,
125 WL12XX_RX_CLASS_BA_EVENT,
126 WL12XX_RX_CLASS_AMSDU,
127 WL12XX_RX_CLASS_LOGGER,
128};
129
130struct wl1271_rx_descriptor {
131 __le16 length;
132 u8 status;
133 u8 flags;
134 u8 rate;
135 u8 channel;
136 s8 rssi;
137 u8 snr;
138 __le32 timestamp;
139 u8 packet_class;
140 u8 hlid;
141 u8 pad_len;
142 u8 reserved;
143} __packed;
144
145int wlcore_rx(struct wl1271 *wl, struct wl_fw_status_1 *status);
146u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);
147int wl1271_rx_filter_enable(struct wl1271 *wl,
148 int index, bool enable,
149 struct wl12xx_rx_filter *filter);
150int wl1271_rx_filter_clear_all(struct wl1271 *wl);
151
152#endif
153