LXR linux/drivers/pcmcia/soc

   1/*
   2 * linux/drivers/pcmcia/soc_common.h
   3 *
   4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
   5 *
   6 * This file contains definitions for the PCMCIA support code common to
   7 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
   8 */
   9#ifndef _ASM_ARCH_PCMCIA
  10#define _ASM_ARCH_PCMCIA
  11
  12/* include the world */
  13#include <linux/clk.h>
  14#include <linux/cpufreq.h>
  15#include <pcmcia/ss.h>
  16#include <pcmcia/cistpl.h>
  17
  18
  19struct device;
  20struct pcmcia_low_level;
  21
  22/*
  23 * This structure encapsulates per-socket state which we might need to
  24 * use when responding to a Card Services query of some kind.
  25 */
  26struct soc_pcmcia_socket {
  27        struct pcmcia_socket    socket;
  28
  29        /*
  30         * Info from low level handler
  31         */
  32        unsigned int            nr;
  33        struct clk              *clk;
  34
  35        /*
  36         * Core PCMCIA state
  37         */
  38        const struct pcmcia_low_level *ops;
  39
  40        unsigned int            status;
  41        socket_state_t          cs_state;
  42
  43        unsigned short          spd_io[MAX_IO_WIN];
  44        unsigned short          spd_mem[MAX_WIN];
  45        unsigned short          spd_attr[MAX_WIN];
  46
  47        struct resource         res_skt;
  48        struct resource         res_io;
  49        struct resource         res_mem;
  50        struct resource         res_attr;
  51        void __iomem            *virt_io;
  52
  53        struct {
  54                int             gpio;
  55                unsigned int    irq;
  56                const char      *name;
  57        } stat[4];
  58#define SOC_STAT_CD             0       /* Card detect */
  59#define SOC_STAT_BVD1           1       /* BATDEAD / IOSTSCHG */
  60#define SOC_STAT_BVD2           2       /* BATWARN / IOSPKR */
  61#define SOC_STAT_RDY            3       /* Ready / Interrupt */
  62
  63        unsigned int            irq_state;
  64
  65        struct timer_list       poll_timer;
  66        struct list_head        node;
  67};
  68
  69struct skt_dev_info {
  70        int nskt;
  71        struct clk *clk;
  72        struct soc_pcmcia_socket skt[0];
  73};
  74
  75struct pcmcia_state {
  76  unsigned detect: 1,
  77            ready: 1,
  78             bvd1: 1,
  79             bvd2: 1,
  80           wrprot: 1,
  81            vs_3v: 1,
  82            vs_Xv: 1;
  83};
  84
  85struct pcmcia_low_level {
  86        struct module *owner;
  87
  88        /* first socket in system */
  89        int first;
  90        /* nr of sockets */
  91        int nr;
  92
  93        int (*hw_init)(struct soc_pcmcia_socket *);
  94        void (*hw_shutdown)(struct soc_pcmcia_socket *);
  95
  96        void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  97        int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  98
  99        /*
 100         * Enable card status IRQs on (re-)initialisation.  This can
 101         * be called at initialisation, power management event, or
 102         * pcmcia event.
 103         */
 104        void (*socket_init)(struct soc_pcmcia_socket *);
 105
 106        /*
 107         * Disable card status IRQs and PCMCIA bus on suspend.
 108         */
 109        void (*socket_suspend)(struct soc_pcmcia_socket *);
 110
 111        /*
 112         * Hardware specific timing routines.
 113         * If provided, the get_timing routine overrides the SOC default.
 114         */
 115        unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
 116        int (*set_timing)(struct soc_pcmcia_socket *);
 117        int (*show_timing)(struct soc_pcmcia_socket *, char *);
 118
 119#ifdef CONFIG_CPU_FREQ
 120        /*
 121         * CPUFREQ support.
 122         */
 123        int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
 124#endif
 125};
 126
 127
 128struct soc_pcmcia_timing {
 129        unsigned short io;
 130        unsigned short mem;
 131        unsigned short attr;
 132};
 133
 134extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
 135
 136void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
 137        struct pcmcia_low_level *ops, struct device *dev);
 138void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
 139int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
 140
 141
 142#ifdef CONFIG_PCMCIA_DEBUG
 143
 144extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
 145                             int lvl, const char *fmt, ...);
 146
 147#define debug(skt, lvl, fmt, arg...) \
 148        soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
 149
 150#else
 151#define debug(skt, lvl, fmt, arg...) do { } while (0)
 152#endif
 153
 154
 155/*
 156 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
 157 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
 158 * a minimum value of 165ns, as well. Section 4.7.2 (describing
 159 * common and attribute memory write timing) says that twWE has a
 160 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
 161 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
 162 * operation, also section 4.7.4). Section 4.7.3 says that taOE
 163 * has a maximum value of 150ns for a 300ns cycle time (for 5V
 164 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
 165 *
 166 * When configuring memory maps, Card Services appears to adopt the policy
 167 * that a memory access time of "0" means "use the default." The default
 168 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
 169 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
 170 * memory command width time is 300ns.
 171 */
 172#define SOC_PCMCIA_IO_ACCESS            (165)
 173#define SOC_PCMCIA_5V_MEM_ACCESS        (150)
 174#define SOC_PCMCIA_3V_MEM_ACCESS        (300)
 175#define SOC_PCMCIA_ATTR_MEM_ACCESS      (300)
 176
 177/*
 178 * The socket driver actually works nicely in interrupt-driven form,
 179 * so the (relatively infrequent) polling is "just to be sure."
 180 */
 181#define SOC_PCMCIA_POLL_PERIOD    (2*HZ)
 182
 183
 184/* I/O pins replacing memory pins
 185 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
 186 *
 187 * These signals change meaning when going from memory-only to
 188 * memory-or-I/O interface:
 189 */
 190#define iostschg bvd1
 191#define iospkr   bvd2
 192
 193#endif
 194