LXR linux/drivers/scsi/mpt2sas/mpi/mpi2

   1/*
   2 *  Copyright (c) 2000-2012 LSI Corporation.
   3 *
   4 *
   5 *           Name:  mpi2_ioc.h
   6 *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7 *  Creation Date:  October 11, 2006
   8 *
   9 *  mpi2_ioc.h Version:  02.00.21
  10 *
  11 *  Version History
  12 *  ---------------
  13 *
  14 *  Date      Version   Description
  15 *  --------  --------  ------------------------------------------------------
  16 *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  17 *  06-04-07  02.00.01  In IOCFacts Reply structure, renamed MaxDevices to
  18 *                      MaxTargets.
  19 *                      Added TotalImageSize field to FWDownload Request.
  20 *                      Added reserved words to FWUpload Request.
  21 *  06-26-07  02.00.02  Added IR Configuration Change List Event.
  22 *  08-31-07  02.00.03  Removed SystemReplyQueueDepth field from the IOCInit
  23 *                      request and replaced it with
  24 *                      ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
  25 *                      Replaced the MinReplyQueueDepth field of the IOCFacts
  26 *                      reply with MaxReplyDescriptorPostQueueDepth.
  27 *                      Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
  28 *                      depth for the Reply Descriptor Post Queue.
  29 *                      Added SASAddress field to Initiator Device Table
  30 *                      Overflow Event data.
  31 *  10-31-07  02.00.04  Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
  32 *                      for SAS Initiator Device Status Change Event data.
  33 *                      Modified Reason Code defines for SAS Topology Change
  34 *                      List Event data, including adding a bit for PHY Vacant
  35 *                      status, and adding a mask for the Reason Code.
  36 *                      Added define for
  37 *                      MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
  38 *                      Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
  39 *  12-18-07  02.00.05  Added Boot Status defines for the IOCExceptions field of
  40 *                      the IOCFacts Reply.
  41 *                      Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  42 *                      Moved MPI2_VERSION_UNION to mpi2.h.
  43 *                      Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
  44 *                      instead of enables, and added SASBroadcastPrimitiveMasks
  45 *                      field.
  46 *                      Added Log Entry Added Event and related structure.
  47 *  02-29-08  02.00.06  Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
  48 *                      Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
  49 *                      Added MaxVolumes and MaxPersistentEntries fields to
  50 *                      IOCFacts reply.
  51 *                      Added ProtocalFlags and IOCCapabilities fields to
  52 *                      MPI2_FW_IMAGE_HEADER.
  53 *                      Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
  54 *  03-03-08  02.00.07  Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
  55 *                      a U16 (from a U32).
  56 *                      Removed extra 's' from EventMasks name.
  57 *  06-27-08  02.00.08  Fixed an offset in a comment.
  58 *  10-02-08  02.00.09  Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
  59 *                      Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
  60 *                      renamed MinReplyFrameSize to ReplyFrameSize.
  61 *                      Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
  62 *                      Added two new RAIDOperation values for Integrated RAID
  63 *                      Operations Status Event data.
  64 *                      Added four new IR Configuration Change List Event data
  65 *                      ReasonCode values.
  66 *                      Added two new ReasonCode defines for SAS Device Status
  67 *                      Change Event data.
  68 *                      Added three new DiscoveryStatus bits for the SAS
  69 *                      Discovery event data.
  70 *                      Added Multiplexing Status Change bit to the PhyStatus
  71 *                      field of the SAS Topology Change List event data.
  72 *                      Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
  73 *                      BootFlags are now product-specific.
  74 *                      Added defines for the indivdual signature bytes
  75 *                      for MPI2_INIT_IMAGE_FOOTER.
  76 *  01-19-09  02.00.10  Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
  77 *                      Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
  78 *                      define.
  79 *                      Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
  80 *                      define.
  81 *                      Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
  82 *  05-06-09  02.00.11  Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
  83 *                      Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
  84 *                      Added two new reason codes for SAS Device Status Change
  85 *                      Event.
  86 *                      Added new event: SAS PHY Counter.
  87 *  07-30-09  02.00.12  Added GPIO Interrupt event define and structure.
  88 *                      Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  89 *                      Added new product id family for 2208.
  90 *  10-28-09  02.00.13  Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
  91 *                      Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
  92 *                      Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
  93 *                      Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
  94 *                      Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
  95 *                      Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
  96 *                      Added Host Based Discovery Phy Event data.
  97 *                      Added defines for ProductID Product field
  98 *                      (MPI2_FW_HEADER_PID_).
  99 *                      Modified values for SAS ProductID Family
 100 *                      (MPI2_FW_HEADER_PID_FAMILY_).
 101 *  02-10-10  02.00.14  Added SAS Quiesce Event structure and defines.
 102 *                      Added PowerManagementControl Request structures and
 103 *                      defines.
 104 *  05-12-10  02.00.15  Marked Task Set Full Event as obsolete.
 105 *                      Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
 106 *  11-10-10  02.00.16  Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
 107 *  02-23-11  02.00.17  Added SAS NOTIFY Primitive event, and added
 108 *                      SASNotifyPrimitiveMasks field to
 109 *                      MPI2_EVENT_NOTIFICATION_REQUEST.
 110 *                      Added Temperature Threshold Event.
 111 *                      Added Host Message Event.
 112 *                      Added Send Host Message request and reply.
 113 *  05-25-11  02.00.18  For Extended Image Header, added
 114 *                      MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
 115 *                      MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
 116 *                      Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
 117 *  08-24-11  02.00.19  Added PhysicalPort field to
 118 *                      MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure.
 119 *                      Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete.
 120 *  03-29-12  02.00.21  Added a product specific range to event values.
 121 *  --------------------------------------------------------------------------
 122 */
 123
 124#ifndef MPI2_IOC_H
 125#define MPI2_IOC_H
 126
 127/*****************************************************************************
 128*
 129*               IOC Messages
 130*
 131*****************************************************************************/
 132
 133/****************************************************************************
 134*  IOCInit message
 135****************************************************************************/
 136
 137/* IOCInit Request message */
 138typedef struct _MPI2_IOC_INIT_REQUEST
 139{
 140    U8                      WhoInit;                        /* 0x00 */
 141    U8                      Reserved1;                      /* 0x01 */
 142    U8                      ChainOffset;                    /* 0x02 */
 143    U8                      Function;                       /* 0x03 */
 144    U16                     Reserved2;                      /* 0x04 */
 145    U8                      Reserved3;                      /* 0x06 */
 146    U8                      MsgFlags;                       /* 0x07 */
 147    U8                      VP_ID;                          /* 0x08 */
 148    U8                      VF_ID;                          /* 0x09 */
 149    U16                     Reserved4;                      /* 0x0A */
 150    U16                     MsgVersion;                     /* 0x0C */
 151    U16                     HeaderVersion;                  /* 0x0E */
 152    U32                     Reserved5;                      /* 0x10 */
 153    U16                     Reserved6;                      /* 0x14 */
 154    U8                      Reserved7;                      /* 0x16 */
 155    U8                      HostMSIxVectors;                /* 0x17 */
 156    U16                     Reserved8;                      /* 0x18 */
 157    U16                     SystemRequestFrameSize;         /* 0x1A */
 158    U16                     ReplyDescriptorPostQueueDepth;  /* 0x1C */
 159    U16                     ReplyFreeQueueDepth;            /* 0x1E */
 160    U32                     SenseBufferAddressHigh;         /* 0x20 */
 161    U32                     SystemReplyAddressHigh;         /* 0x24 */
 162    U64                     SystemRequestFrameBaseAddress;  /* 0x28 */
 163    U64                     ReplyDescriptorPostQueueAddress;/* 0x30 */
 164    U64                     ReplyFreeQueueAddress;          /* 0x38 */
 165    U64                     TimeStamp;                      /* 0x40 */
 166} MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
 167  Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
 168
 169/* WhoInit values */
 170#define MPI2_WHOINIT_NOT_INITIALIZED            (0x00)
 171#define MPI2_WHOINIT_SYSTEM_BIOS                (0x01)
 172#define MPI2_WHOINIT_ROM_BIOS                   (0x02)
 173#define MPI2_WHOINIT_PCI_PEER                   (0x03)
 174#define MPI2_WHOINIT_HOST_DRIVER                (0x04)
 175#define MPI2_WHOINIT_MANUFACTURER               (0x05)
 176
 177/* MsgVersion */
 178#define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK      (0xFF00)
 179#define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT     (8)
 180#define MPI2_IOCINIT_MSGVERSION_MINOR_MASK      (0x00FF)
 181#define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT     (0)
 182
 183/* HeaderVersion */
 184#define MPI2_IOCINIT_HDRVERSION_UNIT_MASK       (0xFF00)
 185#define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT      (8)
 186#define MPI2_IOCINIT_HDRVERSION_DEV_MASK        (0x00FF)
 187#define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT       (0)
 188
 189/* minimum depth for the Reply Descriptor Post Queue */
 190#define MPI2_RDPQ_DEPTH_MIN                     (16)
 191
 192
 193/* IOCInit Reply message */
 194typedef struct _MPI2_IOC_INIT_REPLY
 195{
 196    U8                      WhoInit;                        /* 0x00 */
 197    U8                      Reserved1;                      /* 0x01 */
 198    U8                      MsgLength;                      /* 0x02 */
 199    U8                      Function;                       /* 0x03 */
 200    U16                     Reserved2;                      /* 0x04 */
 201    U8                      Reserved3;                      /* 0x06 */
 202    U8                      MsgFlags;                       /* 0x07 */
 203    U8                      VP_ID;                          /* 0x08 */
 204    U8                      VF_ID;                          /* 0x09 */
 205    U16                     Reserved4;                      /* 0x0A */
 206    U16                     Reserved5;                      /* 0x0C */
 207    U16                     IOCStatus;                      /* 0x0E */
 208    U32                     IOCLogInfo;                     /* 0x10 */
 209} MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
 210  Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
 211
 212
 213/****************************************************************************
 214*  IOCFacts message
 215****************************************************************************/
 216
 217/* IOCFacts Request message */
 218typedef struct _MPI2_IOC_FACTS_REQUEST
 219{
 220    U16                     Reserved1;                      /* 0x00 */
 221    U8                      ChainOffset;                    /* 0x02 */
 222    U8                      Function;                       /* 0x03 */
 223    U16                     Reserved2;                      /* 0x04 */
 224    U8                      Reserved3;                      /* 0x06 */
 225    U8                      MsgFlags;                       /* 0x07 */
 226    U8                      VP_ID;                          /* 0x08 */
 227    U8                      VF_ID;                          /* 0x09 */
 228    U16                     Reserved4;                      /* 0x0A */
 229} MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
 230  Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
 231
 232
 233/* IOCFacts Reply message */
 234typedef struct _MPI2_IOC_FACTS_REPLY
 235{
 236    U16                     MsgVersion;                     /* 0x00 */
 237    U8                      MsgLength;                      /* 0x02 */
 238    U8                      Function;                       /* 0x03 */
 239    U16                     HeaderVersion;                  /* 0x04 */
 240    U8                      IOCNumber;                      /* 0x06 */
 241    U8                      MsgFlags;                       /* 0x07 */
 242    U8                      VP_ID;                          /* 0x08 */
 243    U8                      VF_ID;                          /* 0x09 */
 244    U16                     Reserved1;                      /* 0x0A */
 245    U16                     IOCExceptions;                  /* 0x0C */
 246    U16                     IOCStatus;                      /* 0x0E */
 247    U32                     IOCLogInfo;                     /* 0x10 */
 248    U8                      MaxChainDepth;                  /* 0x14 */
 249    U8                      WhoInit;                        /* 0x15 */
 250    U8                      NumberOfPorts;                  /* 0x16 */
 251    U8                      MaxMSIxVectors;                 /* 0x17 */
 252    U16                     RequestCredit;                  /* 0x18 */
 253    U16                     ProductID;                      /* 0x1A */
 254    U32                     IOCCapabilities;                /* 0x1C */
 255    MPI2_VERSION_UNION      FWVersion;                      /* 0x20 */
 256    U16                     IOCRequestFrameSize;            /* 0x24 */
 257    U16                     Reserved3;                      /* 0x26 */
 258    U16                     MaxInitiators;                  /* 0x28 */
 259    U16                     MaxTargets;                     /* 0x2A */
 260    U16                     MaxSasExpanders;                /* 0x2C */
 261    U16                     MaxEnclosures;                  /* 0x2E */
 262    U16                     ProtocolFlags;                  /* 0x30 */
 263    U16                     HighPriorityCredit;             /* 0x32 */
 264    U16                     MaxReplyDescriptorPostQueueDepth; /* 0x34 */
 265    U8                      ReplyFrameSize;                 /* 0x36 */
 266    U8                      MaxVolumes;                     /* 0x37 */
 267    U16                     MaxDevHandle;                   /* 0x38 */
 268    U16                     MaxPersistentEntries;           /* 0x3A */
 269    U16                     MinDevHandle;                   /* 0x3C */
 270    U16                     Reserved4;                      /* 0x3E */
 271} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
 272  Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
 273
 274/* MsgVersion */
 275#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK             (0xFF00)
 276#define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT            (8)
 277#define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK             (0x00FF)
 278#define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT            (0)
 279
 280/* HeaderVersion */
 281#define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK              (0xFF00)
 282#define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT             (8)
 283#define MPI2_IOCFACTS_HDRVERSION_DEV_MASK               (0x00FF)
 284#define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT              (0)
 285
 286/* IOCExceptions */
 287#define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX      (0x0100)
 288
 289#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK              (0x00E0)
 290#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD              (0x0000)
 291#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP            (0x0020)
 292#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED          (0x0040)
 293#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP    (0x0060)
 294
 295#define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED       (0x0010)
 296#define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL     (0x0008)
 297#define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL           (0x0004)
 298#define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID        (0x0002)
 299#define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL       (0x0001)
 300
 301/* defines for WhoInit field are after the IOCInit Request */
 302
 303/* ProductID field uses MPI2_FW_HEADER_PID_ */
 304
 305/* IOCCapabilities */
 306#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY   (0x00010000)
 307#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX            (0x00008000)
 308#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR       (0x00004000)
 309#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY           (0x00002000)
 310#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID        (0x00001000)
 311#define MPI2_IOCFACTS_CAPABILITY_TLR                    (0x00000800)
 312#define MPI2_IOCFACTS_CAPABILITY_MULTICAST              (0x00000100)
 313#define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET   (0x00000080)
 314#define MPI2_IOCFACTS_CAPABILITY_EEDP                   (0x00000040)
 315#define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER        (0x00000020)
 316#define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER        (0x00000010)
 317#define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER      (0x00000008)
 318#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
 319
 320/* ProtocolFlags */
 321#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET              (0x0001)
 322#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR           (0x0002)
 323
 324
 325/****************************************************************************
 326*  PortFacts message
 327****************************************************************************/
 328
 329/* PortFacts Request message */
 330typedef struct _MPI2_PORT_FACTS_REQUEST
 331{
 332    U16                     Reserved1;                      /* 0x00 */
 333    U8                      ChainOffset;                    /* 0x02 */
 334    U8                      Function;                       /* 0x03 */
 335    U16                     Reserved2;                      /* 0x04 */
 336    U8                      PortNumber;                     /* 0x06 */
 337    U8                      MsgFlags;                       /* 0x07 */
 338    U8                      VP_ID;                          /* 0x08 */
 339    U8                      VF_ID;                          /* 0x09 */
 340    U16                     Reserved3;                      /* 0x0A */
 341} MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
 342  Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
 343
 344/* PortFacts Reply message */
 345typedef struct _MPI2_PORT_FACTS_REPLY
 346{
 347    U16                     Reserved1;                      /* 0x00 */
 348    U8                      MsgLength;                      /* 0x02 */
 349    U8                      Function;                       /* 0x03 */
 350    U16                     Reserved2;                      /* 0x04 */
 351    U8                      PortNumber;                     /* 0x06 */
 352    U8                      MsgFlags;                       /* 0x07 */
 353    U8                      VP_ID;                          /* 0x08 */
 354    U8                      VF_ID;                          /* 0x09 */
 355    U16                     Reserved3;                      /* 0x0A */
 356    U16                     Reserved4;                      /* 0x0C */
 357    U16                     IOCStatus;                      /* 0x0E */
 358    U32                     IOCLogInfo;                     /* 0x10 */
 359    U8                      Reserved5;                      /* 0x14 */
 360    U8                      PortType;                       /* 0x15 */
 361    U16                     Reserved6;                      /* 0x16 */
 362    U16                     MaxPostedCmdBuffers;            /* 0x18 */
 363    U16                     Reserved7;                      /* 0x1A */
 364} MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
 365  Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
 366
 367/* PortType values */
 368#define MPI2_PORTFACTS_PORTTYPE_INACTIVE            (0x00)
 369#define MPI2_PORTFACTS_PORTTYPE_FC                  (0x10)
 370#define MPI2_PORTFACTS_PORTTYPE_ISCSI               (0x20)
 371#define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL        (0x30)
 372#define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL         (0x31)
 373
 374
 375/****************************************************************************
 376*  PortEnable message
 377****************************************************************************/
 378
 379/* PortEnable Request message */
 380typedef struct _MPI2_PORT_ENABLE_REQUEST
 381{
 382    U16                     Reserved1;                      /* 0x00 */
 383    U8                      ChainOffset;                    /* 0x02 */
 384    U8                      Function;                       /* 0x03 */
 385    U8                      Reserved2;                      /* 0x04 */
 386    U8                      PortFlags;                      /* 0x05 */
 387    U8                      Reserved3;                      /* 0x06 */
 388    U8                      MsgFlags;                       /* 0x07 */
 389    U8                      VP_ID;                          /* 0x08 */
 390    U8                      VF_ID;                          /* 0x09 */
 391    U16                     Reserved4;                      /* 0x0A */
 392} MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
 393  Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
 394
 395
 396/* PortEnable Reply message */
 397typedef struct _MPI2_PORT_ENABLE_REPLY
 398{
 399    U16                     Reserved1;                      /* 0x00 */
 400    U8                      MsgLength;                      /* 0x02 */
 401    U8                      Function;                       /* 0x03 */
 402    U8                      Reserved2;                      /* 0x04 */
 403    U8                      PortFlags;                      /* 0x05 */
 404    U8                      Reserved3;                      /* 0x06 */
 405    U8                      MsgFlags;                       /* 0x07 */
 406    U8                      VP_ID;                          /* 0x08 */
 407    U8                      VF_ID;                          /* 0x09 */
 408    U16                     Reserved4;                      /* 0x0A */
 409    U16                     Reserved5;                      /* 0x0C */
 410    U16                     IOCStatus;                      /* 0x0E */
 411    U32                     IOCLogInfo;                     /* 0x10 */
 412} MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
 413  Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
 414
 415
 416/****************************************************************************
 417*  EventNotification message
 418****************************************************************************/
 419
 420/* EventNotification Request message */
 421#define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS           (4)
 422
 423typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
 424{
 425    U16                     Reserved1;                      /* 0x00 */
 426    U8                      ChainOffset;                    /* 0x02 */
 427    U8                      Function;                       /* 0x03 */
 428    U16                     Reserved2;                      /* 0x04 */
 429    U8                      Reserved3;                      /* 0x06 */
 430    U8                      MsgFlags;                       /* 0x07 */
 431    U8                      VP_ID;                          /* 0x08 */
 432    U8                      VF_ID;                          /* 0x09 */
 433    U16                     Reserved4;                      /* 0x0A */
 434    U32                     Reserved5;                      /* 0x0C */
 435    U32                     Reserved6;                      /* 0x10 */
 436    U32                     EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
 437    U16                     SASBroadcastPrimitiveMasks;     /* 0x24 */
 438         U16                     SASNotifyPrimitiveMasks;        /* 0x26 */
 439    U32                     Reserved8;                      /* 0x28 */
 440} MPI2_EVENT_NOTIFICATION_REQUEST,
 441  MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
 442  Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
 443
 444
 445/* EventNotification Reply message */
 446typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
 447{
 448    U16                     EventDataLength;                /* 0x00 */
 449    U8                      MsgLength;                      /* 0x02 */
 450    U8                      Function;                       /* 0x03 */
 451    U16                     Reserved1;                      /* 0x04 */
 452    U8                      AckRequired;                    /* 0x06 */
 453    U8                      MsgFlags;                       /* 0x07 */
 454    U8                      VP_ID;                          /* 0x08 */
 455    U8                      VF_ID;                          /* 0x09 */
 456    U16                     Reserved2;                      /* 0x0A */
 457    U16                     Reserved3;                      /* 0x0C */
 458    U16                     IOCStatus;                      /* 0x0E */
 459    U32                     IOCLogInfo;                     /* 0x10 */
 460    U16                     Event;                          /* 0x14 */
 461    U16                     Reserved4;                      /* 0x16 */
 462    U32                     EventContext;                   /* 0x18 */
 463    U32                     EventData[1];                   /* 0x1C */
 464} MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
 465  Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
 466
 467/* AckRequired */
 468#define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED    (0x00)
 469#define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED        (0x01)
 470
 471/* Event */
 472#define MPI2_EVENT_LOG_DATA                         (0x0001)
 473#define MPI2_EVENT_STATE_CHANGE                     (0x0002)
 474#define MPI2_EVENT_HARD_RESET_RECEIVED              (0x0005)
 475#define MPI2_EVENT_EVENT_CHANGE                     (0x000A)
 476#define MPI2_EVENT_TASK_SET_FULL                    (0x000E) /* obsolete */
 477#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE         (0x000F)
 478#define MPI2_EVENT_IR_OPERATION_STATUS              (0x0014)
 479#define MPI2_EVENT_SAS_DISCOVERY                    (0x0016)
 480#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE          (0x0017)
 481#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE    (0x0018)
 482#define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW          (0x0019)
 483#define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST         (0x001C)
 484#define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE    (0x001D)
 485#define MPI2_EVENT_IR_VOLUME                        (0x001E)
 486#define MPI2_EVENT_IR_PHYSICAL_DISK                 (0x001F)
 487#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST     (0x0020)
 488#define MPI2_EVENT_LOG_ENTRY_ADDED                  (0x0021)
 489#define MPI2_EVENT_SAS_PHY_COUNTER                  (0x0022)
 490#define MPI2_EVENT_GPIO_INTERRUPT                   (0x0023)
 491#define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY         (0x0024)
 492#define MPI2_EVENT_SAS_QUIESCE                      (0x0025)
 493#define MPI2_EVENT_SAS_NOTIFY_PRIMITIVE             (0x0026)
 494#define MPI2_EVENT_TEMP_THRESHOLD                   (0x0027)
 495#define MPI2_EVENT_HOST_MESSAGE                     (0x0028)
 496#define MPI2_EVENT_MIN_PRODUCT_SPECIFIC             (0x006E)
 497#define MPI2_EVENT_MAX_PRODUCT_SPECIFIC             (0x007F)
 498
 499/* Log Entry Added Event data */
 500
 501/* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
 502#define MPI2_EVENT_DATA_LOG_DATA_LENGTH             (0x1C)
 503
 504typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
 505{
 506    U64         TimeStamp;                          /* 0x00 */
 507    U32         Reserved1;                          /* 0x08 */
 508    U16         LogSequence;                        /* 0x0C */
 509    U16         LogEntryQualifier;                  /* 0x0E */
 510    U8          VP_ID;                              /* 0x10 */
 511    U8          VF_ID;                              /* 0x11 */
 512    U16         Reserved2;                          /* 0x12 */
 513    U8          LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
 514} MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 515  MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 516  Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
 517
 518/* GPIO Interrupt Event data */
 519
 520typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT {
 521    U8          GPIONum;                            /* 0x00 */
 522    U8          Reserved1;                          /* 0x01 */
 523    U16         Reserved2;                          /* 0x02 */
 524} MPI2_EVENT_DATA_GPIO_INTERRUPT,
 525  MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT,
 526  Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t;
 527
 528/* Temperature Threshold Event data */
 529
 530typedef struct _MPI2_EVENT_DATA_TEMPERATURE {
 531        U16         Status;                             /* 0x00 */
 532        U8          SensorNum;                          /* 0x02 */
 533        U8          Reserved1;                          /* 0x03 */
 534        U16         CurrentTemperature;                 /* 0x04 */
 535        U16         Reserved2;                          /* 0x06 */
 536        U32         Reserved3;                          /* 0x08 */
 537        U32         Reserved4;                          /* 0x0C */
 538} MPI2_EVENT_DATA_TEMPERATURE,
 539MPI2_POINTER PTR_MPI2_EVENT_DATA_TEMPERATURE,
 540Mpi2EventDataTemperature_t, MPI2_POINTER pMpi2EventDataTemperature_t;
 541
 542/* Temperature Threshold Event data Status bits */
 543#define MPI2_EVENT_TEMPERATURE3_EXCEEDED            (0x0008)
 544#define MPI2_EVENT_TEMPERATURE2_EXCEEDED            (0x0004)
 545#define MPI2_EVENT_TEMPERATURE1_EXCEEDED            (0x0002)
 546#define MPI2_EVENT_TEMPERATURE0_EXCEEDED            (0x0001)
 547
 548
 549/* Host Message Event data */
 550
 551typedef struct _MPI2_EVENT_DATA_HOST_MESSAGE {
 552        U8          SourceVF_ID;                        /* 0x00 */
 553        U8          Reserved1;                          /* 0x01 */
 554        U16         Reserved2;                          /* 0x02 */
 555        U32         Reserved3;                          /* 0x04 */
 556        U32         HostData[1];                        /* 0x08 */
 557} MPI2_EVENT_DATA_HOST_MESSAGE, MPI2_POINTER PTR_MPI2_EVENT_DATA_HOST_MESSAGE,
 558Mpi2EventDataHostMessage_t, MPI2_POINTER pMpi2EventDataHostMessage_t;
 559
 560
 561/* Hard Reset Received Event data */
 562
 563typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
 564{
 565    U8                      Reserved1;                      /* 0x00 */
 566    U8                      Port;                           /* 0x01 */
 567    U16                     Reserved2;                      /* 0x02 */
 568} MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 569  MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 570  Mpi2EventDataHardResetReceived_t,
 571  MPI2_POINTER pMpi2EventDataHardResetReceived_t;
 572
 573/* Task Set Full Event data */
 574/*   this event is obsolete */
 575
 576typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
 577{
 578    U16                     DevHandle;                      /* 0x00 */
 579    U16                     CurrentDepth;                   /* 0x02 */
 580} MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
 581  Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
 582
 583
 584/* SAS Device Status Change Event data */
 585
 586typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 587{
 588    U16                     TaskTag;                        /* 0x00 */
 589    U8                      ReasonCode;                     /* 0x02 */
 590        U8                      PhysicalPort;                   /* 0x03 */
 591    U8                      ASC;                            /* 0x04 */
 592    U8                      ASCQ;                           /* 0x05 */
 593    U16                     DevHandle;                      /* 0x06 */
 594    U32                     Reserved2;                      /* 0x08 */
 595    U64                     SASAddress;                     /* 0x0C */
 596    U8                      LUN[8];                         /* 0x14 */
 597} MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 598  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 599  Mpi2EventDataSasDeviceStatusChange_t,
 600  MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
 601
 602/* SAS Device Status Change Event data ReasonCode values */
 603#define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA                           (0x05)
 604#define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED                          (0x07)
 605#define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET                (0x08)
 606#define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL                  (0x09)
 607#define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL              (0x0A)
 608#define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL              (0x0B)
 609#define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL                  (0x0C)
 610#define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION                   (0x0D)
 611#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET               (0x0E)
 612#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL              (0x0F)
 613#define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE                    (0x10)
 614#define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY       (0x11)
 615#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY   (0x12)
 616
 617
 618/* Integrated RAID Operation Status Event data */
 619
 620typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
 621{
 622    U16                     VolDevHandle;               /* 0x00 */
 623    U16                     Reserved1;                  /* 0x02 */
 624    U8                      RAIDOperation;              /* 0x04 */
 625    U8                      PercentComplete;            /* 0x05 */
 626    U16                     Reserved2;                  /* 0x06 */
 627    U32                     Resereved3;                 /* 0x08 */
 628} MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 629  MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 630  Mpi2EventDataIrOperationStatus_t,
 631  MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
 632
 633/* Integrated RAID Operation Status Event data RAIDOperation values */
 634#define MPI2_EVENT_IR_RAIDOP_RESYNC                     (0x00)
 635#define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION       (0x01)
 636#define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK          (0x02)
 637#define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT            (0x03)
 638#define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT       (0x04)
 639
 640
 641/* Integrated RAID Volume Event data */
 642
 643typedef struct _MPI2_EVENT_DATA_IR_VOLUME
 644{
 645    U16                     VolDevHandle;               /* 0x00 */
 646    U8                      ReasonCode;                 /* 0x02 */
 647    U8                      Reserved1;                  /* 0x03 */
 648    U32                     NewValue;                   /* 0x04 */
 649    U32                     PreviousValue;              /* 0x08 */
 650} MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
 651  Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
 652
 653/* Integrated RAID Volume Event data ReasonCode values */
 654#define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED        (0x01)
 655#define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED    (0x02)
 656#define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED           (0x03)
 657
 658
 659/* Integrated RAID Physical Disk Event data */
 660
 661typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
 662{
 663    U16                     Reserved1;                  /* 0x00 */
 664    U8                      ReasonCode;                 /* 0x02 */
 665    U8                      PhysDiskNum;                /* 0x03 */
 666    U16                     PhysDiskDevHandle;          /* 0x04 */
 667    U16                     Reserved2;                  /* 0x06 */
 668    U16                     Slot;                       /* 0x08 */
 669    U16                     EnclosureHandle;            /* 0x0A */
 670    U32                     NewValue;                   /* 0x0C */
 671    U32                     PreviousValue;              /* 0x10 */
 672} MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 673  MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 674  Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
 675
 676/* Integrated RAID Physical Disk Event data ReasonCode values */
 677#define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED      (0x01)
 678#define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED  (0x02)
 679#define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED         (0x03)
 680
 681
 682/* Integrated RAID Configuration Change List Event data */
 683
 684/*
 685 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 686 * one and check NumElements at runtime.
 687 */
 688#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
 689#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT          (1)
 690#endif
 691
 692typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
 693{
 694    U16                     ElementFlags;               /* 0x00 */
 695    U16                     VolDevHandle;               /* 0x02 */
 696    U8                      ReasonCode;                 /* 0x04 */
 697    U8                      PhysDiskNum;                /* 0x05 */
 698    U16                     PhysDiskDevHandle;          /* 0x06 */
 699} MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
 700  Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
 701
 702/* IR Configuration Change List Event data ElementFlags values */
 703#define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK   (0x000F)
 704#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT      (0x0000)
 705#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
 706#define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT    (0x0002)
 707
 708/* IR Configuration Change List Event data ReasonCode values */
 709#define MPI2_EVENT_IR_CHANGE_RC_ADDED                   (0x01)
 710#define MPI2_EVENT_IR_CHANGE_RC_REMOVED                 (0x02)
 711#define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE               (0x03)
 712#define MPI2_EVENT_IR_CHANGE_RC_HIDE                    (0x04)
 713#define MPI2_EVENT_IR_CHANGE_RC_UNHIDE                  (0x05)
 714#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED          (0x06)
 715#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED          (0x07)
 716#define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED              (0x08)
 717#define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED              (0x09)
 718
 719typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
 720{
 721    U8                              NumElements;        /* 0x00 */
 722    U8                              Reserved1;          /* 0x01 */
 723    U8                              Reserved2;          /* 0x02 */
 724    U8                              ConfigNum;          /* 0x03 */
 725    U32                             Flags;              /* 0x04 */
 726    MPI2_EVENT_IR_CONFIG_ELEMENT    ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];    /* 0x08 */
 727} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 728  MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 729  Mpi2EventDataIrConfigChangeList_t,
 730  MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
 731
 732/* IR Configuration Change List Event data Flags values */
 733#define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG   (0x00000001)
 734
 735
 736/* SAS Discovery Event data */
 737
 738typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
 739{
 740    U8                      Flags;                      /* 0x00 */
 741    U8                      ReasonCode;                 /* 0x01 */
 742    U8                      PhysicalPort;               /* 0x02 */
 743    U8                      Reserved1;                  /* 0x03 */
 744    U32                     DiscoveryStatus;            /* 0x04 */
 745} MPI2_EVENT_DATA_SAS_DISCOVERY,
 746  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
 747  Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
 748
 749/* SAS Discovery Event data Flags values */
 750#define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE                   (0x02)
 751#define MPI2_EVENT_SAS_DISC_IN_PROGRESS                     (0x01)
 752
 753/* SAS Discovery Event data ReasonCode values */
 754#define MPI2_EVENT_SAS_DISC_RC_STARTED                      (0x01)
 755#define MPI2_EVENT_SAS_DISC_RC_COMPLETED                    (0x02)
 756
 757/* SAS Discovery Event data DiscoveryStatus values */
 758#define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED            (0x80000000)
 759#define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED             (0x40000000)
 760#define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED               (0x20000000)
 761#define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED             (0x10000000)
 762#define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR             (0x08000000)
 763#define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE    (0x00008000)
 764#define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE            (0x00004000)
 765#define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN                (0x00002000)
 766#define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK        (0x00001000)
 767#define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE               (0x00000800)
 768#define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK                       (0x00000400)
 769#define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK                 (0x00000200)
 770#define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR                    (0x00000100)
 771#define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED              (0x00000080)
 772#define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST                  (0x00000040)
 773#define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES                (0x00000020)
 774#define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT                      (0x00000010)
 775#define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS                   (0x00000004)
 776#define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE             (0x00000002)
 777#define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED                    (0x00000001)
 778
 779
 780/* SAS Broadcast Primitive Event data */
 781
 782typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 783{
 784    U8                      PhyNum;                     /* 0x00 */
 785    U8                      Port;                       /* 0x01 */
 786    U8                      PortWidth;                  /* 0x02 */
 787    U8                      Primitive;                  /* 0x03 */
 788} MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 789  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 790  Mpi2EventDataSasBroadcastPrimitive_t,
 791  MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
 792
 793/* defines for the Primitive field */
 794#define MPI2_EVENT_PRIMITIVE_CHANGE                         (0x01)
 795#define MPI2_EVENT_PRIMITIVE_SES                            (0x02)
 796#define MPI2_EVENT_PRIMITIVE_EXPANDER                       (0x03)
 797#define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT             (0x04)
 798#define MPI2_EVENT_PRIMITIVE_RESERVED3                      (0x05)
 799#define MPI2_EVENT_PRIMITIVE_RESERVED4                      (0x06)
 800#define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED               (0x07)
 801#define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED               (0x08)
 802
 803/* SAS Notify Primitive Event data */
 804
 805typedef struct _MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE {
 806        U8                      PhyNum;                     /* 0x00 */
 807        U8                      Port;                       /* 0x01 */
 808        U8                      Reserved1;                  /* 0x02 */
 809        U8                      Primitive;                  /* 0x03 */
 810} MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
 811MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
 812Mpi2EventDataSasNotifyPrimitive_t,
 813MPI2_POINTER pMpi2EventDataSasNotifyPrimitive_t;
 814
 815/* defines for the Primitive field */
 816#define MPI2_EVENT_NOTIFY_ENABLE_SPINUP                     (0x01)
 817#define MPI2_EVENT_NOTIFY_POWER_LOSS_EXPECTED               (0x02)
 818#define MPI2_EVENT_NOTIFY_RESERVED1                         (0x03)
 819#define MPI2_EVENT_NOTIFY_RESERVED2                         (0x04)
 820
 821
 822/* SAS Initiator Device Status Change Event data */
 823
 824typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 825{
 826    U8                      ReasonCode;                 /* 0x00 */
 827    U8                      PhysicalPort;               /* 0x01 */
 828    U16                     DevHandle;                  /* 0x02 */
 829    U64                     SASAddress;                 /* 0x04 */
 830} MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 831  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 832  Mpi2EventDataSasInitDevStatusChange_t,
 833  MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
 834
 835/* SAS Initiator Device Status Change event ReasonCode values */
 836#define MPI2_EVENT_SAS_INIT_RC_ADDED                (0x01)
 837#define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING       (0x02)
 838
 839
 840/* SAS Initiator Device Table Overflow Event data */
 841
 842typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 843{
 844    U16                     MaxInit;                    /* 0x00 */
 845    U16                     CurrentInit;                /* 0x02 */
 846    U64                     SASAddress;                 /* 0x04 */
 847} MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 848  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 849  Mpi2EventDataSasInitTableOverflow_t,
 850  MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
 851
 852
 853/* SAS Topology Change List Event data */
 854
 855/*
 856 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 857 * one and check NumEntries at runtime.
 858 */
 859#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
 860#define MPI2_EVENT_SAS_TOPO_PHY_COUNT           (1)
 861#endif
 862
 863typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
 864{
 865    U16                     AttachedDevHandle;          /* 0x00 */
 866    U8                      LinkRate;                   /* 0x02 */
 867    U8                      PhyStatus;                  /* 0x03 */
 868} MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
 869  Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
 870
 871typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
 872{
 873    U16                             EnclosureHandle;            /* 0x00 */
 874    U16                             ExpanderDevHandle;          /* 0x02 */
 875    U8                              NumPhys;                    /* 0x04 */
 876    U8                              Reserved1;                  /* 0x05 */
 877    U16                             Reserved2;                  /* 0x06 */
 878    U8                              NumEntries;                 /* 0x08 */
 879    U8                              StartPhyNum;                /* 0x09 */
 880    U8                              ExpStatus;                  /* 0x0A */
 881    U8                              PhysicalPort;               /* 0x0B */
 882    MPI2_EVENT_SAS_TOPO_PHY_ENTRY   PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
 883} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 884  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 885  Mpi2EventDataSasTopologyChangeList_t,
 886  MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
 887
 888/* values for the ExpStatus field */
 889#define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER                  (0x00)
 890#define MPI2_EVENT_SAS_TOPO_ES_ADDED                        (0x01)
 891#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING               (0x02)
 892#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING                   (0x03)
 893#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING         (0x04)
 894
 895/* defines for the LinkRate field */
 896#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK                 (0xF0)
 897#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT                (4)
 898#define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK                    (0x0F)
 899#define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT                   (0)
 900
 901#define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE            (0x00)
 902#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED                 (0x01)
 903#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED           (0x02)
 904#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE            (0x03)
 905#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR                (0x04)
 906#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS        (0x05)
 907#define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY              (0x06)
 908#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5                     (0x08)
 909#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0                     (0x09)
 910#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0                     (0x0A)
 911
 912/* values for the PhyStatus field */
 913#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT                (0x80)
 914#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE             (0x10)
 915/* values for the PhyStatus ReasonCode sub-field */
 916#define MPI2_EVENT_SAS_TOPO_RC_MASK                         (0x0F)
 917#define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED                   (0x01)
 918#define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING          (0x02)
 919#define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED                  (0x03)
 920#define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE                    (0x04)
 921#define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING         (0x05)
 922
 923
 924/* SAS Enclosure Device Status Change Event data */
 925
 926typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
 927{
 928    U16                     EnclosureHandle;            /* 0x00 */
 929    U8                      ReasonCode;                 /* 0x02 */
 930    U8                      PhysicalPort;               /* 0x03 */
 931    U64                     EnclosureLogicalID;         /* 0x04 */
 932    U16                     NumSlots;                   /* 0x0C */
 933    U16                     StartSlot;                  /* 0x0E */
 934    U32                     PhyBits;                    /* 0x10 */
 935} MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 936  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 937  Mpi2EventDataSasEnclDevStatusChange_t,
 938  MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
 939
 940/* SAS Enclosure Device Status Change event ReasonCode values */
 941#define MPI2_EVENT_SAS_ENCL_RC_ADDED                (0x01)
 942#define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING       (0x02)
 943
 944
 945/* SAS PHY Counter Event data */
 946
 947typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
 948    U64         TimeStamp;          /* 0x00 */
 949    U32         Reserved1;          /* 0x08 */
 950    U8          PhyEventCode;       /* 0x0C */
 951    U8          PhyNum;             /* 0x0D */
 952    U16         Reserved2;          /* 0x0E */
 953    U32         PhyEventInfo;       /* 0x10 */
 954    U8          CounterType;        /* 0x14 */
 955    U8          ThresholdWindow;    /* 0x15 */
 956    U8          TimeUnits;          /* 0x16 */
 957    U8          Reserved3;          /* 0x17 */
 958    U32         EventThreshold;     /* 0x18 */
 959    U16         ThresholdFlags;     /* 0x1C */
 960    U16         Reserved4;          /* 0x1E */
 961} MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 962  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 963  Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t;
 964
 965/* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the
 966 * PhyEventCode field
 967 * use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the
 968 * CounterType field
 969 * use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the
 970 * TimeUnits field
 971 * use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the
 972 * ThresholdFlags field
 973 * */
 974
 975
 976/* SAS Quiesce Event data */
 977
 978typedef struct _MPI2_EVENT_DATA_SAS_QUIESCE {
 979    U8                      ReasonCode;                 /* 0x00 */
 980    U8                      Reserved1;                  /* 0x01 */
 981    U16                     Reserved2;                  /* 0x02 */
 982    U32                     Reserved3;                  /* 0x04 */
 983} MPI2_EVENT_DATA_SAS_QUIESCE,
 984  MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_QUIESCE,
 985  Mpi2EventDataSasQuiesce_t, MPI2_POINTER pMpi2EventDataSasQuiesce_t;
 986
 987/* SAS Quiesce Event data ReasonCode values */
 988#define MPI2_EVENT_SAS_QUIESCE_RC_STARTED                   (0x01)
 989#define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED                 (0x02)
 990
 991
 992/* Host Based Discovery Phy Event data */
 993
 994typedef struct _MPI2_EVENT_HBD_PHY_SAS {
 995    U8          Flags;                      /* 0x00 */
 996    U8          NegotiatedLinkRate;         /* 0x01 */
 997    U8          PhyNum;                     /* 0x02 */
 998    U8          PhysicalPort;               /* 0x03 */
 999    U32         Reserved1;                  /* 0x04 */
1000    U8          InitialFrame[28];           /* 0x08 */

1001} MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
1002  Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
1003
1004/* values for the Flags field */
1005#define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID        (0x02)
1006#define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME         (0x01)
1007
1008/* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for
1009 * the NegotiatedLinkRate field */
1010
1011typedef union _MPI2_EVENT_HBD_DESCRIPTOR {
1012    MPI2_EVENT_HBD_PHY_SAS      Sas;
1013} MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
1014  Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
1015
1016typedef struct _MPI2_EVENT_DATA_HBD_PHY {
1017    U8                          DescriptorType;     /* 0x00 */
1018    U8                          Reserved1;          /* 0x01 */
1019    U16                         Reserved2;          /* 0x02 */
1020    U32                         Reserved3;          /* 0x04 */
1021    MPI2_EVENT_HBD_DESCRIPTOR   Descriptor;         /* 0x08 */
1022} MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
1023  Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
1024
1025/* values for the DescriptorType field */
1026#define MPI2_EVENT_HBD_DT_SAS               (0x01)
1027
1028
1029
1030/****************************************************************************
1031*  EventAck message
1032****************************************************************************/
1033
1034/* EventAck Request message */
1035typedef struct _MPI2_EVENT_ACK_REQUEST
1036{
1037    U16                     Reserved1;                      /* 0x00 */
1038    U8                      ChainOffset;                    /* 0x02 */
1039    U8                      Function;                       /* 0x03 */
1040    U16                     Reserved2;                      /* 0x04 */
1041    U8                      Reserved3;                      /* 0x06 */
1042    U8                      MsgFlags;                       /* 0x07 */
1043    U8                      VP_ID;                          /* 0x08 */
1044    U8                      VF_ID;                          /* 0x09 */
1045    U16                     Reserved4;                      /* 0x0A */
1046    U16                     Event;                          /* 0x0C */
1047    U16                     Reserved5;                      /* 0x0E */
1048    U32                     EventContext;                   /* 0x10 */
1049} MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
1050  Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
1051
1052
1053/* EventAck Reply message */
1054typedef struct _MPI2_EVENT_ACK_REPLY
1055{
1056    U16                     Reserved1;                      /* 0x00 */
1057    U8                      MsgLength;                      /* 0x02 */
1058    U8                      Function;                       /* 0x03 */
1059    U16                     Reserved2;                      /* 0x04 */
1060    U8                      Reserved3;                      /* 0x06 */
1061    U8                      MsgFlags;                       /* 0x07 */
1062    U8                      VP_ID;                          /* 0x08 */
1063    U8                      VF_ID;                          /* 0x09 */
1064    U16                     Reserved4;                      /* 0x0A */
1065    U16                     Reserved5;                      /* 0x0C */
1066    U16                     IOCStatus;                      /* 0x0E */
1067    U32                     IOCLogInfo;                     /* 0x10 */
1068} MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
1069  Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
1070
1071
1072/****************************************************************************
1073*  SendHostMessage message
1074****************************************************************************/
1075
1076/* SendHostMessage Request message */
1077typedef struct _MPI2_SEND_HOST_MESSAGE_REQUEST {
1078        U16                     HostDataLength;                 /* 0x00 */
1079        U8                      ChainOffset;                    /* 0x02 */
1080        U8                      Function;                       /* 0x03 */
1081        U16                     Reserved1;                      /* 0x04 */
1082        U8                      Reserved2;                      /* 0x06 */
1083        U8                      MsgFlags;                       /* 0x07 */
1084        U8                      VP_ID;                          /* 0x08 */
1085        U8                      VF_ID;                          /* 0x09 */
1086        U16                     Reserved3;                      /* 0x0A */
1087        U8                      Reserved4;                      /* 0x0C */
1088        U8                      DestVF_ID;                      /* 0x0D */
1089        U16                     Reserved5;                      /* 0x0E */
1090        U32                     Reserved6;                      /* 0x10 */
1091        U32                     Reserved7;                      /* 0x14 */
1092        U32                     Reserved8;                      /* 0x18 */
1093        U32                     Reserved9;                      /* 0x1C */
1094        U32                     Reserved10;                     /* 0x20 */
1095        U32                     HostData[1];                    /* 0x24 */
1096} MPI2_SEND_HOST_MESSAGE_REQUEST,
1097MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REQUEST,
1098Mpi2SendHostMessageRequest_t, MPI2_POINTER pMpi2SendHostMessageRequest_t;
1099
1100
1101/* SendHostMessage Reply message */
1102typedef struct _MPI2_SEND_HOST_MESSAGE_REPLY {
1103        U16                     HostDataLength;                 /* 0x00 */
1104        U8                      MsgLength;                      /* 0x02 */
1105        U8                      Function;                       /* 0x03 */
1106        U16                     Reserved1;                      /* 0x04 */
1107        U8                      Reserved2;                      /* 0x06 */
1108        U8                      MsgFlags;                       /* 0x07 */
1109        U8                      VP_ID;                          /* 0x08 */
1110        U8                      VF_ID;                          /* 0x09 */
1111        U16                     Reserved3;                      /* 0x0A */
1112        U16                     Reserved4;                      /* 0x0C */
1113        U16                     IOCStatus;                      /* 0x0E */
1114        U32                     IOCLogInfo;                     /* 0x10 */
1115} MPI2_SEND_HOST_MESSAGE_REPLY, MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REPLY,
1116Mpi2SendHostMessageReply_t, MPI2_POINTER pMpi2SendHostMessageReply_t;
1117
1118
1119/****************************************************************************
1120*  FWDownload message
1121****************************************************************************/
1122
1123/* FWDownload Request message */
1124typedef struct _MPI2_FW_DOWNLOAD_REQUEST
1125{
1126    U8                      ImageType;                  /* 0x00 */
1127    U8                      Reserved1;                  /* 0x01 */
1128    U8                      ChainOffset;                /* 0x02 */
1129    U8                      Function;                   /* 0x03 */
1130    U16                     Reserved2;                  /* 0x04 */
1131    U8                      Reserved3;                  /* 0x06 */
1132    U8                      MsgFlags;                   /* 0x07 */
1133    U8                      VP_ID;                      /* 0x08 */
1134    U8                      VF_ID;                      /* 0x09 */
1135    U16                     Reserved4;                  /* 0x0A */
1136    U32                     TotalImageSize;             /* 0x0C */
1137    U32                     Reserved5;                  /* 0x10 */
1138    MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1139} MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
1140  Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
1141
1142#define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT   (0x01)
1143
1144#define MPI2_FW_DOWNLOAD_ITYPE_FW                   (0x01)
1145#define MPI2_FW_DOWNLOAD_ITYPE_BIOS                 (0x02)
1146#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING        (0x06)
1147#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1             (0x07)
1148#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2             (0x08)
1149#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID             (0x09)
1150#define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE             (0x0A)
1151#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK    (0x0B)
1152#define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
1153
1154/* FWDownload TransactionContext Element */
1155typedef struct _MPI2_FW_DOWNLOAD_TCSGE
1156{
1157    U8                      Reserved1;                  /* 0x00 */
1158    U8                      ContextSize;                /* 0x01 */
1159    U8                      DetailsLength;              /* 0x02 */
1160    U8                      Flags;                      /* 0x03 */
1161    U32                     Reserved2;                  /* 0x04 */
1162    U32                     ImageOffset;                /* 0x08 */
1163    U32                     ImageSize;                  /* 0x0C */
1164} MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
1165  Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
1166
1167/* FWDownload Reply message */
1168typedef struct _MPI2_FW_DOWNLOAD_REPLY
1169{
1170    U8                      ImageType;                  /* 0x00 */
1171    U8                      Reserved1;                  /* 0x01 */
1172    U8                      MsgLength;                  /* 0x02 */
1173    U8                      Function;                   /* 0x03 */
1174    U16                     Reserved2;                  /* 0x04 */
1175    U8                      Reserved3;                  /* 0x06 */
1176    U8                      MsgFlags;                   /* 0x07 */
1177    U8                      VP_ID;                      /* 0x08 */
1178    U8                      VF_ID;                      /* 0x09 */
1179    U16                     Reserved4;                  /* 0x0A */
1180    U16                     Reserved5;                  /* 0x0C */
1181    U16                     IOCStatus;                  /* 0x0E */
1182    U32                     IOCLogInfo;                 /* 0x10 */
1183} MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
1184  Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
1185
1186
1187/****************************************************************************
1188*  FWUpload message
1189****************************************************************************/
1190
1191/* FWUpload Request message */
1192typedef struct _MPI2_FW_UPLOAD_REQUEST
1193{
1194    U8                      ImageType;                  /* 0x00 */
1195    U8                      Reserved1;                  /* 0x01 */
1196    U8                      ChainOffset;                /* 0x02 */
1197    U8                      Function;                   /* 0x03 */
1198    U16                     Reserved2;                  /* 0x04 */
1199    U8                      Reserved3;                  /* 0x06 */
1200    U8                      MsgFlags;                   /* 0x07 */
1201    U8                      VP_ID;                      /* 0x08 */
1202    U8                      VF_ID;                      /* 0x09 */
1203    U16                     Reserved4;                  /* 0x0A */
1204    U32                     Reserved5;                  /* 0x0C */
1205    U32                     Reserved6;                  /* 0x10 */
1206    MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1207} MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
1208  Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
1209
1210#define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT         (0x00)
1211#define MPI2_FW_UPLOAD_ITYPE_FW_FLASH           (0x01)
1212#define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH         (0x02)
1213#define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP          (0x05)
1214#define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING      (0x06)
1215#define MPI2_FW_UPLOAD_ITYPE_CONFIG_1           (0x07)
1216#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2           (0x08)
1217#define MPI2_FW_UPLOAD_ITYPE_MEGARAID           (0x09)
1218#define MPI2_FW_UPLOAD_ITYPE_COMPLETE           (0x0A)
1219#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK  (0x0B)
1220
1221typedef struct _MPI2_FW_UPLOAD_TCSGE
1222{
1223    U8                      Reserved1;                  /* 0x00 */
1224    U8                      ContextSize;                /* 0x01 */
1225    U8                      DetailsLength;              /* 0x02 */
1226    U8                      Flags;                      /* 0x03 */
1227    U32                     Reserved2;                  /* 0x04 */
1228    U32                     ImageOffset;                /* 0x08 */
1229    U32                     ImageSize;                  /* 0x0C */
1230} MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
1231  Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
1232
1233/* FWUpload Reply message */
1234typedef struct _MPI2_FW_UPLOAD_REPLY
1235{
1236    U8                      ImageType;                  /* 0x00 */
1237    U8                      Reserved1;                  /* 0x01 */
1238    U8                      MsgLength;                  /* 0x02 */
1239    U8                      Function;                   /* 0x03 */
1240    U16                     Reserved2;                  /* 0x04 */
1241    U8                      Reserved3;                  /* 0x06 */
1242    U8                      MsgFlags;                   /* 0x07 */
1243    U8                      VP_ID;                      /* 0x08 */
1244    U8                      VF_ID;                      /* 0x09 */
1245    U16                     Reserved4;                  /* 0x0A */
1246    U16                     Reserved5;                  /* 0x0C */
1247    U16                     IOCStatus;                  /* 0x0E */
1248    U32                     IOCLogInfo;                 /* 0x10 */
1249    U32                     ActualImageSize;            /* 0x14 */
1250} MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
1251  Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
1252
1253
1254/* FW Image Header */
1255typedef struct _MPI2_FW_IMAGE_HEADER
1256{
1257    U32                     Signature;                  /* 0x00 */
1258    U32                     Signature0;                 /* 0x04 */
1259    U32                     Signature1;                 /* 0x08 */
1260    U32                     Signature2;                 /* 0x0C */
1261    MPI2_VERSION_UNION      MPIVersion;                 /* 0x10 */
1262    MPI2_VERSION_UNION      FWVersion;                  /* 0x14 */
1263    MPI2_VERSION_UNION      NVDATAVersion;              /* 0x18 */
1264    MPI2_VERSION_UNION      PackageVersion;             /* 0x1C */
1265    U16                     VendorID;                   /* 0x20 */
1266    U16                     ProductID;                  /* 0x22 */
1267    U16                     ProtocolFlags;              /* 0x24 */
1268    U16                     Reserved26;                 /* 0x26 */
1269    U32                     IOCCapabilities;            /* 0x28 */
1270    U32                     ImageSize;                  /* 0x2C */
1271    U32                     NextImageHeaderOffset;      /* 0x30 */
1272    U32                     Checksum;                   /* 0x34 */
1273    U32                     Reserved38;                 /* 0x38 */
1274    U32                     Reserved3C;                 /* 0x3C */
1275    U32                     Reserved40;                 /* 0x40 */
1276    U32                     Reserved44;                 /* 0x44 */
1277    U32                     Reserved48;                 /* 0x48 */
1278    U32                     Reserved4C;                 /* 0x4C */
1279    U32                     Reserved50;                 /* 0x50 */
1280    U32                     Reserved54;                 /* 0x54 */
1281    U32                     Reserved58;                 /* 0x58 */
1282    U32                     Reserved5C;                 /* 0x5C */
1283    U32                     Reserved60;                 /* 0x60 */
1284    U32                     FirmwareVersionNameWhat;    /* 0x64 */
1285    U8                      FirmwareVersionName[32];    /* 0x68 */
1286    U32                     VendorNameWhat;             /* 0x88 */
1287    U8                      VendorName[32];             /* 0x8C */
1288    U32                     PackageNameWhat;            /* 0x88 */
1289    U8                      PackageName[32];            /* 0x8C */
1290    U32                     ReservedD0;                 /* 0xD0 */
1291    U32                     ReservedD4;                 /* 0xD4 */
1292    U32                     ReservedD8;                 /* 0xD8 */
1293    U32                     ReservedDC;                 /* 0xDC */
1294    U32                     ReservedE0;                 /* 0xE0 */
1295    U32                     ReservedE4;                 /* 0xE4 */
1296    U32                     ReservedE8;                 /* 0xE8 */
1297    U32                     ReservedEC;                 /* 0xEC */
1298    U32                     ReservedF0;                 /* 0xF0 */
1299    U32                     ReservedF4;                 /* 0xF4 */
1300    U32                     ReservedF8;                 /* 0xF8 */
1301    U32                     ReservedFC;                 /* 0xFC */
1302} MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
1303  Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
1304
1305/* Signature field */
1306#define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
1307#define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
1308#define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
1309
1310/* Signature0 field */
1311#define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
1312#define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
1313
1314/* Signature1 field */
1315#define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
1316#define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
1317
1318/* Signature2 field */
1319#define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
1320#define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
1321
1322
1323/* defines for using the ProductID field */
1324#define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
1325#define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
1326
1327#define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
1328#define MPI2_FW_HEADER_PID_PROD_A                       (0x0000)
1329#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI   (0x0200)
1330#define MPI2_FW_HEADER_PID_PROD_IR_SCSI                 (0x0700)
1331
1332
1333#define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
1334/* SAS */
1335#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0013)
1336#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS      (0x0014)
1337
1338/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1339
1340/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1341
1342
1343#define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
1344#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
1345#define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
1346
1347#define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
1348
1349#define MPI2_FW_HEADER_SIZE                     (0x100)
1350
1351
1352/* Extended Image Header */
1353typedef struct _MPI2_EXT_IMAGE_HEADER
1354
1355{
1356    U8                      ImageType;                  /* 0x00 */
1357    U8                      Reserved1;                  /* 0x01 */
1358    U16                     Reserved2;                  /* 0x02 */
1359    U32                     Checksum;                   /* 0x04 */
1360    U32                     ImageSize;                  /* 0x08 */
1361    U32                     NextImageHeaderOffset;      /* 0x0C */
1362    U32                     PackageVersion;             /* 0x10 */
1363    U32                     Reserved3;                  /* 0x14 */
1364    U32                     Reserved4;                  /* 0x18 */
1365    U32                     Reserved5;                  /* 0x1C */
1366    U8                      IdentifyString[32];         /* 0x20 */
1367} MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
1368  Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
1369
1370/* useful offsets */
1371#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
1372#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
1373#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
1374
1375#define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
1376
1377/* defines for the ImageType field */
1378#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED                         (0x00)
1379#define MPI2_EXT_IMAGE_TYPE_FW                                          (0x01)
1380#define MPI2_EXT_IMAGE_TYPE_NVDATA                                      (0x03)
1381#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER                          (0x04)
1382#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION                      (0x05)
1383#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT                        (0x06)
1384#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES           (0x07)
1385#define MPI2_EXT_IMAGE_TYPE_MEGARAID                            (0x08)
1386#define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
1387#define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xFF)
1388#define MPI2_EXT_IMAGE_TYPE_MAX                   \
1389        (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC)      /* deprecated */
1390
1391
1392
1393/* FLASH Layout Extended Image Data */
1394
1395/*
1396 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1397 * one and check RegionsPerLayout at runtime.
1398 */
1399#ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1400#define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
1401#endif
1402
1403/*
1404 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1405 * one and check NumberOfLayouts at runtime.
1406 */
1407#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1408#define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
1409#endif
1410
1411typedef struct _MPI2_FLASH_REGION
1412{
1413    U8                      RegionType;                 /* 0x00 */
1414    U8                      Reserved1;                  /* 0x01 */
1415    U16                     Reserved2;                  /* 0x02 */
1416    U32                     RegionOffset;               /* 0x04 */
1417    U32                     RegionSize;                 /* 0x08 */
1418    U32                     Reserved3;                  /* 0x0C */
1419} MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
1420  Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
1421
1422typedef struct _MPI2_FLASH_LAYOUT
1423{
1424    U32                     FlashSize;                  /* 0x00 */
1425    U32                     Reserved1;                  /* 0x04 */
1426    U32                     Reserved2;                  /* 0x08 */
1427    U32                     Reserved3;                  /* 0x0C */
1428    MPI2_FLASH_REGION       Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
1429} MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
1430  Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
1431
1432typedef struct _MPI2_FLASH_LAYOUT_DATA
1433{
1434    U8                      ImageRevision;              /* 0x00 */
1435    U8                      Reserved1;                  /* 0x01 */
1436    U8                      SizeOfRegion;               /* 0x02 */
1437    U8                      Reserved2;                  /* 0x03 */
1438    U16                     NumberOfLayouts;            /* 0x04 */
1439    U16                     RegionsPerLayout;           /* 0x06 */
1440    U16                     MinimumSectorAlignment;     /* 0x08 */
1441    U16                     Reserved3;                  /* 0x0A */
1442    U32                     Reserved4;                  /* 0x0C */
1443    MPI2_FLASH_LAYOUT       Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
1444} MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
1445  Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
1446
1447/* defines for the RegionType field */
1448#define MPI2_FLASH_REGION_UNUSED                (0x00)
1449#define MPI2_FLASH_REGION_FIRMWARE              (0x01)
1450#define MPI2_FLASH_REGION_BIOS                  (0x02)
1451#define MPI2_FLASH_REGION_NVDATA                (0x03)
1452#define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
1453#define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
1454#define MPI2_FLASH_REGION_CONFIG_1              (0x07)
1455#define MPI2_FLASH_REGION_CONFIG_2              (0x08)
1456#define MPI2_FLASH_REGION_MEGARAID              (0x09)
1457#define MPI2_FLASH_REGION_INIT                  (0x0A)
1458
1459/* ImageRevision */
1460#define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
1461
1462
1463
1464/* Supported Devices Extended Image Data */
1465
1466/*
1467 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1468 * one and check NumberOfDevices at runtime.
1469 */
1470#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1471#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
1472#endif
1473
1474typedef struct _MPI2_SUPPORTED_DEVICE
1475{
1476    U16                     DeviceID;                   /* 0x00 */
1477    U16                     VendorID;                   /* 0x02 */
1478    U16                     DeviceIDMask;               /* 0x04 */
1479    U16                     Reserved1;                  /* 0x06 */
1480    U8                      LowPCIRev;                  /* 0x08 */
1481    U8                      HighPCIRev;                 /* 0x09 */
1482    U16                     Reserved2;                  /* 0x0A */
1483    U32                     Reserved3;                  /* 0x0C */
1484} MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
1485  Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
1486
1487typedef struct _MPI2_SUPPORTED_DEVICES_DATA
1488{
1489    U8                      ImageRevision;              /* 0x00 */
1490    U8                      Reserved1;                  /* 0x01 */
1491    U8                      NumberOfDevices;            /* 0x02 */
1492    U8                      Reserved2;                  /* 0x03 */
1493    U32                     Reserved3;                  /* 0x04 */
1494    MPI2_SUPPORTED_DEVICE   SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
1495} MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
1496  Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
1497
1498/* ImageRevision */
1499#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
1500
1501
1502/* Init Extended Image Data */
1503
1504typedef struct _MPI2_INIT_IMAGE_FOOTER
1505
1506{
1507    U32                     BootFlags;                  /* 0x00 */
1508    U32                     ImageSize;                  /* 0x04 */
1509    U32                     Signature0;                 /* 0x08 */
1510    U32                     Signature1;                 /* 0x0C */
1511    U32                     Signature2;                 /* 0x10 */
1512    U32                     ResetVector;                /* 0x14 */
1513} MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
1514  Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
1515
1516/* defines for the BootFlags field */
1517#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
1518
1519/* defines for the ImageSize field */
1520#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
1521
1522/* defines for the Signature0 field */
1523#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
1524#define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
1525
1526/* defines for the Signature1 field */
1527#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
1528#define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
1529
1530/* defines for the Signature2 field */
1531#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
1532#define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
1533
1534/* Signature fields as individual bytes */
1535#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
1536#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
1537#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
1538#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
1539
1540#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
1541#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
1542#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
1543#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
1544
1545#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
1546#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
1547#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
1548#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
1549
1550/* defines for the ResetVector field */
1551#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
1552
1553
1554/****************************************************************************
1555*  PowerManagementControl message
1556****************************************************************************/
1557
1558/* PowerManagementControl Request message */
1559typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST {
1560    U8                      Feature;                    /* 0x00 */
1561    U8                      Reserved1;                  /* 0x01 */
1562    U8                      ChainOffset;                /* 0x02 */
1563    U8                      Function;                   /* 0x03 */
1564    U16                     Reserved2;                  /* 0x04 */
1565    U8                      Reserved3;                  /* 0x06 */
1566    U8                      MsgFlags;                   /* 0x07 */
1567    U8                      VP_ID;                      /* 0x08 */
1568    U8                      VF_ID;                      /* 0x09 */
1569    U16                     Reserved4;                  /* 0x0A */
1570    U8                      Parameter1;                 /* 0x0C */
1571    U8                      Parameter2;                 /* 0x0D */
1572    U8                      Parameter3;                 /* 0x0E */
1573    U8                      Parameter4;                 /* 0x0F */
1574    U32                     Reserved5;                  /* 0x10 */
1575    U32                     Reserved6;                  /* 0x14 */
1576} MPI2_PWR_MGMT_CONTROL_REQUEST, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REQUEST,
1577  Mpi2PwrMgmtControlRequest_t, MPI2_POINTER pMpi2PwrMgmtControlRequest_t;
1578
1579/* defines for the Feature field */
1580#define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND       (0x01)
1581#define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION   (0x02)
1582#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK               (0x03) /* obsolete */
1583#define MPI2_PM_CONTROL_FEATURE_IOC_SPEED               (0x04)
1584#define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC    (0x80)
1585#define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC    (0xFF)
1586
1587/* parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */
1588/* Parameter1 contains a PHY number */
1589/* Parameter2 indicates power condition action using these defines */
1590#define MPI2_PM_CONTROL_PARAM2_PARTIAL                  (0x01)
1591#define MPI2_PM_CONTROL_PARAM2_SLUMBER                  (0x02)
1592#define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT            (0x03)
1593/* Parameter3 and Parameter4 are reserved */
1594
1595/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION
1596 *  Feature */
1597/* Parameter1 contains SAS port width modulation group number */
1598/* Parameter2 indicates IOC action using these defines */
1599#define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP        (0x01)
1600#define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION        (0x02)
1601#define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP     (0x03)
1602/* Parameter3 indicates desired modulation level using these defines */
1603#define MPI2_PM_CONTROL_PARAM3_25_PERCENT               (0x00)
1604#define MPI2_PM_CONTROL_PARAM3_50_PERCENT               (0x01)
1605#define MPI2_PM_CONTROL_PARAM3_75_PERCENT               (0x02)
1606#define MPI2_PM_CONTROL_PARAM3_100_PERCENT              (0x03)
1607/* Parameter4 is reserved */
1608
1609/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
1610/* Parameter1 indicates desired PCIe link speed using these defines */
1611#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS            (0x00) /* obsolete */
1612#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS            (0x01) /* obsolete */
1613#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS            (0x02) /* obsolete */
1614/* Parameter2 indicates desired PCIe link width using these defines */
1615#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1                 (0x01) /* obsolete */
1616#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2                 (0x02) /* obsolete */
1617#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4                 (0x04) /* obsolete */
1618#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8                 (0x08) /* obsolete */
1619/* Parameter3 and Parameter4 are reserved */
1620
1621/* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */
1622/* Parameter1 indicates desired IOC hardware clock speed using these defines */
1623#define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED           (0x01)
1624#define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED           (0x02)
1625#define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED        (0x04)
1626#define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED         (0x08)
1627/* Parameter2, Parameter3, and Parameter4 are reserved */
1628
1629
1630/* PowerManagementControl Reply message */
1631typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY {
1632    U8                      Feature;                    /* 0x00 */
1633    U8                      Reserved1;                  /* 0x01 */
1634    U8                      MsgLength;                  /* 0x02 */
1635    U8                      Function;                   /* 0x03 */
1636    U16                     Reserved2;                  /* 0x04 */
1637    U8                      Reserved3;                  /* 0x06 */
1638    U8                      MsgFlags;                   /* 0x07 */
1639    U8                      VP_ID;                      /* 0x08 */
1640    U8                      VF_ID;                      /* 0x09 */
1641    U16                     Reserved4;                  /* 0x0A */
1642    U16                     Reserved5;                  /* 0x0C */
1643    U16                     IOCStatus;                  /* 0x0E */
1644    U32                     IOCLogInfo;                 /* 0x10 */
1645} MPI2_PWR_MGMT_CONTROL_REPLY, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
1646  Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t;
1647
1648
1649#endif
1650
1651