linux/drivers/scsi/pm8001/pm8001_sas.h
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   1/*
   2 * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
   3 *
   4 * Copyright (c) 2008-2009 USI Co., Ltd.
   5 * All rights reserved.
   6 *
   7 * Redistribution and use in source and binary forms, with or without
   8 * modification, are permitted provided that the following conditions
   9 * are met:
  10 * 1. Redistributions of source code must retain the above copyright
  11 *    notice, this list of conditions, and the following disclaimer,
  12 *    without modification.
  13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14 *    substantially similar to the "NO WARRANTY" disclaimer below
  15 *    ("Disclaimer") and any redistribution must be conditioned upon
  16 *    including a substantially similar Disclaimer requirement for further
  17 *    binary redistribution.
  18 * 3. Neither the names of the above-listed copyright holders nor the names
  19 *    of any contributors may be used to endorse or promote products derived
  20 *    from this software without specific prior written permission.
  21 *
  22 * Alternatively, this software may be distributed under the terms of the
  23 * GNU General Public License ("GPL") version 2 as published by the Free
  24 * Software Foundation.
  25 *
  26 * NO WARRANTY
  27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37 * POSSIBILITY OF SUCH DAMAGES.
  38 *
  39 */
  40
  41#ifndef _PM8001_SAS_H_
  42#define _PM8001_SAS_H_
  43
  44#include <linux/kernel.h>
  45#include <linux/module.h>
  46#include <linux/spinlock.h>
  47#include <linux/delay.h>
  48#include <linux/types.h>
  49#include <linux/ctype.h>
  50#include <linux/dma-mapping.h>
  51#include <linux/pci.h>
  52#include <linux/interrupt.h>
  53#include <linux/workqueue.h>
  54#include <scsi/libsas.h>
  55#include <scsi/scsi_tcq.h>
  56#include <scsi/sas_ata.h>
  57#include <linux/atomic.h>
  58#include "pm8001_defs.h"
  59
  60#define DRV_NAME                "pm80xx"
  61#define DRV_VERSION             "0.1.37"
  62#define PM8001_FAIL_LOGGING     0x01 /* Error message logging */
  63#define PM8001_INIT_LOGGING     0x02 /* driver init logging */
  64#define PM8001_DISC_LOGGING     0x04 /* discovery layer logging */
  65#define PM8001_IO_LOGGING       0x08 /* I/O path logging */
  66#define PM8001_EH_LOGGING       0x10 /* libsas EH function logging*/
  67#define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
  68#define PM8001_MSG_LOGGING      0x40 /* misc message logging */
  69#define pm8001_printk(format, arg...)   printk(KERN_INFO "pm80xx %s %d:" \
  70                        format, __func__, __LINE__, ## arg)
  71#define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD)   \
  72do {                                            \
  73        if (unlikely(HBA->logging_level & LEVEL))       \
  74                do {                                    \
  75                        CMD;                            \
  76                } while (0);                            \
  77} while (0);
  78
  79#define PM8001_EH_DBG(HBA, CMD)                 \
  80        PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
  81
  82#define PM8001_INIT_DBG(HBA, CMD)               \
  83        PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
  84
  85#define PM8001_DISC_DBG(HBA, CMD)               \
  86        PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
  87
  88#define PM8001_IO_DBG(HBA, CMD)         \
  89        PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
  90
  91#define PM8001_FAIL_DBG(HBA, CMD)               \
  92        PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
  93
  94#define PM8001_IOCTL_DBG(HBA, CMD)              \
  95        PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
  96
  97#define PM8001_MSG_DBG(HBA, CMD)                \
  98        PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
  99
 100
 101#define PM8001_USE_TASKLET
 102#define PM8001_USE_MSIX
 103#define PM8001_READ_VPD
 104
 105
 106#define DEV_IS_EXPANDER(type)   ((type == SAS_EDGE_EXPANDER_DEVICE) || (type == SAS_FANOUT_EXPANDER_DEVICE))
 107
 108#define PM8001_NAME_LENGTH              32/* generic length of strings */
 109extern struct list_head hba_list;
 110extern const struct pm8001_dispatch pm8001_8001_dispatch;
 111extern const struct pm8001_dispatch pm8001_80xx_dispatch;
 112
 113struct pm8001_hba_info;
 114struct pm8001_ccb_info;
 115struct pm8001_device;
 116/* define task management IU */
 117struct pm8001_tmf_task {
 118        u8      tmf;
 119        u32     tag_of_task_to_be_managed;
 120};
 121struct pm8001_ioctl_payload {
 122        u32     signature;
 123        u16     major_function;
 124        u16     minor_function;
 125        u16     length;
 126        u16     status;
 127        u16     offset;
 128        u16     id;
 129        u8      *func_specific;
 130};
 131
 132struct pm8001_dispatch {
 133        char *name;
 134        int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
 135        int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
 136        void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
 137        int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
 138        void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
 139        irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 140        u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
 141        int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 142        void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 143        void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 144        void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
 145        int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
 146                struct pm8001_ccb_info *ccb);
 147        int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
 148                struct pm8001_ccb_info *ccb);
 149        int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
 150                struct pm8001_ccb_info *ccb);
 151        int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 152        int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 153        int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
 154                struct pm8001_device *pm8001_dev, u32 flag);
 155        int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 156        int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
 157                u32 phy_id, u32 phy_op);
 158        int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
 159                struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
 160                u32 cmd_tag);
 161        int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
 162                struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
 163        int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 164        int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 165        int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
 166                void *payload);
 167        int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
 168                struct pm8001_device *pm8001_dev, u32 state);
 169        int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
 170                u32 state);
 171        int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
 172                u32 state);
 173        int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
 174};
 175
 176struct pm8001_chip_info {
 177        u32     encrypt;
 178        u32     n_phy;
 179        const struct pm8001_dispatch    *dispatch;
 180};
 181#define PM8001_CHIP_DISP        (pm8001_ha->chip->dispatch)
 182
 183struct pm8001_port {
 184        struct asd_sas_port     sas_port;
 185        u8                      port_attached;
 186        u8                      wide_port_phymap;
 187        u8                      port_state;
 188        struct list_head        list;
 189};
 190
 191struct pm8001_phy {
 192        struct pm8001_hba_info  *pm8001_ha;
 193        struct pm8001_port      *port;
 194        struct asd_sas_phy      sas_phy;
 195        struct sas_identify     identify;
 196        struct scsi_device      *sdev;
 197        u64                     dev_sas_addr;
 198        u32                     phy_type;
 199        struct completion       *enable_completion;
 200        u32                     frame_rcvd_size;
 201        u8                      frame_rcvd[32];
 202        u8                      phy_attached;
 203        u8                      phy_state;
 204        enum sas_linkrate       minimum_linkrate;
 205        enum sas_linkrate       maximum_linkrate;
 206};
 207
 208struct pm8001_device {
 209        enum sas_device_type    dev_type;
 210        struct domain_device    *sas_device;
 211        u32                     attached_phy;
 212        u32                     id;
 213        struct completion       *dcompletion;
 214        struct completion       *setds_completion;
 215        u32                     device_id;
 216        u32                     running_req;
 217};
 218
 219struct pm8001_prd_imt {
 220        __le32                  len;
 221        __le32                  e;
 222};
 223
 224struct pm8001_prd {
 225        __le64                  addr;           /* 64-bit buffer address */
 226        struct pm8001_prd_imt   im_len;         /* 64-bit length */
 227} __attribute__ ((packed));
 228/*
 229 * CCB(Command Control Block)
 230 */
 231struct pm8001_ccb_info {
 232        struct list_head        entry;
 233        struct sas_task         *task;
 234        u32                     n_elem;
 235        u32                     ccb_tag;
 236        dma_addr_t              ccb_dma_handle;
 237        struct pm8001_device    *device;
 238        struct pm8001_prd       buf_prd[PM8001_MAX_DMA_SG];
 239        struct fw_control_ex    *fw_control_context;
 240        u8                      open_retry;
 241};
 242
 243struct mpi_mem {
 244        void                    *virt_ptr;
 245        dma_addr_t              phys_addr;
 246        u32                     phys_addr_hi;
 247        u32                     phys_addr_lo;
 248        u32                     total_len;
 249        u32                     num_elements;
 250        u32                     element_size;
 251        u32                     alignment;
 252};
 253
 254struct mpi_mem_req {
 255        /* The number of element in the  mpiMemory array */
 256        u32                     count;
 257        /* The array of structures that define memroy regions*/
 258        struct mpi_mem          region[USI_MAX_MEMCNT];
 259};
 260
 261struct encrypt {
 262        u32     cipher_mode;
 263        u32     sec_mode;
 264        u32     status;
 265        u32     flag;
 266};
 267
 268struct sas_phy_attribute_table {
 269        u32     phystart1_16[16];
 270        u32     outbound_hw_event_pid1_16[16];
 271};
 272
 273union main_cfg_table {
 274        struct {
 275        u32                     signature;
 276        u32                     interface_rev;
 277        u32                     firmware_rev;
 278        u32                     max_out_io;
 279        u32                     max_sgl;
 280        u32                     ctrl_cap_flag;
 281        u32                     gst_offset;
 282        u32                     inbound_queue_offset;
 283        u32                     outbound_queue_offset;
 284        u32                     inbound_q_nppd_hppd;
 285        u32                     outbound_hw_event_pid0_3;
 286        u32                     outbound_hw_event_pid4_7;
 287        u32                     outbound_ncq_event_pid0_3;
 288        u32                     outbound_ncq_event_pid4_7;
 289        u32                     outbound_tgt_ITNexus_event_pid0_3;
 290        u32                     outbound_tgt_ITNexus_event_pid4_7;
 291        u32                     outbound_tgt_ssp_event_pid0_3;
 292        u32                     outbound_tgt_ssp_event_pid4_7;
 293        u32                     outbound_tgt_smp_event_pid0_3;
 294        u32                     outbound_tgt_smp_event_pid4_7;
 295        u32                     upper_event_log_addr;
 296        u32                     lower_event_log_addr;
 297        u32                     event_log_size;
 298        u32                     event_log_option;
 299        u32                     upper_iop_event_log_addr;
 300        u32                     lower_iop_event_log_addr;
 301        u32                     iop_event_log_size;
 302        u32                     iop_event_log_option;
 303        u32                     fatal_err_interrupt;
 304        u32                     fatal_err_dump_offset0;
 305        u32                     fatal_err_dump_length0;
 306        u32                     fatal_err_dump_offset1;
 307        u32                     fatal_err_dump_length1;
 308        u32                     hda_mode_flag;
 309        u32                     anolog_setup_table_offset;
 310        u32                     rsvd[4];
 311        } pm8001_tbl;
 312
 313        struct {
 314        u32                     signature;
 315        u32                     interface_rev;
 316        u32                     firmware_rev;
 317        u32                     max_out_io;
 318        u32                     max_sgl;
 319        u32                     ctrl_cap_flag;
 320        u32                     gst_offset;
 321        u32                     inbound_queue_offset;
 322        u32                     outbound_queue_offset;
 323        u32                     inbound_q_nppd_hppd;
 324        u32                     rsvd[8];
 325        u32                     crc_core_dump;
 326        u32                     rsvd1;
 327        u32                     upper_event_log_addr;
 328        u32                     lower_event_log_addr;
 329        u32                     event_log_size;
 330        u32                     event_log_severity;
 331        u32                     upper_pcs_event_log_addr;
 332        u32                     lower_pcs_event_log_addr;
 333        u32                     pcs_event_log_size;
 334        u32                     pcs_event_log_severity;
 335        u32                     fatal_err_interrupt;
 336        u32                     fatal_err_dump_offset0;
 337        u32                     fatal_err_dump_length0;
 338        u32                     fatal_err_dump_offset1;
 339        u32                     fatal_err_dump_length1;
 340        u32                     gpio_led_mapping;
 341        u32                     analog_setup_table_offset;
 342        u32                     int_vec_table_offset;
 343        u32                     phy_attr_table_offset;
 344        u32                     port_recovery_timer;
 345        u32                     interrupt_reassertion_delay;
 346        } pm80xx_tbl;
 347};
 348
 349union general_status_table {
 350        struct {
 351        u32                     gst_len_mpistate;
 352        u32                     iq_freeze_state0;
 353        u32                     iq_freeze_state1;
 354        u32                     msgu_tcnt;
 355        u32                     iop_tcnt;
 356        u32                     rsvd;
 357        u32                     phy_state[8];
 358        u32                     gpio_input_val;
 359        u32                     rsvd1[2];
 360        u32                     recover_err_info[8];
 361        } pm8001_tbl;
 362        struct {
 363        u32                     gst_len_mpistate;
 364        u32                     iq_freeze_state0;
 365        u32                     iq_freeze_state1;
 366        u32                     msgu_tcnt;
 367        u32                     iop_tcnt;
 368        u32                     rsvd[9];
 369        u32                     gpio_input_val;
 370        u32                     rsvd1[2];
 371        u32                     recover_err_info[8];
 372        } pm80xx_tbl;
 373};
 374struct inbound_queue_table {
 375        u32                     element_pri_size_cnt;
 376        u32                     upper_base_addr;
 377        u32                     lower_base_addr;
 378        u32                     ci_upper_base_addr;
 379        u32                     ci_lower_base_addr;
 380        u32                     pi_pci_bar;
 381        u32                     pi_offset;
 382        u32                     total_length;
 383        void                    *base_virt;
 384        void                    *ci_virt;
 385        u32                     reserved;
 386        __le32                  consumer_index;
 387        u32                     producer_idx;
 388};
 389struct outbound_queue_table {
 390        u32                     element_size_cnt;
 391        u32                     upper_base_addr;
 392        u32                     lower_base_addr;
 393        void                    *base_virt;
 394        u32                     pi_upper_base_addr;
 395        u32                     pi_lower_base_addr;
 396        u32                     ci_pci_bar;
 397        u32                     ci_offset;
 398        u32                     total_length;
 399        void                    *pi_virt;
 400        u32                     interrup_vec_cnt_delay;
 401        u32                     dinterrup_to_pci_offset;
 402        __le32                  producer_index;
 403        u32                     consumer_idx;
 404};
 405struct pm8001_hba_memspace {
 406        void __iomem            *memvirtaddr;
 407        u64                     membase;
 408        u32                     memsize;
 409};
 410struct pm8001_hba_info {
 411        char                    name[PM8001_NAME_LENGTH];
 412        struct list_head        list;
 413        unsigned long           flags;
 414        spinlock_t              lock;/* host-wide lock */
 415        struct pci_dev          *pdev;/* our device */
 416        struct device           *dev;
 417        struct pm8001_hba_memspace io_mem[6];
 418        struct mpi_mem_req      memoryMap;
 419        struct encrypt          encrypt_info; /* support encryption */
 420        void __iomem    *msg_unit_tbl_addr;/*Message Unit Table Addr*/
 421        void __iomem    *main_cfg_tbl_addr;/*Main Config Table Addr*/
 422        void __iomem    *general_stat_tbl_addr;/*General Status Table Addr*/
 423        void __iomem    *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
 424        void __iomem    *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
 425        void __iomem    *pspa_q_tbl_addr;
 426                        /*MPI SAS PHY attributes Queue Config Table Addr*/
 427        void __iomem    *ivt_tbl_addr; /*MPI IVT Table Addr */
 428        union main_cfg_table    main_cfg_tbl;
 429        union general_status_table      gs_tbl;
 430        struct inbound_queue_table      inbnd_q_tbl[PM8001_MAX_SPCV_INB_NUM];
 431        struct outbound_queue_table     outbnd_q_tbl[PM8001_MAX_SPCV_OUTB_NUM];
 432        struct sas_phy_attribute_table  phy_attr_table;
 433                                        /* MPI SAS PHY attributes */
 434        u8                      sas_addr[SAS_ADDR_SIZE];
 435        struct sas_ha_struct    *sas;/* SCSI/SAS glue */
 436        struct Scsi_Host        *shost;
 437        u32                     chip_id;
 438        const struct pm8001_chip_info   *chip;
 439        struct completion       *nvmd_completion;
 440        int                     tags_num;
 441        unsigned long           *tags;
 442        struct pm8001_phy       phy[PM8001_MAX_PHYS];
 443        struct pm8001_port      port[PM8001_MAX_PHYS];
 444        u32                     id;
 445        u32                     irq;
 446        u32                     iomb_size; /* SPC and SPCV IOMB size */
 447        struct pm8001_device    *devices;
 448        struct pm8001_ccb_info  *ccb_info;
 449#ifdef PM8001_USE_MSIX
 450        struct msix_entry       msix_entries[PM8001_MAX_MSIX_VEC];
 451                                        /*for msi-x interrupt*/
 452        int                     number_of_intr;/*will be used in remove()*/
 453#endif
 454#ifdef PM8001_USE_TASKLET
 455        struct tasklet_struct   tasklet;
 456#endif
 457        u32                     logging_level;
 458        u32                     fw_status;
 459        u32                     smp_exp_mode;
 460        u32                     int_vector;
 461        const struct firmware   *fw_image;
 462        u8                      outq[PM8001_MAX_MSIX_VEC];
 463};
 464
 465struct pm8001_work {
 466        struct work_struct work;
 467        struct pm8001_hba_info *pm8001_ha;
 468        void *data;
 469        int handler;
 470};
 471
 472struct pm8001_fw_image_header {
 473        u8 vender_id[8];
 474        u8 product_id;
 475        u8 hardware_rev;
 476        u8 dest_partition;
 477        u8 reserved;
 478        u8 fw_rev[4];
 479        __be32  image_length;
 480        __be32 image_crc;
 481        __be32 startup_entry;
 482} __attribute__((packed, aligned(4)));
 483
 484
 485/**
 486 * FW Flash Update status values
 487 */
 488#define FLASH_UPDATE_COMPLETE_PENDING_REBOOT    0x00
 489#define FLASH_UPDATE_IN_PROGRESS                0x01
 490#define FLASH_UPDATE_HDR_ERR                    0x02
 491#define FLASH_UPDATE_OFFSET_ERR                 0x03
 492#define FLASH_UPDATE_CRC_ERR                    0x04
 493#define FLASH_UPDATE_LENGTH_ERR                 0x05
 494#define FLASH_UPDATE_HW_ERR                     0x06
 495#define FLASH_UPDATE_DNLD_NOT_SUPPORTED         0x10
 496#define FLASH_UPDATE_DISABLED                   0x11
 497
 498#define NCQ_READ_LOG_FLAG                       0x80000000
 499#define NCQ_ABORT_ALL_FLAG                      0x40000000
 500#define NCQ_2ND_RLE_FLAG                        0x20000000
 501/**
 502 * brief param structure for firmware flash update.
 503 */
 504struct fw_flash_updata_info {
 505        u32                     cur_image_offset;
 506        u32                     cur_image_len;
 507        u32                     total_image_len;
 508        struct pm8001_prd       sgl;
 509};
 510
 511struct fw_control_info {
 512        u32                     retcode;/*ret code (status)*/
 513        u32                     phase;/*ret code phase*/
 514        u32                     phaseCmplt;/*percent complete for the current
 515        update phase */
 516        u32                     version;/*Hex encoded firmware version number*/
 517        u32                     offset;/*Used for downloading firmware  */
 518        u32                     len; /*len of buffer*/
 519        u32                     size;/* Used in OS VPD and Trace get size
 520        operations.*/
 521        u32                     reserved;/* padding required for 64 bit
 522        alignment */
 523        u8                      buffer[1];/* Start of buffer */
 524};
 525struct fw_control_ex {
 526        struct fw_control_info *fw_control;
 527        void                    *buffer;/* keep buffer pointer to be
 528        freed when the response comes*/
 529        void                    *virtAddr;/* keep virtual address of the data */
 530        void                    *usrAddr;/* keep virtual address of the
 531        user data */
 532        dma_addr_t              phys_addr;
 533        u32                     len; /* len of buffer  */
 534        void                    *payload; /* pointer to IOCTL Payload */
 535        u8                      inProgress;/*if 1 - the IOCTL request is in
 536        progress */
 537        void                    *param1;
 538        void                    *param2;
 539        void                    *param3;
 540};
 541
 542/* pm8001 workqueue */
 543extern struct workqueue_struct *pm8001_wq;
 544
 545/******************** function prototype *********************/
 546int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
 547void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
 548u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
 549void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
 550void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
 551        struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
 552int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
 553        void *funcdata);
 554void pm8001_scan_start(struct Scsi_Host *shost);
 555int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
 556int pm8001_queue_command(struct sas_task *task, const int num,
 557        gfp_t gfp_flags);
 558int pm8001_abort_task(struct sas_task *task);
 559int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
 560int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
 561int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
 562int pm8001_dev_found(struct domain_device *dev);
 563void pm8001_dev_gone(struct domain_device *dev);
 564int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
 565int pm8001_I_T_nexus_reset(struct domain_device *dev);
 566int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
 567int pm8001_query_task(struct sas_task *task);
 568void pm8001_open_reject_retry(
 569        struct pm8001_hba_info *pm8001_ha,
 570        struct sas_task *task_to_close,
 571        struct pm8001_device *device_to_close);
 572int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
 573        dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
 574        u32 mem_size, u32 align);
 575
 576void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
 577int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
 578                        struct inbound_queue_table *circularQ,
 579                        u32 opCode, void *payload, u32 responseQueue);
 580int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
 581                                u16 messageSize, void **messagePtr);
 582u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
 583                        struct outbound_queue_table *circularQ, u8 bc);
 584u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
 585                        struct outbound_queue_table *circularQ,
 586                        void **messagePtr1, u8 *pBC);
 587int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
 588                        struct pm8001_device *pm8001_dev, u32 state);
 589int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
 590                                        void *payload);
 591int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
 592                                        void *fw_flash_updata_info, u32 tag);
 593int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 594int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 595int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
 596                                struct pm8001_ccb_info *ccb,
 597                                struct pm8001_tmf_task *tmf);
 598int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
 599                                struct pm8001_device *pm8001_dev,
 600                                u8 flag, u32 task_tag, u32 cmd_tag);
 601int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 602void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
 603void pm8001_work_fn(struct work_struct *work);
 604int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
 605                                        void *data, int handler);
 606void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
 607                                                        void *piomb);
 608void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 609                                                        void *piomb);
 610void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 611                                                        void *piomb);
 612int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
 613                                                        void *piomb);
 614void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
 615void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
 616void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
 617int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 618int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 619int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
 620                                                        void *piomb);
 621int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb);
 622int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 623struct sas_task *pm8001_alloc_task(void);
 624void pm8001_task_done(struct sas_task *task);
 625void pm8001_free_task(struct sas_task *task);
 626void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
 627struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
 628                                        u32 device_id);
 629int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
 630
 631int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
 632
 633/* ctl shared API */
 634extern struct device_attribute *pm8001_host_attrs[];
 635
 636#endif
 637
 638
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