linux/drivers/tty/serial/ioc3_serial.c
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   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 2005 Silicon Graphics, Inc.  All Rights Reserved.
   7 */
   8
   9/*
  10 * This file contains a module version of the ioc3 serial driver. This
  11 * includes all the support functions needed (support functions, etc.)
  12 * and the serial driver itself.
  13 */
  14#include <linux/errno.h>
  15#include <linux/tty.h>
  16#include <linux/tty_flip.h>
  17#include <linux/serial.h>
  18#include <linux/circ_buf.h>
  19#include <linux/serial_reg.h>
  20#include <linux/module.h>
  21#include <linux/pci.h>
  22#include <linux/serial_core.h>
  23#include <linux/ioc3.h>
  24#include <linux/slab.h>
  25
  26/*
  27 * Interesting things about the ioc3
  28 */
  29
  30#define LOGICAL_PORTS           2       /* rs232(0) and rs422(1) */
  31#define PORTS_PER_CARD          2
  32#define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS)
  33#define MAX_CARDS               8
  34#define MAX_LOGICAL_PORTS       (LOGICAL_PORTS_PER_CARD * MAX_CARDS)
  35
  36/* determine given the sio_ir what port it applies to */
  37#define GET_PORT_FROM_SIO_IR(_x)        (_x & SIO_IR_SA) ? 0 : 1
  38
  39
  40/*
  41 * we have 2 logical ports (rs232, rs422) for each physical port
  42 * evens are rs232, odds are rs422
  43 */
  44#define GET_PHYSICAL_PORT(_x)   ((_x) >> 1)
  45#define GET_LOGICAL_PORT(_x)    ((_x) & 1)
  46#define IS_PHYSICAL_PORT(_x)    !((_x) & 1)
  47#define IS_RS232(_x)            !((_x) & 1)
  48
  49static unsigned int Num_of_ioc3_cards;
  50static unsigned int Submodule_slot;
  51
  52/* defining this will get you LOTS of great debug info */
  53//#define DEBUG_INTERRUPTS
  54#define DPRINT_CONFIG(_x...)    ;
  55//#define DPRINT_CONFIG(_x...)  printk _x
  56#define NOT_PROGRESS()  ;
  57//#define NOT_PROGRESS()        printk("%s : fails %d\n", __func__, __LINE__)
  58
  59/* number of characters we want to transmit to the lower level at a time */
  60#define MAX_CHARS               256
  61#define FIFO_SIZE               (MAX_CHARS-1)   /* it's a uchar */
  62
  63/* Device name we're using */
  64#define DEVICE_NAME             "ttySIOC"
  65#define DEVICE_MAJOR            204
  66#define DEVICE_MINOR            116
  67
  68/* flags for next_char_state */
  69#define NCS_BREAK               0x1
  70#define NCS_PARITY              0x2
  71#define NCS_FRAMING             0x4
  72#define NCS_OVERRUN             0x8
  73
  74/* cause we need SOME parameters ... */
  75#define MIN_BAUD_SUPPORTED      1200
  76#define MAX_BAUD_SUPPORTED      115200
  77
  78/* protocol types supported */
  79#define PROTO_RS232             0
  80#define PROTO_RS422             1
  81
  82/* Notification types */
  83#define N_DATA_READY            0x01
  84#define N_OUTPUT_LOWAT          0x02
  85#define N_BREAK                 0x04
  86#define N_PARITY_ERROR          0x08
  87#define N_FRAMING_ERROR         0x10
  88#define N_OVERRUN_ERROR         0x20
  89#define N_DDCD                  0x40
  90#define N_DCTS                  0x80
  91
  92#define N_ALL_INPUT             (N_DATA_READY | N_BREAK                    \
  93                                        | N_PARITY_ERROR | N_FRAMING_ERROR \
  94                                        | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
  95
  96#define N_ALL_OUTPUT            N_OUTPUT_LOWAT
  97
  98#define N_ALL_ERRORS            (N_PARITY_ERROR | N_FRAMING_ERROR \
  99                                                | N_OVERRUN_ERROR)
 100
 101#define N_ALL                   (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK    \
 102                                        | N_PARITY_ERROR | N_FRAMING_ERROR  \
 103                                        | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
 104
 105#define SER_CLK_SPEED(prediv)   ((22000000 << 1) / prediv)
 106#define SER_DIVISOR(x, clk)     (((clk) + (x) * 8) / ((x) * 16))
 107#define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div))
 108
 109/* Some masks */
 110#define LCR_MASK_BITS_CHAR      (UART_LCR_WLEN5 | UART_LCR_WLEN6 \
 111                                        | UART_LCR_WLEN7 | UART_LCR_WLEN8)
 112#define LCR_MASK_STOP_BITS      (UART_LCR_STOP)
 113
 114#define PENDING(_a, _p)         (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable)
 115
 116#define RING_BUF_SIZE           4096
 117#define BUF_SIZE_BIT            SBBR_L_SIZE
 118#define PROD_CONS_MASK          PROD_CONS_PTR_4K
 119
 120#define TOTAL_RING_BUF_SIZE     (RING_BUF_SIZE * 4)
 121
 122/* driver specific - one per card */
 123struct ioc3_card {
 124        struct {
 125                /* uart ports are allocated here */
 126                struct uart_port icp_uart_port[LOGICAL_PORTS];
 127                /* the ioc3_port used for this port */
 128                struct ioc3_port *icp_port;
 129        } ic_port[PORTS_PER_CARD];
 130        /* currently enabled interrupts */
 131        uint32_t ic_enable;
 132};
 133
 134/* Local port info for each IOC3 serial port */
 135struct ioc3_port {
 136        /* handy reference material */
 137        struct uart_port *ip_port;
 138        struct ioc3_card *ip_card;
 139        struct ioc3_driver_data *ip_idd;
 140        struct ioc3_submodule *ip_is;
 141
 142        /* pci mem addresses for this port */
 143        struct ioc3_serialregs __iomem *ip_serial_regs;
 144        struct ioc3_uartregs __iomem *ip_uart_regs;
 145
 146        /* Ring buffer page for this port */
 147        dma_addr_t ip_dma_ringbuf;
 148        /* vaddr of ring buffer */
 149        struct ring_buffer *ip_cpu_ringbuf;
 150
 151        /* Rings for this port */
 152        struct ring *ip_inring;
 153        struct ring *ip_outring;
 154
 155        /* Hook to port specific values */
 156        struct port_hooks *ip_hooks;
 157
 158        spinlock_t ip_lock;
 159
 160        /* Various rx/tx parameters */
 161        int ip_baud;
 162        int ip_tx_lowat;
 163        int ip_rx_timeout;
 164
 165        /* Copy of notification bits */
 166        int ip_notify;
 167
 168        /* Shadow copies of various registers so we don't need to PIO
 169         * read them constantly
 170         */
 171        uint32_t ip_sscr;
 172        uint32_t ip_tx_prod;
 173        uint32_t ip_rx_cons;
 174        unsigned char ip_flags;
 175};
 176
 177/* tx low water mark.  We need to notify the driver whenever tx is getting
 178 * close to empty so it can refill the tx buffer and keep things going.
 179 * Let's assume that if we interrupt 1 ms before the tx goes idle, we'll
 180 * have no trouble getting in more chars in time (I certainly hope so).
 181 */
 182#define TX_LOWAT_LATENCY      1000
 183#define TX_LOWAT_HZ          (1000000 / TX_LOWAT_LATENCY)
 184#define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ)
 185
 186/* Flags per port */
 187#define INPUT_HIGH              0x01
 188        /* used to signify that we have turned off the rx_high
 189         * temporarily - we need to drain the fifo and don't
 190         * want to get blasted with interrupts.
 191         */
 192#define DCD_ON                  0x02
 193        /* DCD state is on */
 194#define LOWAT_WRITTEN           0x04
 195#define READ_ABORTED            0x08
 196        /* the read was aborted - used to avaoid infinate looping
 197         * in the interrupt handler
 198         */
 199#define INPUT_ENABLE            0x10
 200
 201/* Since each port has different register offsets and bitmasks
 202 * for everything, we'll store those that we need in tables so we
 203 * don't have to be constantly checking the port we are dealing with.
 204 */
 205struct port_hooks {
 206        uint32_t intr_delta_dcd;
 207        uint32_t intr_delta_cts;
 208        uint32_t intr_tx_mt;
 209        uint32_t intr_rx_timer;
 210        uint32_t intr_rx_high;
 211        uint32_t intr_tx_explicit;
 212        uint32_t intr_clear;
 213        uint32_t intr_all;
 214        char rs422_select_pin;
 215};
 216
 217static struct port_hooks hooks_array[PORTS_PER_CARD] = {
 218        /* values for port A */
 219        {
 220        .intr_delta_dcd = SIO_IR_SA_DELTA_DCD,
 221        .intr_delta_cts = SIO_IR_SA_DELTA_CTS,
 222        .intr_tx_mt = SIO_IR_SA_TX_MT,
 223        .intr_rx_timer = SIO_IR_SA_RX_TIMER,
 224        .intr_rx_high = SIO_IR_SA_RX_HIGH,
 225        .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT,
 226        .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL
 227                                | SIO_IR_SA_RX_HIGH
 228                                | SIO_IR_SA_RX_TIMER
 229                                | SIO_IR_SA_DELTA_DCD
 230                                | SIO_IR_SA_DELTA_CTS
 231                                | SIO_IR_SA_INT
 232                                | SIO_IR_SA_TX_EXPLICIT
 233                                | SIO_IR_SA_MEMERR),
 234        .intr_all =  SIO_IR_SA,
 235        .rs422_select_pin = GPPR_UARTA_MODESEL_PIN,
 236         },
 237
 238        /* values for port B */
 239        {
 240        .intr_delta_dcd = SIO_IR_SB_DELTA_DCD,
 241        .intr_delta_cts = SIO_IR_SB_DELTA_CTS,
 242        .intr_tx_mt = SIO_IR_SB_TX_MT,
 243        .intr_rx_timer = SIO_IR_SB_RX_TIMER,
 244        .intr_rx_high = SIO_IR_SB_RX_HIGH,
 245        .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT,
 246        .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL
 247                                | SIO_IR_SB_RX_HIGH
 248                                | SIO_IR_SB_RX_TIMER
 249                                | SIO_IR_SB_DELTA_DCD
 250                                | SIO_IR_SB_DELTA_CTS
 251                                | SIO_IR_SB_INT
 252                                | SIO_IR_SB_TX_EXPLICIT
 253                                | SIO_IR_SB_MEMERR),
 254        .intr_all = SIO_IR_SB,
 255        .rs422_select_pin = GPPR_UARTB_MODESEL_PIN,
 256         }
 257};
 258
 259struct ring_entry {
 260        union {
 261                struct {
 262                        uint32_t alldata;
 263                        uint32_t allsc;
 264                } all;
 265                struct {
 266                        char data[4];   /* data bytes */
 267                        char sc[4];     /* status/control */
 268                } s;
 269        } u;
 270};
 271
 272/* Test the valid bits in any of the 4 sc chars using "allsc" member */
 273#define RING_ANY_VALID \
 274        ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101)
 275
 276#define ring_sc         u.s.sc
 277#define ring_data       u.s.data
 278#define ring_allsc      u.all.allsc
 279
 280/* Number of entries per ring buffer. */
 281#define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry))
 282
 283/* An individual ring */
 284struct ring {
 285        struct ring_entry entries[ENTRIES_PER_RING];
 286};
 287
 288/* The whole enchilada */
 289struct ring_buffer {
 290        struct ring TX_A;
 291        struct ring RX_A;
 292        struct ring TX_B;
 293        struct ring RX_B;
 294};
 295
 296/* Get a ring from a port struct */
 297#define RING(_p, _wh)   &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh)
 298
 299/* for Infinite loop detection  */
 300#define MAXITER         10000000
 301
 302
 303/**
 304 * set_baud - Baud rate setting code
 305 * @port: port to set
 306 * @baud: baud rate to use
 307 */
 308static int set_baud(struct ioc3_port *port, int baud)
 309{
 310        int divisor;
 311        int actual_baud;
 312        int diff;
 313        int lcr, prediv;
 314        struct ioc3_uartregs __iomem *uart;
 315
 316        for (prediv = 6; prediv < 64; prediv++) {
 317                divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv));
 318                if (!divisor)
 319                        continue;       /* invalid divisor */
 320                actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv));
 321
 322                diff = actual_baud - baud;
 323                if (diff < 0)
 324                        diff = -diff;
 325
 326                /* if we're within 1% we've found a match */
 327                if (diff * 100 <= actual_baud)
 328                        break;
 329        }
 330
 331        /* if the above loop completed, we didn't match
 332         * the baud rate.  give up.
 333         */
 334        if (prediv == 64) {
 335                NOT_PROGRESS();
 336                return 1;
 337        }
 338
 339        uart = port->ip_uart_regs;
 340        lcr = readb(&uart->iu_lcr);
 341
 342        writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr);
 343        writeb((unsigned char)divisor, &uart->iu_dll);
 344        writeb((unsigned char)(divisor >> 8), &uart->iu_dlm);
 345        writeb((unsigned char)prediv, &uart->iu_scr);
 346        writeb((unsigned char)lcr, &uart->iu_lcr);
 347
 348        return 0;
 349}
 350
 351/**
 352 * get_ioc3_port - given a uart port, return the control structure
 353 * @the_port: uart port to find
 354 */
 355static struct ioc3_port *get_ioc3_port(struct uart_port *the_port)
 356{
 357        struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev);
 358        struct ioc3_card *card_ptr = idd->data[Submodule_slot];
 359        int ii, jj;
 360
 361        if (!card_ptr) {
 362                NOT_PROGRESS();
 363                return NULL;
 364        }
 365        for (ii = 0; ii < PORTS_PER_CARD; ii++) {
 366                for (jj = 0; jj < LOGICAL_PORTS; jj++) {
 367                        if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj])
 368                                return card_ptr->ic_port[ii].icp_port;
 369                }
 370        }
 371        NOT_PROGRESS();
 372        return NULL;
 373}
 374
 375/**
 376 * port_init - Initialize the sio and ioc3 hardware for a given port
 377 *                      called per port from attach...
 378 * @port: port to initialize
 379 */
 380static int inline port_init(struct ioc3_port *port)
 381{
 382        uint32_t sio_cr;
 383        struct port_hooks *hooks = port->ip_hooks;
 384        struct ioc3_uartregs __iomem *uart;
 385        int reset_loop_counter = 0xfffff;
 386        struct ioc3_driver_data *idd = port->ip_idd;
 387
 388        /* Idle the IOC3 serial interface */
 389        writel(SSCR_RESET, &port->ip_serial_regs->sscr);
 390
 391        /* Wait until any pending bus activity for this port has ceased */
 392        do {
 393                sio_cr = readl(&idd->vma->sio_cr);
 394                if (reset_loop_counter-- <= 0) {
 395                        printk(KERN_WARNING
 396                               "IOC3 unable to come out of reset"
 397                                " scr 0x%x\n", sio_cr);
 398                        return -1;
 399                }
 400        } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) &&
 401               (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA)
 402                || sio_cr == SIO_CR_ARB_DIAG_TXB
 403                || sio_cr == SIO_CR_ARB_DIAG_RXA
 404                || sio_cr == SIO_CR_ARB_DIAG_RXB));
 405
 406        /* Finish reset sequence */
 407        writel(0, &port->ip_serial_regs->sscr);
 408
 409        /* Once RESET is done, reload cached tx_prod and rx_cons values
 410         * and set rings to empty by making prod == cons
 411         */
 412        port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
 413        writel(port->ip_tx_prod, &port->ip_serial_regs->stpir);
 414        port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
 415        writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
 416
 417        /* Disable interrupts for this 16550 */
 418        uart = port->ip_uart_regs;
 419        writeb(0, &uart->iu_lcr);
 420        writeb(0, &uart->iu_ier);
 421
 422        /* Set the default baud */
 423        set_baud(port, port->ip_baud);
 424
 425        /* Set line control to 8 bits no parity */
 426        writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr);
 427        /* UART_LCR_STOP == 1 stop */
 428
 429        /* Enable the FIFOs */
 430        writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr);
 431        /* then reset 16550 FIFOs */
 432        writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
 433               &uart->iu_fcr);
 434
 435        /* Clear modem control register */
 436        writeb(0, &uart->iu_mcr);
 437
 438        /* Clear deltas in modem status register */
 439        writel(0, &port->ip_serial_regs->shadow);
 440
 441        /* Only do this once per port pair */
 442        if (port->ip_hooks == &hooks_array[0]) {
 443                unsigned long ring_pci_addr;
 444                uint32_t __iomem *sbbr_l, *sbbr_h;
 445
 446                sbbr_l = &idd->vma->sbbr_l;
 447                sbbr_h = &idd->vma->sbbr_h;
 448                ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf;
 449                DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n",
 450                               __func__, (void *)ring_pci_addr));
 451
 452                writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h);
 453                writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l);
 454        }
 455
 456        /* Set the receive timeout value to 10 msec */
 457        writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr);
 458
 459        /* Set rx threshold, enable DMA */
 460        /* Set high water mark at 3/4 of full ring */
 461        port->ip_sscr = (ENTRIES_PER_RING * 3 / 4);
 462
 463        /* uart experiences pauses at high baud rate reducing actual
 464         * throughput by 10% or so unless we enable high speed polling
 465         * XXX when this hardware bug is resolved we should revert to
 466         * normal polling speed
 467         */
 468        port->ip_sscr |= SSCR_HIGH_SPD;
 469
 470        writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 471
 472        /* Disable and clear all serial related interrupt bits */
 473        port->ip_card->ic_enable &= ~hooks->intr_clear;
 474        ioc3_disable(port->ip_is, idd, hooks->intr_clear);
 475        ioc3_ack(port->ip_is, idd, hooks->intr_clear);
 476        return 0;
 477}
 478
 479/**
 480 * enable_intrs - enable interrupts
 481 * @port: port to enable
 482 * @mask: mask to use
 483 */
 484static void enable_intrs(struct ioc3_port *port, uint32_t mask)
 485{
 486        if ((port->ip_card->ic_enable & mask) != mask) {
 487                port->ip_card->ic_enable |= mask;
 488                ioc3_enable(port->ip_is, port->ip_idd, mask);
 489        }
 490}
 491
 492/**
 493 * local_open - local open a port
 494 * @port: port to open
 495 */
 496static inline int local_open(struct ioc3_port *port)
 497{
 498        int spiniter = 0;
 499
 500        port->ip_flags = INPUT_ENABLE;
 501
 502        /* Pause the DMA interface if necessary */
 503        if (port->ip_sscr & SSCR_DMA_EN) {
 504                writel(port->ip_sscr | SSCR_DMA_PAUSE,
 505                       &port->ip_serial_regs->sscr);
 506                while ((readl(&port->ip_serial_regs->sscr)
 507                        & SSCR_PAUSE_STATE) == 0) {
 508                        spiniter++;
 509                        if (spiniter > MAXITER) {
 510                                NOT_PROGRESS();
 511                                return -1;
 512                        }
 513                }
 514        }
 515
 516        /* Reset the input fifo.  If the uart received chars while the port
 517         * was closed and DMA is not enabled, the uart may have a bunch of
 518         * chars hanging around in its rx fifo which will not be discarded
 519         * by rclr in the upper layer. We must get rid of them here.
 520         */
 521        writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR,
 522               &port->ip_uart_regs->iu_fcr);
 523
 524        writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr);
 525        /* UART_LCR_STOP == 1 stop */
 526
 527        /* Re-enable DMA, set default threshold to intr whenever there is
 528         * data available.
 529         */
 530        port->ip_sscr &= ~SSCR_RX_THRESHOLD;
 531        port->ip_sscr |= 1;     /* default threshold */
 532
 533        /* Plug in the new sscr.  This implicitly clears the DMA_PAUSE
 534         * flag if it was set above
 535         */
 536        writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 537        port->ip_tx_lowat = 1;
 538        return 0;
 539}
 540
 541/**
 542 * set_rx_timeout - Set rx timeout and threshold values.
 543 * @port: port to use
 544 * @timeout: timeout value in ticks
 545 */
 546static inline int set_rx_timeout(struct ioc3_port *port, int timeout)
 547{
 548        int threshold;
 549
 550        port->ip_rx_timeout = timeout;
 551
 552        /* Timeout is in ticks.  Let's figure out how many chars we
 553         * can receive at the current baud rate in that interval
 554         * and set the rx threshold to that amount.  There are 4 chars
 555         * per ring entry, so we'll divide the number of chars that will
 556         * arrive in timeout by 4.
 557         * So .... timeout * baud / 10 / HZ / 4, with HZ = 100.
 558         */
 559        threshold = timeout * port->ip_baud / 4000;
 560        if (threshold == 0)
 561                threshold = 1;  /* otherwise we'll intr all the time! */
 562
 563        if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD)
 564                return 1;
 565
 566        port->ip_sscr &= ~SSCR_RX_THRESHOLD;
 567        port->ip_sscr |= threshold;
 568        writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 569
 570        /* Now set the rx timeout to the given value
 571         * again timeout * SRTR_HZ / HZ
 572         */
 573        timeout = timeout * SRTR_HZ / 100;
 574        if (timeout > SRTR_CNT)
 575                timeout = SRTR_CNT;
 576        writel(timeout, &port->ip_serial_regs->srtr);
 577        return 0;
 578}
 579
 580/**
 581 * config_port - config the hardware
 582 * @port: port to config
 583 * @baud: baud rate for the port
 584 * @byte_size: data size
 585 * @stop_bits: number of stop bits
 586 * @parenb: parity enable ?
 587 * @parodd: odd parity ?
 588 */
 589static inline int
 590config_port(struct ioc3_port *port,
 591            int baud, int byte_size, int stop_bits, int parenb, int parodd)
 592{
 593        char lcr, sizebits;
 594        int spiniter = 0;
 595
 596        DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d "
 597                        "parodd %d\n",
 598                       __func__, ((struct uart_port *)port->ip_port)->line,
 599                        baud, byte_size, stop_bits, parenb, parodd));
 600
 601        if (set_baud(port, baud))
 602                return 1;
 603
 604        switch (byte_size) {
 605        case 5:
 606                sizebits = UART_LCR_WLEN5;
 607                break;
 608        case 6:
 609                sizebits = UART_LCR_WLEN6;
 610                break;
 611        case 7:
 612                sizebits = UART_LCR_WLEN7;
 613                break;
 614        case 8:
 615                sizebits = UART_LCR_WLEN8;
 616                break;
 617        default:
 618                return 1;
 619        }
 620
 621        /* Pause the DMA interface if necessary */
 622        if (port->ip_sscr & SSCR_DMA_EN) {
 623                writel(port->ip_sscr | SSCR_DMA_PAUSE,
 624                       &port->ip_serial_regs->sscr);
 625                while ((readl(&port->ip_serial_regs->sscr)
 626                        & SSCR_PAUSE_STATE) == 0) {
 627                        spiniter++;
 628                        if (spiniter > MAXITER)
 629                                return -1;
 630                }
 631        }
 632
 633        /* Clear relevant fields in lcr */
 634        lcr = readb(&port->ip_uart_regs->iu_lcr);
 635        lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR |
 636                 UART_LCR_PARITY | LCR_MASK_STOP_BITS);
 637
 638        /* Set byte size in lcr */
 639        lcr |= sizebits;
 640
 641        /* Set parity */
 642        if (parenb) {
 643                lcr |= UART_LCR_PARITY;
 644                if (!parodd)
 645                        lcr |= UART_LCR_EPAR;
 646        }
 647
 648        /* Set stop bits */
 649        if (stop_bits)
 650                lcr |= UART_LCR_STOP /* 2 stop bits */ ;
 651
 652        writeb(lcr, &port->ip_uart_regs->iu_lcr);
 653
 654        /* Re-enable the DMA interface if necessary */
 655        if (port->ip_sscr & SSCR_DMA_EN) {
 656                writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 657        }
 658        port->ip_baud = baud;
 659
 660        /* When we get within this number of ring entries of filling the
 661         * entire ring on tx, place an EXPLICIT intr to generate a lowat
 662         * notification when output has drained.
 663         */
 664        port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4;
 665        if (port->ip_tx_lowat == 0)
 666                port->ip_tx_lowat = 1;
 667
 668        set_rx_timeout(port, 2);
 669        return 0;
 670}
 671
 672/**
 673 * do_write - Write bytes to the port.  Returns the number of bytes
 674 *                      actually written. Called from transmit_chars
 675 * @port: port to use
 676 * @buf: the stuff to write
 677 * @len: how many bytes in 'buf'
 678 */
 679static inline int do_write(struct ioc3_port *port, char *buf, int len)
 680{
 681        int prod_ptr, cons_ptr, total = 0;
 682        struct ring *outring;
 683        struct ring_entry *entry;
 684        struct port_hooks *hooks = port->ip_hooks;
 685
 686        BUG_ON(!(len >= 0));
 687
 688        prod_ptr = port->ip_tx_prod;
 689        cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
 690        outring = port->ip_outring;
 691
 692        /* Maintain a 1-entry red-zone.  The ring buffer is full when
 693         * (cons - prod) % ring_size is 1.  Rather than do this subtraction
 694         * in the body of the loop, I'll do it now.
 695         */
 696        cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK;
 697
 698        /* Stuff the bytes into the output */
 699        while ((prod_ptr != cons_ptr) && (len > 0)) {
 700                int xx;
 701
 702                /* Get 4 bytes (one ring entry) at a time */
 703                entry = (struct ring_entry *)((caddr_t) outring + prod_ptr);
 704
 705                /* Invalidate all entries */
 706                entry->ring_allsc = 0;
 707
 708                /* Copy in some bytes */
 709                for (xx = 0; (xx < 4) && (len > 0); xx++) {
 710                        entry->ring_data[xx] = *buf++;
 711                        entry->ring_sc[xx] = TXCB_VALID;
 712                        len--;
 713                        total++;
 714                }
 715
 716                /* If we are within some small threshold of filling up the
 717                 * entire ring buffer, we must place an EXPLICIT intr here
 718                 * to generate a lowat interrupt in case we subsequently
 719                 * really do fill up the ring and the caller goes to sleep.
 720                 * No need to place more than one though.
 721                 */
 722                if (!(port->ip_flags & LOWAT_WRITTEN) &&
 723                    ((cons_ptr - prod_ptr) & PROD_CONS_MASK)
 724                    <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) {
 725                        port->ip_flags |= LOWAT_WRITTEN;
 726                        entry->ring_sc[0] |= TXCB_INT_WHEN_DONE;
 727                }
 728
 729                /* Go on to next entry */
 730                prod_ptr += sizeof(struct ring_entry);
 731                prod_ptr &= PROD_CONS_MASK;
 732        }
 733
 734        /* If we sent something, start DMA if necessary */
 735        if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) {
 736                port->ip_sscr |= SSCR_DMA_EN;
 737                writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 738        }
 739
 740        /* Store the new producer pointer.  If tx is disabled, we stuff the
 741         * data into the ring buffer, but we don't actually start tx.
 742         */
 743        if (!uart_tx_stopped(port->ip_port)) {
 744                writel(prod_ptr, &port->ip_serial_regs->stpir);
 745
 746                /* If we are now transmitting, enable tx_mt interrupt so we
 747                 * can disable DMA if necessary when the tx finishes.
 748                 */
 749                if (total > 0)
 750                        enable_intrs(port, hooks->intr_tx_mt);
 751        }
 752        port->ip_tx_prod = prod_ptr;
 753
 754        return total;
 755}
 756
 757/**
 758 * disable_intrs - disable interrupts
 759 * @port: port to enable
 760 * @mask: mask to use
 761 */
 762static inline void disable_intrs(struct ioc3_port *port, uint32_t mask)
 763{
 764        if (port->ip_card->ic_enable & mask) {
 765                ioc3_disable(port->ip_is, port->ip_idd, mask);
 766                port->ip_card->ic_enable &= ~mask;
 767        }
 768}
 769
 770/**
 771 * set_notification - Modify event notification
 772 * @port: port to use
 773 * @mask: events mask
 774 * @set_on: set ?
 775 */
 776static int set_notification(struct ioc3_port *port, int mask, int set_on)
 777{
 778        struct port_hooks *hooks = port->ip_hooks;
 779        uint32_t intrbits, sscrbits;
 780
 781        BUG_ON(!mask);
 782
 783        intrbits = sscrbits = 0;
 784
 785        if (mask & N_DATA_READY)
 786                intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high);
 787        if (mask & N_OUTPUT_LOWAT)
 788                intrbits |= hooks->intr_tx_explicit;
 789        if (mask & N_DDCD) {
 790                intrbits |= hooks->intr_delta_dcd;
 791                sscrbits |= SSCR_RX_RING_DCD;
 792        }
 793        if (mask & N_DCTS)
 794                intrbits |= hooks->intr_delta_cts;
 795
 796        if (set_on) {
 797                enable_intrs(port, intrbits);
 798                port->ip_notify |= mask;
 799                port->ip_sscr |= sscrbits;
 800        } else {
 801                disable_intrs(port, intrbits);
 802                port->ip_notify &= ~mask;
 803                port->ip_sscr &= ~sscrbits;
 804        }
 805
 806        /* We require DMA if either DATA_READY or DDCD notification is
 807         * currently requested. If neither of these is requested and
 808         * there is currently no tx in progress, DMA may be disabled.
 809         */
 810        if (port->ip_notify & (N_DATA_READY | N_DDCD))
 811                port->ip_sscr |= SSCR_DMA_EN;
 812        else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt))
 813                port->ip_sscr &= ~SSCR_DMA_EN;
 814
 815        writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 816        return 0;
 817}
 818
 819/**
 820 * set_mcr - set the master control reg
 821 * @the_port: port to use
 822 * @mask1: mcr mask
 823 * @mask2: shadow mask
 824 */
 825static inline int set_mcr(struct uart_port *the_port,
 826                          int mask1, int mask2)
 827{
 828        struct ioc3_port *port = get_ioc3_port(the_port);
 829        uint32_t shadow;
 830        int spiniter = 0;
 831        char mcr;
 832
 833        if (!port)
 834                return -1;
 835
 836        /* Pause the DMA interface if necessary */
 837        if (port->ip_sscr & SSCR_DMA_EN) {
 838                writel(port->ip_sscr | SSCR_DMA_PAUSE,
 839                       &port->ip_serial_regs->sscr);
 840                while ((readl(&port->ip_serial_regs->sscr)
 841                        & SSCR_PAUSE_STATE) == 0) {
 842                        spiniter++;
 843                        if (spiniter > MAXITER)
 844                                return -1;
 845                }
 846        }
 847        shadow = readl(&port->ip_serial_regs->shadow);
 848        mcr = (shadow & 0xff000000) >> 24;
 849
 850        /* Set new value */
 851        mcr |= mask1;
 852        shadow |= mask2;
 853        writeb(mcr, &port->ip_uart_regs->iu_mcr);
 854        writel(shadow, &port->ip_serial_regs->shadow);
 855
 856        /* Re-enable the DMA interface if necessary */
 857        if (port->ip_sscr & SSCR_DMA_EN) {
 858                writel(port->ip_sscr, &port->ip_serial_regs->sscr);
 859        }
 860        return 0;
 861}
 862
 863/**
 864 * ioc3_set_proto - set the protocol for the port
 865 * @port: port to use
 866 * @proto: protocol to use
 867 */
 868static int ioc3_set_proto(struct ioc3_port *port, int proto)
 869{
 870        struct port_hooks *hooks = port->ip_hooks;
 871
 872        switch (proto) {
 873        default:
 874        case PROTO_RS232:
 875                /* Clear the appropriate GIO pin */
 876                DPRINT_CONFIG(("%s: rs232\n", __func__));
 877                writel(0, (&port->ip_idd->vma->gppr[0]
 878                                        + hooks->rs422_select_pin));
 879                break;
 880
 881        case PROTO_RS422:
 882                /* Set the appropriate GIO pin */
 883                DPRINT_CONFIG(("%s: rs422\n", __func__));
 884                writel(1, (&port->ip_idd->vma->gppr[0]
 885                                        + hooks->rs422_select_pin));
 886                break;
 887        }
 888        return 0;
 889}
 890
 891/**
 892 * transmit_chars - upper level write, called with the_port->lock
 893 * @the_port: port to write
 894 */
 895static void transmit_chars(struct uart_port *the_port)
 896{
 897        int xmit_count, tail, head;
 898        int result;
 899        char *start;
 900        struct tty_struct *tty;
 901        struct ioc3_port *port = get_ioc3_port(the_port);
 902        struct uart_state *state;
 903
 904        if (!the_port)
 905                return;
 906        if (!port)
 907                return;
 908
 909        state = the_port->state;
 910        tty = state->port.tty;
 911
 912        if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) {
 913                /* Nothing to do or hw stopped */
 914                set_notification(port, N_ALL_OUTPUT, 0);
 915                return;
 916        }
 917
 918        head = state->xmit.head;
 919        tail = state->xmit.tail;
 920        start = (char *)&state->xmit.buf[tail];
 921
 922        /* write out all the data or until the end of the buffer */
 923        xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail);
 924        if (xmit_count > 0) {
 925                result = do_write(port, start, xmit_count);
 926                if (result > 0) {
 927                        /* booking */
 928                        xmit_count -= result;
 929                        the_port->icount.tx += result;
 930                        /* advance the pointers */
 931                        tail += result;
 932                        tail &= UART_XMIT_SIZE - 1;
 933                        state->xmit.tail = tail;
 934                        start = (char *)&state->xmit.buf[tail];
 935                }
 936        }
 937        if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS)
 938                uart_write_wakeup(the_port);
 939
 940        if (uart_circ_empty(&state->xmit)) {
 941                set_notification(port, N_OUTPUT_LOWAT, 0);
 942        } else {
 943                set_notification(port, N_OUTPUT_LOWAT, 1);
 944        }
 945}
 946
 947/**
 948 * ioc3_change_speed - change the speed of the port
 949 * @the_port: port to change
 950 * @new_termios: new termios settings
 951 * @old_termios: old termios settings
 952 */
 953static void
 954ioc3_change_speed(struct uart_port *the_port,
 955                  struct ktermios *new_termios, struct ktermios *old_termios)
 956{
 957        struct ioc3_port *port = get_ioc3_port(the_port);
 958        unsigned int cflag, iflag;
 959        int baud;
 960        int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
 961        struct uart_state *state = the_port->state;
 962
 963        cflag = new_termios->c_cflag;
 964        iflag = new_termios->c_iflag;
 965
 966        switch (cflag & CSIZE) {
 967        case CS5:
 968                new_data = 5;
 969                break;
 970        case CS6:
 971                new_data = 6;
 972                break;
 973        case CS7:
 974                new_data = 7;
 975                break;
 976        case CS8:
 977                new_data = 8;
 978                break;
 979        default:
 980                /* cuz we always need a default ... */
 981                new_data = 5;
 982                break;
 983        }
 984        if (cflag & CSTOPB) {
 985                new_stop = 1;
 986        }
 987        if (cflag & PARENB) {
 988                new_parity_enable = 1;
 989                if (cflag & PARODD)
 990                        new_parity = 1;
 991        }
 992        baud = uart_get_baud_rate(the_port, new_termios, old_termios,
 993                                  MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED);
 994        DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __func__, baud,
 995                                the_port->line));
 996
 997        if (!the_port->fifosize)
 998                the_port->fifosize = FIFO_SIZE;
 999        uart_update_timeout(the_port, cflag, baud);
1000
1001        the_port->ignore_status_mask = N_ALL_INPUT;
1002
1003        state->port.low_latency = 1;
1004
1005        if (iflag & IGNPAR)
1006                the_port->ignore_status_mask &= ~(N_PARITY_ERROR
1007                                                  | N_FRAMING_ERROR);
1008        if (iflag & IGNBRK) {
1009                the_port->ignore_status_mask &= ~N_BREAK;
1010                if (iflag & IGNPAR)
1011                        the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
1012        }
1013        if (!(cflag & CREAD)) {
1014                /* ignore everything */
1015                the_port->ignore_status_mask &= ~N_DATA_READY;
1016        }
1017
1018        if (cflag & CRTSCTS) {
1019                /* enable hardware flow control */
1020                port->ip_sscr |= SSCR_HFC_EN;
1021        }
1022        else {
1023                /* disable hardware flow control */
1024                port->ip_sscr &= ~SSCR_HFC_EN;
1025        }
1026        writel(port->ip_sscr, &port->ip_serial_regs->sscr);
1027
1028        /* Set the configuration and proper notification call */
1029        DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o "
1030                       "config_port(baud %d data %d stop %d penable %d "
1031                        " parity %d), notification 0x%x\n",
1032                       __func__, (void *)port, the_port->line, cflag, baud,
1033                       new_data, new_stop, new_parity_enable, new_parity,
1034                       the_port->ignore_status_mask));
1035
1036        if ((config_port(port, baud,    /* baud */
1037                         new_data,      /* byte size */
1038                         new_stop,      /* stop bits */
1039                         new_parity_enable,     /* set parity */
1040                         new_parity)) >= 0) {   /* parity 1==odd */
1041                set_notification(port, the_port->ignore_status_mask, 1);
1042        }
1043}
1044
1045/**
1046 * ic3_startup_local - Start up the serial port - returns >= 0 if no errors
1047 * @the_port: Port to operate on
1048 */
1049static inline int ic3_startup_local(struct uart_port *the_port)
1050{
1051        struct ioc3_port *port;
1052
1053        if (!the_port) {
1054                NOT_PROGRESS();
1055                return -1;
1056        }
1057
1058        port = get_ioc3_port(the_port);
1059        if (!port) {
1060                NOT_PROGRESS();
1061                return -1;
1062        }
1063
1064        local_open(port);
1065
1066        /* set the protocol */
1067        ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 :
1068                                                        PROTO_RS422);
1069        return 0;
1070}
1071
1072/*
1073 * ioc3_cb_output_lowat - called when the output low water mark is hit
1074 * @port: port to output
1075 */
1076static void ioc3_cb_output_lowat(struct ioc3_port *port)
1077{
1078        unsigned long pflags;
1079
1080        /* the_port->lock is set on the call here */
1081        if (port->ip_port) {
1082                spin_lock_irqsave(&port->ip_port->lock, pflags);
1083                transmit_chars(port->ip_port);
1084                spin_unlock_irqrestore(&port->ip_port->lock, pflags);
1085        }
1086}
1087
1088/*
1089 * ioc3_cb_post_ncs - called for some basic errors
1090 * @port: port to use
1091 * @ncs: event
1092 */
1093static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs)
1094{
1095        struct uart_icount *icount;
1096
1097        icount = &the_port->icount;
1098
1099        if (ncs & NCS_BREAK)
1100                icount->brk++;
1101        if (ncs & NCS_FRAMING)
1102                icount->frame++;
1103        if (ncs & NCS_OVERRUN)
1104                icount->overrun++;
1105        if (ncs & NCS_PARITY)
1106                icount->parity++;
1107}
1108
1109/**
1110 * do_read - Read in bytes from the port.  Return the number of bytes
1111 *                      actually read.
1112 * @the_port: port to use
1113 * @buf: place to put the stuff we read
1114 * @len: how big 'buf' is
1115 */
1116
1117static inline int do_read(struct uart_port *the_port, char *buf, int len)
1118{
1119        int prod_ptr, cons_ptr, total;
1120        struct ioc3_port *port = get_ioc3_port(the_port);
1121        struct ring *inring;
1122        struct ring_entry *entry;
1123        struct port_hooks *hooks;
1124        int byte_num;
1125        char *sc;
1126        int loop_counter;
1127
1128        BUG_ON(!(len >= 0));
1129        BUG_ON(!port);
1130        hooks = port->ip_hooks;
1131
1132        /* There is a nasty timing issue in the IOC3. When the rx_timer
1133         * expires or the rx_high condition arises, we take an interrupt.
1134         * At some point while servicing the interrupt, we read bytes from
1135         * the ring buffer and re-arm the rx_timer.  However the rx_timer is
1136         * not started until the first byte is received *after* it is armed,
1137         * and any bytes pending in the rx construction buffers are not drained
1138         * to memory until either there are 4 bytes available or the rx_timer
1139         * expires.  This leads to a potential situation where data is left
1140         * in the construction buffers forever - 1 to 3 bytes were received
1141         * after the interrupt was generated but before the rx_timer was
1142         * re-armed. At that point as long as no subsequent bytes are received
1143         * the timer will never be started and the bytes will remain in the
1144         * construction buffer forever.  The solution is to execute a DRAIN
1145         * command after rearming the timer.  This way any bytes received before
1146         * the DRAIN will be drained to memory, and any bytes received after
1147         * the DRAIN will start the TIMER and be drained when it expires.
1148         * Luckily, this only needs to be done when the DMA buffer is empty
1149         * since there is no requirement that this function return all
1150         * available data as long as it returns some.
1151         */
1152        /* Re-arm the timer */
1153
1154        writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
1155
1156        prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
1157        cons_ptr = port->ip_rx_cons;
1158
1159        if (prod_ptr == cons_ptr) {
1160                int reset_dma = 0;
1161
1162                /* Input buffer appears empty, do a flush. */
1163
1164                /* DMA must be enabled for this to work. */
1165                if (!(port->ip_sscr & SSCR_DMA_EN)) {
1166                        port->ip_sscr |= SSCR_DMA_EN;
1167                        reset_dma = 1;
1168                }
1169
1170                /* Potential race condition: we must reload the srpir after
1171                 * issuing the drain command, otherwise we could think the rx
1172                 * buffer is empty, then take a very long interrupt, and when
1173                 * we come back it's full and we wait forever for the drain to
1174                 * complete.
1175                 */
1176                writel(port->ip_sscr | SSCR_RX_DRAIN,
1177                       &port->ip_serial_regs->sscr);
1178                prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
1179
1180                /* We must not wait for the DRAIN to complete unless there are
1181                 * at least 8 bytes (2 ring entries) available to receive the
1182                 * data otherwise the DRAIN will never complete and we'll
1183                 * deadlock here.
1184                 * In fact, to make things easier, I'll just ignore the flush if
1185                 * there is any data at all now available.
1186                 */
1187                if (prod_ptr == cons_ptr) {
1188                        loop_counter = 0;
1189                        while (readl(&port->ip_serial_regs->sscr) &
1190                               SSCR_RX_DRAIN) {
1191                                loop_counter++;
1192                                if (loop_counter > MAXITER)
1193                                        return -1;
1194                        }
1195
1196                        /* SIGH. We have to reload the prod_ptr *again* since
1197                         * the drain may have caused it to change
1198                         */
1199                        prod_ptr = readl(&port->ip_serial_regs->srpir)
1200                            & PROD_CONS_MASK;
1201                }
1202                if (reset_dma) {
1203                        port->ip_sscr &= ~SSCR_DMA_EN;
1204                        writel(port->ip_sscr, &port->ip_serial_regs->sscr);
1205                }
1206        }
1207        inring = port->ip_inring;
1208        port->ip_flags &= ~READ_ABORTED;
1209
1210        total = 0;
1211        loop_counter = 0xfffff; /* to avoid hangs */
1212
1213        /* Grab bytes from the hardware */
1214        while ((prod_ptr != cons_ptr) && (len > 0)) {
1215                entry = (struct ring_entry *)((caddr_t) inring + cons_ptr);
1216
1217                if (loop_counter-- <= 0) {
1218                        printk(KERN_WARNING "IOC3 serial: "
1219                               "possible hang condition/"
1220                               "port stuck on read (line %d).\n",
1221                                the_port->line);
1222                        break;
1223                }
1224
1225                /* According to the producer pointer, this ring entry
1226                 * must contain some data.  But if the PIO happened faster
1227                 * than the DMA, the data may not be available yet, so let's
1228                 * wait until it arrives.
1229                 */
1230                if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
1231                        /* Indicate the read is aborted so we don't disable
1232                         * the interrupt thinking that the consumer is
1233                         * congested.
1234                         */
1235                        port->ip_flags |= READ_ABORTED;
1236                        len = 0;
1237                        break;
1238                }
1239
1240                /* Load the bytes/status out of the ring entry */
1241                for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) {
1242                        sc = &(entry->ring_sc[byte_num]);
1243
1244                        /* Check for change in modem state or overrun */
1245                        if ((*sc & RXSB_MODEM_VALID)
1246                            && (port->ip_notify & N_DDCD)) {
1247                                /* Notify upper layer if DCD dropped */
1248                                if ((port->ip_flags & DCD_ON)
1249                                    && !(*sc & RXSB_DCD)) {
1250                                        /* If we have already copied some data,
1251                                         * return it.  We'll pick up the carrier
1252                                         * drop on the next pass.  That way we
1253                                         * don't throw away the data that has
1254                                         * already been copied back to
1255                                         * the caller's buffer.
1256                                         */
1257                                        if (total > 0) {
1258                                                len = 0;
1259                                                break;
1260                                        }
1261                                        port->ip_flags &= ~DCD_ON;
1262
1263                                        /* Turn off this notification so the
1264                                         * carrier drop protocol won't see it
1265                                         * again when it does a read.
1266                                         */
1267                                        *sc &= ~RXSB_MODEM_VALID;
1268
1269                                        /* To keep things consistent, we need
1270                                         * to update the consumer pointer so
1271                                         * the next reader won't come in and
1272                                         * try to read the same ring entries
1273                                         * again. This must be done here before
1274                                         * the dcd change.
1275                                         */
1276
1277                                        if ((entry->ring_allsc & RING_ANY_VALID)
1278                                            == 0) {
1279                                                cons_ptr += (int)sizeof
1280                                                    (struct ring_entry);
1281                                                cons_ptr &= PROD_CONS_MASK;
1282                                        }
1283                                        writel(cons_ptr,
1284                                               &port->ip_serial_regs->srcir);
1285                                        port->ip_rx_cons = cons_ptr;
1286
1287                                        /* Notify upper layer of carrier drop */
1288                                        if ((port->ip_notify & N_DDCD)
1289                                            && port->ip_port) {
1290                                                uart_handle_dcd_change
1291                                                        (port->ip_port, 0);
1292                                                wake_up_interruptible
1293                                                    (&the_port->state->
1294                                                     port.delta_msr_wait);
1295                                        }
1296
1297                                        /* If we had any data to return, we
1298                                         * would have returned it above.
1299                                         */
1300                                        return 0;
1301                                }
1302                        }
1303                        if (*sc & RXSB_MODEM_VALID) {
1304                                /* Notify that an input overrun occurred */
1305                                if ((*sc & RXSB_OVERRUN)
1306                                    && (port->ip_notify & N_OVERRUN_ERROR)) {
1307                                        ioc3_cb_post_ncs(the_port, NCS_OVERRUN);
1308                                }
1309                                /* Don't look at this byte again */
1310                                *sc &= ~RXSB_MODEM_VALID;
1311                        }
1312
1313                        /* Check for valid data or RX errors */
1314                        if ((*sc & RXSB_DATA_VALID) &&
1315                            ((*sc & (RXSB_PAR_ERR
1316                                     | RXSB_FRAME_ERR | RXSB_BREAK))
1317                             && (port->ip_notify & (N_PARITY_ERROR
1318                                                    | N_FRAMING_ERROR
1319                                                    | N_BREAK)))) {
1320                                /* There is an error condition on the next byte.
1321                                 * If we have already transferred some bytes,
1322                                 * we'll stop here. Otherwise if this is the
1323                                 * first byte to be read, we'll just transfer
1324                                 * it alone after notifying the
1325                                 * upper layer of its status.
1326                                 */
1327                                if (total > 0) {
1328                                        len = 0;
1329                                        break;
1330                                } else {
1331                                        if ((*sc & RXSB_PAR_ERR) &&
1332                                            (port->
1333                                             ip_notify & N_PARITY_ERROR)) {
1334                                                ioc3_cb_post_ncs(the_port,
1335                                                                 NCS_PARITY);
1336                                        }
1337                                        if ((*sc & RXSB_FRAME_ERR) &&
1338                                            (port->
1339                                             ip_notify & N_FRAMING_ERROR)) {
1340                                                ioc3_cb_post_ncs(the_port,
1341                                                                 NCS_FRAMING);
1342                                        }
1343                                        if ((*sc & RXSB_BREAK)
1344                                            && (port->ip_notify & N_BREAK)) {
1345                                                ioc3_cb_post_ncs
1346                                                    (the_port, NCS_BREAK);
1347                                        }
1348                                        len = 1;
1349                                }
1350                        }
1351                        if (*sc & RXSB_DATA_VALID) {
1352                                *sc &= ~RXSB_DATA_VALID;
1353                                *buf = entry->ring_data[byte_num];
1354                                buf++;
1355                                len--;
1356                                total++;
1357                        }
1358                }
1359
1360                /* If we used up this entry entirely, go on to the next one,
1361                 * otherwise we must have run out of buffer space, so
1362                 * leave the consumer pointer here for the next read in case
1363                 * there are still unread bytes in this entry.
1364                 */
1365                if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
1366                        cons_ptr += (int)sizeof(struct ring_entry);
1367                        cons_ptr &= PROD_CONS_MASK;
1368                }
1369        }
1370
1371        /* Update consumer pointer and re-arm rx timer interrupt */
1372        writel(cons_ptr, &port->ip_serial_regs->srcir);
1373        port->ip_rx_cons = cons_ptr;
1374
1375        /* If we have now dipped below the rx high water mark and we have
1376         * rx_high interrupt turned off, we can now turn it back on again.
1377         */
1378        if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr)
1379                                               & PROD_CONS_MASK) <
1380                                              ((port->
1381                                                ip_sscr &
1382                                                SSCR_RX_THRESHOLD)
1383                                               << PROD_CONS_PTR_OFF))) {
1384                port->ip_flags &= ~INPUT_HIGH;
1385                enable_intrs(port, hooks->intr_rx_high);
1386        }
1387        return total;
1388}
1389
1390/**
1391 * receive_chars - upper level read.
1392 * @the_port: port to read from
1393 */
1394static int receive_chars(struct uart_port *the_port)
1395{
1396        unsigned char ch[MAX_CHARS];
1397        int read_count = 0, read_room, flip = 0;
1398        struct uart_state *state = the_port->state;
1399        struct ioc3_port *port = get_ioc3_port(the_port);
1400        unsigned long pflags;
1401
1402        /* Make sure all the pointers are "good" ones */
1403        if (!state)
1404                return 0;
1405
1406        if (!(port->ip_flags & INPUT_ENABLE))
1407                return 0;
1408
1409        spin_lock_irqsave(&the_port->lock, pflags);
1410
1411        read_count = do_read(the_port, ch, MAX_CHARS);
1412        if (read_count > 0) {
1413                flip = 1;
1414                read_room = tty_insert_flip_string(&state->port, ch,
1415                                read_count);
1416                the_port->icount.rx += read_count;
1417        }
1418        spin_unlock_irqrestore(&the_port->lock, pflags);
1419
1420        if (flip)
1421                tty_flip_buffer_push(&state->port);
1422
1423        return read_count;
1424}
1425
1426/**
1427 * ioc3uart_intr_one - lowest level (per port) interrupt handler.
1428 * @is : submodule
1429 * @idd: driver data
1430 * @pending: interrupts to handle
1431 */
1432
1433static int inline
1434ioc3uart_intr_one(struct ioc3_submodule *is,
1435                        struct ioc3_driver_data *idd,
1436                        unsigned int pending)
1437{
1438        int port_num = GET_PORT_FROM_SIO_IR(pending);
1439        struct port_hooks *hooks;
1440        unsigned int rx_high_rd_aborted = 0;
1441        unsigned long flags;
1442        struct uart_port *the_port;
1443        struct ioc3_port *port;
1444        int loop_counter;
1445        struct ioc3_card *card_ptr;
1446        unsigned int sio_ir;
1447
1448        card_ptr = idd->data[is->id];
1449        port = card_ptr->ic_port[port_num].icp_port;
1450        hooks = port->ip_hooks;
1451
1452        /* Possible race condition here: The tx_mt interrupt bit may be
1453         * cleared without the intervention of the interrupt handler,
1454         * e.g. by a write.  If the top level interrupt handler reads a
1455         * tx_mt, then some other processor does a write, starting up
1456         * output, then we come in here, see the tx_mt and stop DMA, the
1457         * output started by the other processor will hang.  Thus we can
1458         * only rely on tx_mt being legitimate if it is read while the
1459         * port lock is held.  Therefore this bit must be ignored in the
1460         * passed in interrupt mask which was read by the top level
1461         * interrupt handler since the port lock was not held at the time
1462         * it was read.  We can only rely on this bit being accurate if it
1463         * is read while the port lock is held.  So we'll clear it for now,
1464         * and reload it later once we have the port lock.
1465         */
1466
1467        sio_ir = pending & ~(hooks->intr_tx_mt);
1468        spin_lock_irqsave(&port->ip_lock, flags);
1469
1470        loop_counter = MAXITER; /* to avoid hangs */
1471
1472        do {
1473                uint32_t shadow;
1474
1475                if (loop_counter-- <= 0) {
1476                        printk(KERN_WARNING "IOC3 serial: "
1477                               "possible hang condition/"
1478                               "port stuck on interrupt (line %d).\n",
1479                                ((struct uart_port *)port->ip_port)->line);
1480                        break;
1481                }
1482                /* Handle a DCD change */
1483                if (sio_ir & hooks->intr_delta_dcd) {
1484                        ioc3_ack(is, idd, hooks->intr_delta_dcd);
1485                        shadow = readl(&port->ip_serial_regs->shadow);
1486
1487                        if ((port->ip_notify & N_DDCD)
1488                            && (shadow & SHADOW_DCD)
1489                            && (port->ip_port)) {
1490                                the_port = port->ip_port;
1491                                uart_handle_dcd_change(the_port,
1492                                                shadow & SHADOW_DCD);
1493                                wake_up_interruptible
1494                                    (&the_port->state->port.delta_msr_wait);
1495                        } else if ((port->ip_notify & N_DDCD)
1496                                   && !(shadow & SHADOW_DCD)) {
1497                                /* Flag delta DCD/no DCD */
1498                                uart_handle_dcd_change(port->ip_port,
1499                                                shadow & SHADOW_DCD);
1500                                port->ip_flags |= DCD_ON;
1501                        }
1502                }
1503
1504                /* Handle a CTS change */
1505                if (sio_ir & hooks->intr_delta_cts) {
1506                        ioc3_ack(is, idd, hooks->intr_delta_cts);
1507                        shadow = readl(&port->ip_serial_regs->shadow);
1508
1509                        if ((port->ip_notify & N_DCTS) && (port->ip_port)) {
1510                                the_port = port->ip_port;
1511                                uart_handle_cts_change(the_port, shadow
1512                                                & SHADOW_CTS);
1513                                wake_up_interruptible
1514                                    (&the_port->state->port.delta_msr_wait);
1515                        }
1516                }
1517
1518                /* rx timeout interrupt.  Must be some data available.  Put this
1519                 * before the check for rx_high since servicing this condition
1520                 * may cause that condition to clear.
1521                 */
1522                if (sio_ir & hooks->intr_rx_timer) {
1523                        ioc3_ack(is, idd, hooks->intr_rx_timer);
1524                        if ((port->ip_notify & N_DATA_READY)
1525                                                && (port->ip_port)) {
1526                                receive_chars(port->ip_port);
1527                        }
1528                }
1529
1530                /* rx high interrupt. Must be after rx_timer.  */
1531                else if (sio_ir & hooks->intr_rx_high) {
1532                        /* Data available, notify upper layer */
1533                        if ((port->ip_notify & N_DATA_READY) && port->ip_port) {
1534                                receive_chars(port->ip_port);
1535                        }
1536
1537                        /* We can't ACK this interrupt.  If receive_chars didn't
1538                         * cause the condition to clear, we'll have to disable
1539                         * the interrupt until the data is drained.
1540                         * If the read was aborted, don't disable the interrupt
1541                         * as this may cause us to hang indefinitely.  An
1542                         * aborted read generally means that this interrupt
1543                         * hasn't been delivered to the cpu yet anyway, even
1544                         * though we see it as asserted when we read the sio_ir.
1545                         */
1546                        if ((sio_ir = PENDING(card_ptr, idd))
1547                                        & hooks->intr_rx_high) {
1548                                if (port->ip_flags & READ_ABORTED) {
1549                                        rx_high_rd_aborted++;
1550                                }
1551                                else {
1552                                        card_ptr->ic_enable &= ~hooks->intr_rx_high;
1553                                        port->ip_flags |= INPUT_HIGH;
1554                                }
1555                        }
1556                }
1557
1558                /* We got a low water interrupt: notify upper layer to
1559                 * send more data.  Must come before tx_mt since servicing
1560                 * this condition may cause that condition to clear.
1561                 */
1562                if (sio_ir & hooks->intr_tx_explicit) {
1563                        port->ip_flags &= ~LOWAT_WRITTEN;
1564                        ioc3_ack(is, idd, hooks->intr_tx_explicit);
1565                        if (port->ip_notify & N_OUTPUT_LOWAT)
1566                                ioc3_cb_output_lowat(port);
1567                }
1568
1569                /* Handle tx_mt.  Must come after tx_explicit.  */
1570                else if (sio_ir & hooks->intr_tx_mt) {
1571                        /* If we are expecting a lowat notification
1572                         * and we get to this point it probably means that for
1573                         * some reason the tx_explicit didn't work as expected
1574                         * (that can legitimately happen if the output buffer is
1575                         * filled up in just the right way).
1576                         * So send the notification now.
1577                         */
1578                        if (port->ip_notify & N_OUTPUT_LOWAT) {
1579                                ioc3_cb_output_lowat(port);
1580
1581                                /* We need to reload the sio_ir since the lowat
1582                                 * call may have caused another write to occur,
1583                                 * clearing the tx_mt condition.
1584                                 */
1585                                sio_ir = PENDING(card_ptr, idd);
1586                        }
1587
1588                        /* If the tx_mt condition still persists even after the
1589                         * lowat call, we've got some work to do.
1590                         */
1591                        if (sio_ir & hooks->intr_tx_mt) {
1592                                /* If we are not currently expecting DMA input,
1593                                 * and the transmitter has just gone idle,
1594                                 * there is no longer any reason for DMA, so
1595                                 * disable it.
1596                                 */
1597                                if (!(port->ip_notify
1598                                      & (N_DATA_READY | N_DDCD))) {
1599                                        BUG_ON(!(port->ip_sscr
1600                                                 & SSCR_DMA_EN));
1601                                        port->ip_sscr &= ~SSCR_DMA_EN;
1602                                        writel(port->ip_sscr,
1603                                               &port->ip_serial_regs->sscr);
1604                                }
1605                                /* Prevent infinite tx_mt interrupt */
1606                                card_ptr->ic_enable &= ~hooks->intr_tx_mt;
1607                        }
1608                }
1609                sio_ir = PENDING(card_ptr, idd);
1610
1611                /* if the read was aborted and only hooks->intr_rx_high,
1612                 * clear hooks->intr_rx_high, so we do not loop forever.
1613                 */
1614
1615                if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) {
1616                        sio_ir &= ~hooks->intr_rx_high;
1617                }
1618        } while (sio_ir & hooks->intr_all);
1619
1620        spin_unlock_irqrestore(&port->ip_lock, flags);
1621        ioc3_enable(is, idd, card_ptr->ic_enable);
1622        return 0;
1623}
1624
1625/**
1626 * ioc3uart_intr - field all serial interrupts
1627 * @is : submodule
1628 * @idd: driver data
1629 * @pending: interrupts to handle
1630 *
1631 */
1632
1633static int ioc3uart_intr(struct ioc3_submodule *is,
1634                        struct ioc3_driver_data *idd,
1635                        unsigned int pending)
1636{
1637        int ret = 0;
1638
1639        /*
1640         * The upper level interrupt handler sends interrupts for both ports
1641         * here. So we need to call for each port with its interrupts.
1642         */
1643
1644        if (pending & SIO_IR_SA)
1645                ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA);
1646        if (pending & SIO_IR_SB)
1647                ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB);
1648
1649        return ret;
1650}
1651
1652/**
1653 * ic3_type
1654 * @port: Port to operate with (we ignore since we only have one port)
1655 *
1656 */
1657static const char *ic3_type(struct uart_port *the_port)
1658{
1659        if (IS_RS232(the_port->line))
1660                return "SGI IOC3 Serial [rs232]";
1661        else
1662                return "SGI IOC3 Serial [rs422]";
1663}
1664
1665/**
1666 * ic3_tx_empty - Is the transmitter empty?
1667 * @port: Port to operate on
1668 *
1669 */
1670static unsigned int ic3_tx_empty(struct uart_port *the_port)
1671{
1672        unsigned int ret = 0;
1673        struct ioc3_port *port = get_ioc3_port(the_port);
1674
1675        if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT)
1676                ret = TIOCSER_TEMT;
1677        return ret;
1678}
1679
1680/**
1681 * ic3_stop_tx - stop the transmitter
1682 * @port: Port to operate on
1683 *
1684 */
1685static void ic3_stop_tx(struct uart_port *the_port)
1686{
1687        struct ioc3_port *port = get_ioc3_port(the_port);
1688
1689        if (port)
1690                set_notification(port, N_OUTPUT_LOWAT, 0);
1691}
1692
1693/**
1694 * ic3_stop_rx - stop the receiver
1695 * @port: Port to operate on
1696 *
1697 */
1698static void ic3_stop_rx(struct uart_port *the_port)
1699{
1700        struct ioc3_port *port = get_ioc3_port(the_port);
1701
1702        if (port)
1703                port->ip_flags &= ~INPUT_ENABLE;
1704}
1705
1706/**
1707 * null_void_function
1708 * @port: Port to operate on
1709 *
1710 */
1711static void null_void_function(struct uart_port *the_port)
1712{
1713}
1714
1715/**
1716 * ic3_shutdown - shut down the port - free irq and disable
1717 * @port: port to shut down
1718 *
1719 */
1720static void ic3_shutdown(struct uart_port *the_port)
1721{
1722        unsigned long port_flags;
1723        struct ioc3_port *port;
1724        struct uart_state *state;
1725
1726        port = get_ioc3_port(the_port);
1727        if (!port)
1728                return;
1729
1730        state = the_port->state;
1731        wake_up_interruptible(&state->port.delta_msr_wait);
1732
1733        spin_lock_irqsave(&the_port->lock, port_flags);
1734        set_notification(port, N_ALL, 0);
1735        spin_unlock_irqrestore(&the_port->lock, port_flags);
1736}
1737
1738/**
1739 * ic3_set_mctrl - set control lines (dtr, rts, etc)
1740 * @port: Port to operate on
1741 * @mctrl: Lines to set/unset
1742 *
1743 */
1744static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl)
1745{
1746        unsigned char mcr = 0;
1747
1748        if (mctrl & TIOCM_RTS)
1749                mcr |= UART_MCR_RTS;
1750        if (mctrl & TIOCM_DTR)
1751                mcr |= UART_MCR_DTR;
1752        if (mctrl & TIOCM_OUT1)
1753                mcr |= UART_MCR_OUT1;
1754        if (mctrl & TIOCM_OUT2)
1755                mcr |= UART_MCR_OUT2;
1756        if (mctrl & TIOCM_LOOP)
1757                mcr |= UART_MCR_LOOP;
1758
1759        set_mcr(the_port, mcr, SHADOW_DTR);
1760}
1761
1762/**
1763 * ic3_get_mctrl - get control line info
1764 * @port: port to operate on
1765 *
1766 */
1767static unsigned int ic3_get_mctrl(struct uart_port *the_port)
1768{
1769        struct ioc3_port *port = get_ioc3_port(the_port);
1770        uint32_t shadow;
1771        unsigned int ret = 0;
1772
1773        if (!port)
1774                return 0;
1775
1776        shadow = readl(&port->ip_serial_regs->shadow);
1777        if (shadow & SHADOW_DCD)
1778                ret |= TIOCM_CD;
1779        if (shadow & SHADOW_DR)
1780                ret |= TIOCM_DSR;
1781        if (shadow & SHADOW_CTS)
1782                ret |= TIOCM_CTS;
1783        return ret;
1784}
1785
1786/**
1787 * ic3_start_tx - Start transmitter. Called with the_port->lock
1788 * @port: Port to operate on
1789 *
1790 */
1791static void ic3_start_tx(struct uart_port *the_port)
1792{
1793        struct ioc3_port *port = get_ioc3_port(the_port);
1794
1795        if (port) {
1796                set_notification(port, N_OUTPUT_LOWAT, 1);
1797                enable_intrs(port, port->ip_hooks->intr_tx_mt);
1798        }
1799}
1800
1801/**
1802 * ic3_break_ctl - handle breaks
1803 * @port: Port to operate on
1804 * @break_state: Break state
1805 *
1806 */
1807static void ic3_break_ctl(struct uart_port *the_port, int break_state)
1808{
1809}
1810
1811/**
1812 * ic3_startup - Start up the serial port - always return 0 (We're always on)
1813 * @port: Port to operate on
1814 *
1815 */
1816static int ic3_startup(struct uart_port *the_port)
1817{
1818        int retval;
1819        struct ioc3_port *port;
1820        struct ioc3_card *card_ptr;
1821        unsigned long port_flags;
1822
1823        if (!the_port) {
1824                NOT_PROGRESS();
1825                return -ENODEV;
1826        }
1827        port = get_ioc3_port(the_port);
1828        if (!port) {
1829                NOT_PROGRESS();
1830                return -ENODEV;
1831        }
1832        card_ptr = port->ip_card;
1833        port->ip_port = the_port;
1834
1835        if (!card_ptr) {
1836                NOT_PROGRESS();
1837                return -ENODEV;
1838        }
1839
1840        /* Start up the serial port */
1841        spin_lock_irqsave(&the_port->lock, port_flags);
1842        retval = ic3_startup_local(the_port);
1843        spin_unlock_irqrestore(&the_port->lock, port_flags);
1844        return retval;
1845}
1846
1847/**
1848 * ic3_set_termios - set termios stuff
1849 * @port: port to operate on
1850 * @termios: New settings
1851 * @termios: Old
1852 *
1853 */
1854static void
1855ic3_set_termios(struct uart_port *the_port,
1856                struct ktermios *termios, struct ktermios *old_termios)
1857{
1858        unsigned long port_flags;
1859
1860        spin_lock_irqsave(&the_port->lock, port_flags);
1861        ioc3_change_speed(the_port, termios, old_termios);
1862        spin_unlock_irqrestore(&the_port->lock, port_flags);
1863}
1864
1865/**
1866 * ic3_request_port - allocate resources for port - no op....
1867 * @port: port to operate on
1868 *
1869 */
1870static int ic3_request_port(struct uart_port *port)
1871{
1872        return 0;
1873}
1874
1875/* Associate the uart functions above - given to serial core */
1876static struct uart_ops ioc3_ops = {
1877        .tx_empty = ic3_tx_empty,
1878        .set_mctrl = ic3_set_mctrl,
1879        .get_mctrl = ic3_get_mctrl,
1880        .stop_tx = ic3_stop_tx,
1881        .start_tx = ic3_start_tx,
1882        .stop_rx = ic3_stop_rx,
1883        .enable_ms = null_void_function,
1884        .break_ctl = ic3_break_ctl,
1885        .startup = ic3_startup,
1886        .shutdown = ic3_shutdown,
1887        .set_termios = ic3_set_termios,
1888        .type = ic3_type,
1889        .release_port = null_void_function,
1890        .request_port = ic3_request_port,
1891};
1892
1893/*
1894 * Boot-time initialization code
1895 */
1896
1897static struct uart_driver ioc3_uart = {
1898        .owner = THIS_MODULE,
1899        .driver_name = "ioc3_serial",
1900        .dev_name = DEVICE_NAME,
1901        .major = DEVICE_MAJOR,
1902        .minor = DEVICE_MINOR,
1903        .nr = MAX_LOGICAL_PORTS
1904};
1905
1906/**
1907 * ioc3_serial_core_attach - register with serial core
1908 *              This is done during pci probing
1909 * @is: submodule struct for this
1910 * @idd: handle for this card
1911 */
1912static inline int ioc3_serial_core_attach( struct ioc3_submodule *is,
1913                                struct ioc3_driver_data *idd)
1914{
1915        struct ioc3_port *port;
1916        struct uart_port *the_port;
1917        struct ioc3_card *card_ptr = idd->data[is->id];
1918        int ii, phys_port;
1919        struct pci_dev *pdev = idd->pdev;
1920
1921        DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n",
1922                       __func__, pdev, (void *)card_ptr));
1923
1924        if (!card_ptr)
1925                return -ENODEV;
1926
1927        /* once around for each logical port on this card */
1928        for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
1929                phys_port = GET_PHYSICAL_PORT(ii);
1930                the_port = &card_ptr->ic_port[phys_port].
1931                                icp_uart_port[GET_LOGICAL_PORT(ii)];
1932                port = card_ptr->ic_port[phys_port].icp_port;
1933                port->ip_port = the_port;
1934
1935                DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n",
1936                        __func__, (void *)the_port, (void *)port,
1937                                phys_port, ii));
1938
1939                /* membase, iobase and mapbase just need to be non-0 */
1940                the_port->membase = (unsigned char __iomem *)1;
1941                the_port->iobase = (pdev->bus->number << 16) |  ii;
1942                the_port->line = (Num_of_ioc3_cards << 2) | ii;
1943                the_port->mapbase = 1;
1944                the_port->type = PORT_16550A;
1945                the_port->fifosize = FIFO_SIZE;
1946                the_port->ops = &ioc3_ops;
1947                the_port->irq = idd->irq_io;
1948                the_port->dev = &pdev->dev;
1949
1950                if (uart_add_one_port(&ioc3_uart, the_port) < 0) {
1951                        printk(KERN_WARNING
1952                          "%s: unable to add port %d bus %d\n",
1953                               __func__, the_port->line, pdev->bus->number);
1954                } else {
1955                        DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n",
1956                          the_port->line, the_port->irq, pdev->bus->number));
1957                }
1958
1959                /* all ports are rs232 for now */
1960                if (IS_PHYSICAL_PORT(ii))
1961                        ioc3_set_proto(port, PROTO_RS232);
1962        }
1963        return 0;
1964}
1965
1966/**
1967 * ioc3uart_remove - register detach function
1968 * @is: submodule struct for this submodule
1969 * @idd: ioc3 driver data for this submodule
1970 */
1971
1972static int ioc3uart_remove(struct ioc3_submodule *is,
1973                        struct ioc3_driver_data *idd)
1974{
1975        struct ioc3_card *card_ptr = idd->data[is->id];
1976        struct uart_port *the_port;
1977        struct ioc3_port *port;
1978        int ii;
1979
1980        if (card_ptr) {
1981                for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
1982                        the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
1983                                        icp_uart_port[GET_LOGICAL_PORT(ii)];
1984                        if (the_port)
1985                                uart_remove_one_port(&ioc3_uart, the_port);
1986                        port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port;
1987                        if (port && IS_PHYSICAL_PORT(ii)
1988                                        && (GET_PHYSICAL_PORT(ii) == 0)) {
1989                                pci_free_consistent(port->ip_idd->pdev,
1990                                        TOTAL_RING_BUF_SIZE,
1991                                        (void *)port->ip_cpu_ringbuf,
1992                                        port->ip_dma_ringbuf);
1993                                kfree(port);
1994                                card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
1995                                                        icp_port = NULL;
1996                        }
1997                }
1998                kfree(card_ptr);
1999                idd->data[is->id] = NULL;
2000        }
2001        return 0;
2002}
2003
2004/**
2005 * ioc3uart_probe - card probe function called from shim driver
2006 * @is: submodule struct for this submodule
2007 * @idd: ioc3 driver data for this card
2008 */
2009
2010static int
2011ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
2012{
2013        struct pci_dev *pdev = idd->pdev;
2014        struct ioc3_card *card_ptr;
2015        int ret = 0;
2016        struct ioc3_port *port;
2017        struct ioc3_port *ports[PORTS_PER_CARD];
2018        int phys_port;
2019        int cnt;
2020
2021        DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __func__, is, idd));
2022
2023        card_ptr = kzalloc(sizeof(struct ioc3_card), GFP_KERNEL);
2024        if (!card_ptr) {
2025                printk(KERN_WARNING "ioc3_attach_one"
2026                       ": unable to get memory for the IOC3\n");
2027                return -ENOMEM;
2028        }
2029        idd->data[is->id] = card_ptr;
2030        Submodule_slot = is->id;
2031
2032        writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) |
2033                ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) |
2034                (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr);
2035
2036        pci_write_config_dword(pdev, PCI_LAT, 0xff00);
2037
2038        /* Enable serial port mode select generic PIO pins as outputs */
2039        ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL);
2040
2041        /* Create port structures for each port */
2042        for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) {
2043                port = kzalloc(sizeof(struct ioc3_port), GFP_KERNEL);
2044                if (!port) {
2045                        printk(KERN_WARNING
2046                               "IOC3 serial memory not available for port\n");
2047                        ret = -ENOMEM;
2048                        goto out4;
2049                }
2050                spin_lock_init(&port->ip_lock);
2051
2052                /* we need to remember the previous ones, to point back to
2053                 * them farther down - setting up the ring buffers.
2054                 */
2055                ports[phys_port] = port;
2056
2057                /* init to something useful */
2058                card_ptr->ic_port[phys_port].icp_port = port;
2059                port->ip_is = is;
2060                port->ip_idd = idd;
2061                port->ip_baud = 9600;
2062                port->ip_card = card_ptr;
2063                port->ip_hooks = &hooks_array[phys_port];
2064
2065                /* Setup each port */
2066                if (phys_port == 0) {
2067                        port->ip_serial_regs = &idd->vma->port_a;
2068                        port->ip_uart_regs = &idd->vma->sregs.uarta;
2069
2070                        DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p "
2071                                       "ip_uart_regs 0x%p\n",
2072                                       __func__,
2073                                       (void *)port->ip_serial_regs,
2074                                       (void *)port->ip_uart_regs));
2075
2076                        /* setup ring buffers */
2077                        port->ip_cpu_ringbuf = pci_alloc_consistent(pdev,
2078                                TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf);
2079
2080                        BUG_ON(!((((int64_t) port->ip_dma_ringbuf) &
2081                                  (TOTAL_RING_BUF_SIZE - 1)) == 0));
2082                        port->ip_inring = RING(port, RX_A);
2083                        port->ip_outring = RING(port, TX_A);
2084                        DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p "
2085                                       "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
2086                                        "ip_outring 0x%p\n",
2087                                       __func__,
2088                                       (void *)port->ip_cpu_ringbuf,
2089                                       (void *)port->ip_dma_ringbuf,
2090                                       (void *)port->ip_inring,
2091                                       (void *)port->ip_outring));
2092                }
2093                else {
2094                        port->ip_serial_regs = &idd->vma->port_b;
2095                        port->ip_uart_regs = &idd->vma->sregs.uartb;
2096
2097                        DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p "
2098                                       "ip_uart_regs 0x%p\n",
2099                                       __func__,
2100                                       (void *)port->ip_serial_regs,
2101                                       (void *)port->ip_uart_regs));
2102
2103                        /* share the ring buffers */
2104                        port->ip_dma_ringbuf =
2105                            ports[phys_port - 1]->ip_dma_ringbuf;
2106                        port->ip_cpu_ringbuf =
2107                            ports[phys_port - 1]->ip_cpu_ringbuf;
2108                        port->ip_inring = RING(port, RX_B);
2109                        port->ip_outring = RING(port, TX_B);
2110                        DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p "
2111                                       "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
2112                                        "ip_outring 0x%p\n",
2113                                       __func__,
2114                                       (void *)port->ip_cpu_ringbuf,
2115                                       (void *)port->ip_dma_ringbuf,
2116                                       (void *)port->ip_inring,
2117                                       (void *)port->ip_outring));
2118                }
2119
2120                DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p",
2121                               __func__,
2122                               phys_port, (void *)port, (void *)card_ptr));
2123                DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n",
2124                               (void *)port->ip_serial_regs,
2125                               (void *)port->ip_uart_regs));
2126
2127                /* Initialize the hardware for IOC3 */
2128                port_init(port);
2129
2130                DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p "
2131                               "outring 0x%p\n",
2132                               __func__,
2133                               phys_port, (void *)port,
2134                               (void *)port->ip_inring,
2135                               (void *)port->ip_outring));
2136
2137        }
2138
2139        /* register port with the serial core */
2140
2141        if ((ret = ioc3_serial_core_attach(is, idd)))
2142                goto out4;
2143
2144        Num_of_ioc3_cards++;
2145
2146        return ret;
2147
2148        /* error exits that give back resources */
2149out4:
2150        for (cnt = 0; cnt < phys_port; cnt++)
2151                kfree(ports[cnt]);
2152
2153        kfree(card_ptr);
2154        return ret;
2155}
2156
2157static struct ioc3_submodule ioc3uart_ops = {
2158        .name = "IOC3uart",
2159        .probe = ioc3uart_probe,
2160        .remove = ioc3uart_remove,
2161        /* call .intr for both ports initially */
2162        .irq_mask = SIO_IR_SA | SIO_IR_SB,
2163        .intr = ioc3uart_intr,
2164        .owner = THIS_MODULE,
2165};
2166
2167/**
2168 * ioc3_detect - module init called,
2169 */
2170static int __init ioc3uart_init(void)
2171{
2172        int ret;
2173
2174        /* register with serial core */
2175        if ((ret = uart_register_driver(&ioc3_uart)) < 0) {
2176                printk(KERN_WARNING
2177                       "%s: Couldn't register IOC3 uart serial driver\n",
2178                       __func__);
2179                return ret;
2180        }
2181        ret = ioc3_register_submodule(&ioc3uart_ops);
2182        if (ret)
2183                uart_unregister_driver(&ioc3_uart);
2184        return ret;
2185}
2186
2187static void __exit ioc3uart_exit(void)
2188{
2189        ioc3_unregister_submodule(&ioc3uart_ops);
2190        uart_unregister_driver(&ioc3_uart);
2191}
2192
2193module_init(ioc3uart_init);
2194module_exit(ioc3uart_exit);
2195
2196MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>");
2197MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card");
2198MODULE_LICENSE("GPL");
2199