LXR linux/drivers/usb/musb/musb

   1/*
   2 * MUSB OTG driver defines
   3 *
   4 * Copyright 2005 Mentor Graphics Corporation
   5 * Copyright (C) 2005-2006 by Texas Instruments
   6 * Copyright (C) 2006-2007 Nokia Corporation
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License
  10 * version 2 as published by the Free Software Foundation.
  11 *
  12 * This program is distributed in the hope that it will be useful, but
  13 * WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20 * 02110-1301 USA
  21 *
  22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 *
  33 */
  34
  35#ifndef __MUSB_CORE_H__
  36#define __MUSB_CORE_H__
  37
  38#include <linux/slab.h>
  39#include <linux/list.h>
  40#include <linux/interrupt.h>
  41#include <linux/errno.h>
  42#include <linux/timer.h>
  43#include <linux/device.h>
  44#include <linux/usb/ch9.h>
  45#include <linux/usb/gadget.h>
  46#include <linux/usb.h>
  47#include <linux/usb/otg.h>
  48#include <linux/usb/musb.h>
  49
  50struct musb;
  51struct musb_hw_ep;
  52struct musb_ep;
  53
  54/* Helper defines for struct musb->hwvers */
  55#define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  56#define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  57#define MUSB_HWVERS_RC          0x8000
  58#define MUSB_HWVERS_1300        0x52C
  59#define MUSB_HWVERS_1400        0x590
  60#define MUSB_HWVERS_1800        0x720
  61#define MUSB_HWVERS_1900        0x784
  62#define MUSB_HWVERS_2000        0x800
  63
  64#include "musb_debug.h"
  65#include "musb_dma.h"
  66
  67#include "musb_io.h"
  68#include "musb_regs.h"
  69
  70#include "musb_gadget.h"
  71#include <linux/usb/hcd.h>
  72#include "musb_host.h"
  73
  74/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  75 * OTG or host-only go to A_IDLE when ID is sensed.
  76 */
  77#define is_peripheral_active(m)         (!(m)->is_host)
  78#define is_host_active(m)               ((m)->is_host)
  79
  80#ifdef CONFIG_PROC_FS
  81#include <linux/fs.h>
  82#define MUSB_CONFIG_PROC_FS
  83#endif
  84
  85/****************************** PERIPHERAL ROLE *****************************/
  86
  87extern irqreturn_t musb_g_ep0_irq(struct musb *);
  88extern void musb_g_tx(struct musb *, u8);
  89extern void musb_g_rx(struct musb *, u8);
  90extern void musb_g_reset(struct musb *);
  91extern void musb_g_suspend(struct musb *);
  92extern void musb_g_resume(struct musb *);
  93extern void musb_g_wakeup(struct musb *);
  94extern void musb_g_disconnect(struct musb *);
  95
  96/****************************** HOST ROLE ***********************************/
  97
  98extern irqreturn_t musb_h_ep0_irq(struct musb *);
  99extern void musb_host_tx(struct musb *, u8);
 100extern void musb_host_rx(struct musb *, u8);
 101
 102/****************************** CONSTANTS ********************************/
 103
 104#ifndef MUSB_C_NUM_EPS
 105#define MUSB_C_NUM_EPS ((u8)16)
 106#endif
 107
 108#ifndef MUSB_MAX_END0_PACKET
 109#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
 110#endif
 111
 112/* host side ep0 states */
 113enum musb_h_ep0_state {
 114        MUSB_EP0_IDLE,
 115        MUSB_EP0_START,                 /* expect ack of setup */
 116        MUSB_EP0_IN,                    /* expect IN DATA */
 117        MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
 118        MUSB_EP0_STATUS,                /* expect ack of STATUS */
 119} __attribute__ ((packed));
 120
 121/* peripheral side ep0 states */
 122enum musb_g_ep0_state {
 123        MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
 124        MUSB_EP0_STAGE_SETUP,           /* received SETUP */
 125        MUSB_EP0_STAGE_TX,              /* IN data */
 126        MUSB_EP0_STAGE_RX,              /* OUT data */
 127        MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
 128        MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
 129        MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
 130} __attribute__ ((packed));
 131
 132/*
 133 * OTG protocol constants.  See USB OTG 1.3 spec,
 134 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 135 */
 136#define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
 137#define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
 138#define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
 139#define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
 140
 141
 142/*************************** REGISTER ACCESS ********************************/
 143
 144/* Endpoint registers (other than dynfifo setup) can be accessed either
 145 * directly with the "flat" model, or after setting up an index register.
 146 */
 147
 148#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
 149                || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
 150                || defined(CONFIG_ARCH_OMAP4)
 151/* REVISIT indexed access seemed to
 152 * misbehave (on DaVinci) for at least peripheral IN ...
 153 */
 154#define MUSB_FLAT_REG
 155#endif
 156
 157/* TUSB mapping: "flat" plus ep0 special cases */
 158#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 159        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 160#define musb_ep_select(_mbase, _epnum) \
 161        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 162#define MUSB_EP_OFFSET                  MUSB_TUSB_OFFSET
 163
 164/* "flat" mapping: each endpoint has its own i/o address */
 165#elif   defined(MUSB_FLAT_REG)
 166#define musb_ep_select(_mbase, _epnum)  (((void)(_mbase)), ((void)(_epnum)))
 167#define MUSB_EP_OFFSET                  MUSB_FLAT_OFFSET
 168
 169/* "indexed" mapping: INDEX register controls register bank select */
 170#else
 171#define musb_ep_select(_mbase, _epnum) \
 172        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 173#define MUSB_EP_OFFSET                  MUSB_INDEXED_OFFSET
 174#endif
 175
 176/****************************** FUNCTIONS ********************************/
 177
 178#define MUSB_HST_MODE(_musb)\
 179        { (_musb)->is_host = true; }
 180#define MUSB_DEV_MODE(_musb) \
 181        { (_musb)->is_host = false; }
 182
 183#define test_devctl_hst_mode(_x) \
 184        (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 185
 186#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 187
 188/******************************** TYPES *************************************/
 189
 190/**
 191 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 192 * @init:       turns on clocks, sets up platform-specific registers, etc
 193 * @exit:       undoes @init
 194 * @set_mode:   forcefully changes operating mode
 195 * @try_ilde:   tries to idle the IP
 196 * @vbus_status: returns vbus status if possible
 197 * @set_vbus:   forces vbus status
 198 * @adjust_channel_params: pre check for standard dma channel_program func
 199 */
 200struct musb_platform_ops {
 201        int     (*init)(struct musb *musb);
 202        int     (*exit)(struct musb *musb);
 203
 204        void    (*enable)(struct musb *musb);
 205        void    (*disable)(struct musb *musb);
 206
 207        int     (*set_mode)(struct musb *musb, u8 mode);
 208        void    (*try_idle)(struct musb *musb, unsigned long timeout);
 209
 210        int     (*vbus_status)(struct musb *musb);
 211        void    (*set_vbus)(struct musb *musb, int on);
 212
 213        int     (*adjust_channel_params)(struct dma_channel *channel,
 214                                u16 packet_sz, u8 *mode,
 215                                dma_addr_t *dma_addr, u32 *len);
 216};
 217
 218/*
 219 * struct musb_hw_ep - endpoint hardware (bidirectional)
 220 *
 221 * Ordered slightly for better cacheline locality.
 222 */
 223struct musb_hw_ep {
 224        struct musb             *musb;
 225        void __iomem            *fifo;
 226        void __iomem            *regs;
 227
 228#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 229        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 230        void __iomem            *conf;
 231#endif
 232
 233        /* index in musb->endpoints[]  */
 234        u8                      epnum;
 235
 236        /* hardware configuration, possibly dynamic */
 237        bool                    is_shared_fifo;
 238        bool                    tx_double_buffered;
 239        bool                    rx_double_buffered;
 240        u16                     max_packet_sz_tx;
 241        u16                     max_packet_sz_rx;
 242
 243        struct dma_channel      *tx_channel;
 244        struct dma_channel      *rx_channel;
 245
 246#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 247        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 248        /* TUSB has "asynchronous" and "synchronous" dma modes */
 249        dma_addr_t              fifo_async;
 250        dma_addr_t              fifo_sync;
 251        void __iomem            *fifo_sync_va;
 252#endif
 253
 254        void __iomem            *target_regs;
 255
 256        /* currently scheduled peripheral endpoint */
 257        struct musb_qh          *in_qh;
 258        struct musb_qh          *out_qh;
 259
 260        u8                      rx_reinit;
 261        u8                      tx_reinit;
 262
 263        /* peripheral side */
 264        struct musb_ep          ep_in;                  /* TX */
 265        struct musb_ep          ep_out;                 /* RX */
 266};
 267
 268static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 269{
 270        return next_request(&hw_ep->ep_in);
 271}
 272
 273static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 274{
 275        return next_request(&hw_ep->ep_out);
 276}
 277
 278struct musb_csr_regs {
 279        /* FIFO registers */
 280        u16 txmaxp, txcsr, rxmaxp, rxcsr;
 281        u16 rxfifoadd, txfifoadd;
 282        u8 txtype, txinterval, rxtype, rxinterval;
 283        u8 rxfifosz, txfifosz;
 284        u8 txfunaddr, txhubaddr, txhubport;
 285        u8 rxfunaddr, rxhubaddr, rxhubport;
 286};
 287
 288struct musb_context_registers {
 289
 290        u8 power;
 291        u8 intrusbe;
 292        u16 frame;
 293        u8 index, testmode;
 294
 295        u8 devctl, busctl, misc;
 296        u32 otg_interfsel;
 297
 298        struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 299};
 300
 301/*
 302 * struct musb - Driver instance data.
 303 */
 304struct musb {
 305        /* device lock */
 306        spinlock_t              lock;
 307
 308        const struct musb_platform_ops *ops;
 309        struct musb_context_registers context;
 310
 311        irqreturn_t             (*isr)(int, void *);
 312        struct work_struct      irq_work;
 313        u16                     hwvers;
 314
 315        u16                     intrrxe;
 316        u16                     intrtxe;
 317/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 318#define MUSB_PORT_STAT_RESUME   (1 << 31)
 319
 320        u32                     port1_status;
 321
 322        unsigned long           rh_timer;
 323
 324        enum musb_h_ep0_state   ep0_stage;
 325
 326        /* bulk traffic normally dedicates endpoint hardware, and each
 327         * direction has its own ring of host side endpoints.
 328         * we try to progress the transfer at the head of each endpoint's
 329         * queue until it completes or NAKs too much; then we try the next
 330         * endpoint.
 331         */
 332        struct musb_hw_ep       *bulk_ep;
 333
 334        struct list_head        control;        /* of musb_qh */
 335        struct list_head        in_bulk;        /* of musb_qh */
 336        struct list_head        out_bulk;       /* of musb_qh */
 337
 338        struct timer_list       otg_timer;
 339        struct notifier_block   nb;
 340
 341        struct dma_controller   *dma_controller;
 342
 343        struct device           *controller;
 344        void __iomem            *ctrl_base;
 345        void __iomem            *mregs;
 346
 347#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 348        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 349        dma_addr_t              async;
 350        dma_addr_t              sync;
 351        void __iomem            *sync_va;
 352#endif
 353
 354        /* passed down from chip/board specific irq handlers */
 355        u8                      int_usb;
 356        u16                     int_rx;
 357        u16                     int_tx;
 358
 359        struct usb_phy          *xceiv;
 360
 361        int nIrq;
 362        unsigned                irq_wake:1;
 363
 364        struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 365#define control_ep              endpoints
 366
 367#define VBUSERR_RETRY_COUNT     3
 368        u16                     vbuserr_retry;
 369        u16 epmask;
 370        u8 nr_endpoints;
 371
 372        int                     (*board_set_power)(int state);
 373
 374        u8                      min_power;      /* vbus for periph, in mA/2 */
 375
 376        bool                    is_host;
 377
 378        int                     a_wait_bcon;    /* VBUS timeout in msecs */
 379        unsigned long           idle_timeout;   /* Next timeout in jiffies */
 380
 381        /* active means connected and not suspended */
 382        unsigned                is_active:1;
 383
 384        unsigned is_multipoint:1;
 385        unsigned ignore_disconnect:1;   /* during bus resets */
 386
 387        unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 388        unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 389        unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 390
 391        unsigned                bulk_split:1;
 392#define can_bulk_split(musb,type) \
 393        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 394
 395        unsigned                bulk_combine:1;
 396#define can_bulk_combine(musb,type) \
 397        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 398
 399        /* is_suspended means USB B_PERIPHERAL suspend */
 400        unsigned                is_suspended:1;
 401
 402        /* may_wakeup means remote wakeup is enabled */
 403        unsigned                may_wakeup:1;
 404
 405        /* is_self_powered is reported in device status and the
 406         * config descriptor.  is_bus_powered means B_PERIPHERAL
 407         * draws some VBUS current; both can be true.
 408         */
 409        unsigned                is_self_powered:1;
 410        unsigned                is_bus_powered:1;
 411
 412        unsigned                set_address:1;
 413        unsigned                test_mode:1;
 414        unsigned                softconnect:1;
 415
 416        u8                      address;
 417        u8                      test_mode_nr;
 418        u16                     ackpend;                /* ep0 */
 419        enum musb_g_ep0_state   ep0_state;
 420        struct usb_gadget       g;                      /* the gadget */
 421        struct usb_gadget_driver *gadget_driver;        /* its driver */
 422
 423        /*
 424         * FIXME: Remove this flag.
 425         *
 426         * This is only added to allow Blackfin to work
 427         * with current driver. For some unknown reason
 428         * Blackfin doesn't work with double buffering
 429         * and that's enabled by default.
 430         *
 431         * We added this flag to forcefully disable double
 432         * buffering until we get it working.
 433         */
 434        unsigned                double_buffer_not_ok:1;
 435
 436        struct musb_hdrc_config *config;
 437
 438#ifdef MUSB_CONFIG_PROC_FS
 439        struct proc_dir_entry *proc_entry;
 440#endif
 441        int                     xceiv_old_state;
 442#ifdef CONFIG_DEBUG_FS
 443        struct dentry           *debugfs_root;
 444#endif
 445};
 446
 447static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 448{
 449        return container_of(g, struct musb, g);
 450}
 451
 452#ifdef CONFIG_BLACKFIN
 453static inline int musb_read_fifosize(struct musb *musb,
 454                struct musb_hw_ep *hw_ep, u8 epnum)
 455{
 456        musb->nr_endpoints++;
 457        musb->epmask |= (1 << epnum);
 458
 459        if (epnum < 5) {
 460                hw_ep->max_packet_sz_tx = 128;
 461                hw_ep->max_packet_sz_rx = 128;
 462        } else {
 463                hw_ep->max_packet_sz_tx = 1024;
 464                hw_ep->max_packet_sz_rx = 1024;
 465        }
 466        hw_ep->is_shared_fifo = false;
 467
 468        return 0;
 469}
 470
 471static inline void musb_configure_ep0(struct musb *musb)
 472{
 473        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 474        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 475        musb->endpoints[0].is_shared_fifo = true;
 476}
 477
 478#else
 479
 480static inline int musb_read_fifosize(struct musb *musb,
 481                struct musb_hw_ep *hw_ep, u8 epnum)
 482{
 483        void __iomem *mbase = musb->mregs;
 484        u8 reg = 0;
 485
 486        /* read from core using indexed model */
 487        reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
 488        /* 0's returned when no more endpoints */
 489        if (!reg)
 490                return -ENODEV;
 491
 492        musb->nr_endpoints++;
 493        musb->epmask |= (1 << epnum);
 494
 495        hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 496
 497        /* shared TX/RX FIFO? */
 498        if ((reg & 0xf0) == 0xf0) {
 499                hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 500                hw_ep->is_shared_fifo = true;
 501                return 0;
 502        } else {
 503                hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 504                hw_ep->is_shared_fifo = false;
 505        }
 506
 507        return 0;
 508}
 509
 510static inline void musb_configure_ep0(struct musb *musb)
 511{
 512        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 513        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 514        musb->endpoints[0].is_shared_fifo = true;
 515}
 516#endif /* CONFIG_BLACKFIN */
 517
 518
 519/***************************** Glue it together *****************************/
 520
 521extern const char musb_driver_name[];
 522
 523extern void musb_start(struct musb *musb);
 524extern void musb_stop(struct musb *musb);
 525
 526extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 527extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 528
 529extern void musb_load_testpacket(struct musb *);
 530
 531extern irqreturn_t musb_interrupt(struct musb *);
 532
 533extern void musb_hnp_stop(struct musb *musb);
 534
 535static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 536{
 537        if (musb->ops->set_vbus)
 538                musb->ops->set_vbus(musb, is_on);
 539}
 540
 541static inline void musb_platform_enable(struct musb *musb)
 542{
 543        if (musb->ops->enable)
 544                musb->ops->enable(musb);
 545}
 546
 547static inline void musb_platform_disable(struct musb *musb)
 548{
 549        if (musb->ops->disable)
 550                musb->ops->disable(musb);
 551}
 552
 553static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 554{
 555        if (!musb->ops->set_mode)
 556                return 0;
 557
 558        return musb->ops->set_mode(musb, mode);
 559}
 560
 561static inline void musb_platform_try_idle(struct musb *musb,
 562                unsigned long timeout)
 563{
 564        if (musb->ops->try_idle)
 565                musb->ops->try_idle(musb, timeout);
 566}
 567
 568static inline int musb_platform_get_vbus_status(struct musb *musb)
 569{
 570        if (!musb->ops->vbus_status)
 571                return 0;
 572
 573        return musb->ops->vbus_status(musb);
 574}
 575
 576static inline int musb_platform_init(struct musb *musb)
 577{
 578        if (!musb->ops->init)
 579                return -EINVAL;
 580
 581        return musb->ops->init(musb);
 582}
 583
 584static inline int musb_platform_exit(struct musb *musb)
 585{
 586        if (!musb->ops->exit)
 587                return -EINVAL;
 588
 589        return musb->ops->exit(musb);
 590}
 591
 592#endif  /* __MUSB_CORE_H__ */
 593