LXR linux/drivers/video/via/via

   1/*
   2 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
   3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
   4 * Copyright 2011 Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public
   8 * License as published by the Free Software Foundation;
   9 * either version 2, or (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
  13 * the implied warranty of MERCHANTABILITY or FITNESS FOR
  14 * A PARTICULAR PURPOSE.See the GNU General Public License
  15 * for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc.,
  20 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  21 */
  22/*
  23 * clock and PLL management functions
  24 */
  25
  26#ifndef __VIA_CLOCK_H__
  27#define __VIA_CLOCK_H__
  28
  29#include <linux/types.h>
  30
  31enum via_clksrc {
  32        VIA_CLKSRC_X1 = 0,
  33        VIA_CLKSRC_TVX1,
  34        VIA_CLKSRC_TVPLL,
  35        VIA_CLKSRC_DVP1TVCLKR,
  36        VIA_CLKSRC_CAP0,
  37        VIA_CLKSRC_CAP1,
  38};
  39
  40struct via_pll_config {
  41        u16 multiplier;
  42        u8 divisor;
  43        u8 rshift;
  44};
  45
  46struct via_clock {
  47        void (*set_primary_clock_state)(u8 state);
  48        void (*set_primary_clock_source)(enum via_clksrc src, bool use_pll);
  49        void (*set_primary_pll_state)(u8 state);
  50        void (*set_primary_pll)(struct via_pll_config config);
  51
  52        void (*set_secondary_clock_state)(u8 state);
  53        void (*set_secondary_clock_source)(enum via_clksrc src, bool use_pll);
  54        void (*set_secondary_pll_state)(u8 state);
  55        void (*set_secondary_pll)(struct via_pll_config config);
  56
  57        void (*set_engine_pll_state)(u8 state);
  58        void (*set_engine_pll)(struct via_pll_config config);
  59};
  60
  61
  62static inline u32 get_pll_internal_frequency(u32 ref_freq,
  63        struct via_pll_config pll)
  64{
  65        return ref_freq / pll.divisor * pll.multiplier;
  66}
  67
  68static inline u32 get_pll_output_frequency(u32 ref_freq,
  69        struct via_pll_config pll)
  70{
  71        return get_pll_internal_frequency(ref_freq, pll) >> pll.rshift;
  72}
  73
  74void via_clock_init(struct via_clock *clock, int gfx_chip);
  75
  76#endif /* __VIA_CLOCK_H__ */
  77