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44#ifndef __ACTBL1_H__
45#define __ACTBL1_H__
46
47
48
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61
62
63#define ACPI_SIG_BERT "BERT"
64#define ACPI_SIG_CPEP "CPEP"
65#define ACPI_SIG_ECDT "ECDT"
66#define ACPI_SIG_EINJ "EINJ"
67#define ACPI_SIG_ERST "ERST"
68#define ACPI_SIG_HEST "HEST"
69#define ACPI_SIG_MADT "APIC"
70#define ACPI_SIG_MSCT "MSCT"
71#define ACPI_SIG_SBST "SBST"
72#define ACPI_SIG_SLIT "SLIT"
73#define ACPI_SIG_SRAT "SRAT"
74
75
76
77
78
79#pragma pack(1)
80
81
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98
99
100
101struct acpi_subtable_header {
102 u8 type;
103 u8 length;
104};
105
106
107
108struct acpi_whea_header {
109 u8 action;
110 u8 instruction;
111 u8 flags;
112 u8 reserved;
113 struct acpi_generic_address register_region;
114 u64 value;
115 u64 mask;
116};
117
118
119
120
121
122
123
124
125struct acpi_table_bert {
126 struct acpi_table_header header;
127 u32 region_length;
128 u64 address;
129};
130
131
132
133struct acpi_bert_region {
134 u32 block_status;
135 u32 raw_data_offset;
136 u32 raw_data_length;
137 u32 data_length;
138 u32 error_severity;
139};
140
141
142
143#define ACPI_BERT_UNCORRECTABLE (1)
144#define ACPI_BERT_CORRECTABLE (1<<1)
145#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
146#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
147#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4)
148
149
150
151enum acpi_bert_error_severity {
152 ACPI_BERT_ERROR_CORRECTABLE = 0,
153 ACPI_BERT_ERROR_FATAL = 1,
154 ACPI_BERT_ERROR_CORRECTED = 2,
155 ACPI_BERT_ERROR_NONE = 3,
156 ACPI_BERT_ERROR_RESERVED = 4
157};
158
159
160
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162
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168
169
170
171struct acpi_table_cpep {
172 struct acpi_table_header header;
173 u64 reserved;
174};
175
176
177
178struct acpi_cpep_polling {
179 struct acpi_subtable_header header;
180 u8 id;
181 u8 eid;
182 u32 interval;
183};
184
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187
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189
190
191
192struct acpi_table_ecdt {
193 struct acpi_table_header header;
194 struct acpi_generic_address control;
195 struct acpi_generic_address data;
196 u32 uid;
197 u8 gpe;
198 u8 id[1];
199};
200
201
202
203
204
205
206
207
208struct acpi_table_einj {
209 struct acpi_table_header header;
210 u32 header_length;
211 u8 flags;
212 u8 reserved[3];
213 u32 entries;
214};
215
216
217
218struct acpi_einj_entry {
219 struct acpi_whea_header whea_header;
220};
221
222
223
224#define ACPI_EINJ_PRESERVE (1)
225
226
227
228enum acpi_einj_actions {
229 ACPI_EINJ_BEGIN_OPERATION = 0,
230 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
231 ACPI_EINJ_SET_ERROR_TYPE = 2,
232 ACPI_EINJ_GET_ERROR_TYPE = 3,
233 ACPI_EINJ_END_OPERATION = 4,
234 ACPI_EINJ_EXECUTE_OPERATION = 5,
235 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
236 ACPI_EINJ_GET_COMMAND_STATUS = 7,
237 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
238 ACPI_EINJ_ACTION_RESERVED = 9,
239 ACPI_EINJ_TRIGGER_ERROR = 0xFF
240};
241
242
243
244enum acpi_einj_instructions {
245 ACPI_EINJ_READ_REGISTER = 0,
246 ACPI_EINJ_READ_REGISTER_VALUE = 1,
247 ACPI_EINJ_WRITE_REGISTER = 2,
248 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
249 ACPI_EINJ_NOOP = 4,
250 ACPI_EINJ_FLUSH_CACHELINE = 5,
251 ACPI_EINJ_INSTRUCTION_RESERVED = 6
252};
253
254struct acpi_einj_error_type_with_addr {
255 u32 error_type;
256 u32 vendor_struct_offset;
257 u32 flags;
258 u32 apic_id;
259 u64 address;
260 u64 range;
261 u32 pcie_id;
262};
263
264struct acpi_einj_vendor {
265 u32 length;
266 u32 pcie_id;
267 u16 vendor_id;
268 u16 device_id;
269 u8 revision_id;
270 u8 reserved[3];
271};
272
273
274
275struct acpi_einj_trigger {
276 u32 header_size;
277 u32 revision;
278 u32 table_size;
279 u32 entry_count;
280};
281
282
283
284enum acpi_einj_command_status {
285 ACPI_EINJ_SUCCESS = 0,
286 ACPI_EINJ_FAILURE = 1,
287 ACPI_EINJ_INVALID_ACCESS = 2,
288 ACPI_EINJ_STATUS_RESERVED = 3
289};
290
291
292
293#define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
294#define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
295#define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
296#define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
297#define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
298#define ACPI_EINJ_MEMORY_FATAL (1<<5)
299#define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
300#define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
301#define ACPI_EINJ_PCIX_FATAL (1<<8)
302#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
303#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
304#define ACPI_EINJ_PLATFORM_FATAL (1<<11)
305#define ACPI_EINJ_VENDOR_DEFINED (1<<31)
306
307
308
309
310
311
312
313
314struct acpi_table_erst {
315 struct acpi_table_header header;
316 u32 header_length;
317 u32 reserved;
318 u32 entries;
319};
320
321
322
323struct acpi_erst_entry {
324 struct acpi_whea_header whea_header;
325};
326
327
328
329#define ACPI_ERST_PRESERVE (1)
330
331
332
333enum acpi_erst_actions {
334 ACPI_ERST_BEGIN_WRITE = 0,
335 ACPI_ERST_BEGIN_READ = 1,
336 ACPI_ERST_BEGIN_CLEAR = 2,
337 ACPI_ERST_END = 3,
338 ACPI_ERST_SET_RECORD_OFFSET = 4,
339 ACPI_ERST_EXECUTE_OPERATION = 5,
340 ACPI_ERST_CHECK_BUSY_STATUS = 6,
341 ACPI_ERST_GET_COMMAND_STATUS = 7,
342 ACPI_ERST_GET_RECORD_ID = 8,
343 ACPI_ERST_SET_RECORD_ID = 9,
344 ACPI_ERST_GET_RECORD_COUNT = 10,
345 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
346 ACPI_ERST_NOT_USED = 12,
347 ACPI_ERST_GET_ERROR_RANGE = 13,
348 ACPI_ERST_GET_ERROR_LENGTH = 14,
349 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
350 ACPI_ERST_ACTION_RESERVED = 16
351};
352
353
354
355enum acpi_erst_instructions {
356 ACPI_ERST_READ_REGISTER = 0,
357 ACPI_ERST_READ_REGISTER_VALUE = 1,
358 ACPI_ERST_WRITE_REGISTER = 2,
359 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
360 ACPI_ERST_NOOP = 4,
361 ACPI_ERST_LOAD_VAR1 = 5,
362 ACPI_ERST_LOAD_VAR2 = 6,
363 ACPI_ERST_STORE_VAR1 = 7,
364 ACPI_ERST_ADD = 8,
365 ACPI_ERST_SUBTRACT = 9,
366 ACPI_ERST_ADD_VALUE = 10,
367 ACPI_ERST_SUBTRACT_VALUE = 11,
368 ACPI_ERST_STALL = 12,
369 ACPI_ERST_STALL_WHILE_TRUE = 13,
370 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
371 ACPI_ERST_GOTO = 15,
372 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
373 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
374 ACPI_ERST_MOVE_DATA = 18,
375 ACPI_ERST_INSTRUCTION_RESERVED = 19
376};
377
378
379
380enum acpi_erst_command_status {
381 ACPI_ERST_SUCESS = 0,
382 ACPI_ERST_NO_SPACE = 1,
383 ACPI_ERST_NOT_AVAILABLE = 2,
384 ACPI_ERST_FAILURE = 3,
385 ACPI_ERST_RECORD_EMPTY = 4,
386 ACPI_ERST_NOT_FOUND = 5,
387 ACPI_ERST_STATUS_RESERVED = 6
388};
389
390
391
392struct acpi_erst_info {
393 u16 signature;
394 u8 data[48];
395};
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397
398
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401
402
403
404struct acpi_table_hest {
405 struct acpi_table_header header;
406 u32 error_source_count;
407};
408
409
410
411struct acpi_hest_header {
412 u16 type;
413 u16 source_id;
414};
415
416
417
418enum acpi_hest_types {
419 ACPI_HEST_TYPE_IA32_CHECK = 0,
420 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
421 ACPI_HEST_TYPE_IA32_NMI = 2,
422 ACPI_HEST_TYPE_NOT_USED3 = 3,
423 ACPI_HEST_TYPE_NOT_USED4 = 4,
424 ACPI_HEST_TYPE_NOT_USED5 = 5,
425 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
426 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
427 ACPI_HEST_TYPE_AER_BRIDGE = 8,
428 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
429 ACPI_HEST_TYPE_RESERVED = 10
430};
431
432
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435
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437
438
439
440struct acpi_hest_ia_error_bank {
441 u8 bank_number;
442 u8 clear_status_on_init;
443 u8 status_format;
444 u8 reserved;
445 u32 control_register;
446 u64 control_data;
447 u32 status_register;
448 u32 address_register;
449 u32 misc_register;
450};
451
452
453
454struct acpi_hest_aer_common {
455 u16 reserved1;
456 u8 flags;
457 u8 enabled;
458 u32 records_to_preallocate;
459 u32 max_sections_per_record;
460 u32 bus;
461 u16 device;
462 u16 function;
463 u16 device_control;
464 u16 reserved2;
465 u32 uncorrectable_mask;
466 u32 uncorrectable_severity;
467 u32 correctable_mask;
468 u32 advanced_capabilities;
469};
470
471
472
473#define ACPI_HEST_FIRMWARE_FIRST (1)
474#define ACPI_HEST_GLOBAL (1<<1)
475
476
477
478struct acpi_hest_notify {
479 u8 type;
480 u8 length;
481 u16 config_write_enable;
482 u32 poll_interval;
483 u32 vector;
484 u32 polling_threshold_value;
485 u32 polling_threshold_window;
486 u32 error_threshold_value;
487 u32 error_threshold_window;
488};
489
490
491
492enum acpi_hest_notify_types {
493 ACPI_HEST_NOTIFY_POLLED = 0,
494 ACPI_HEST_NOTIFY_EXTERNAL = 1,
495 ACPI_HEST_NOTIFY_LOCAL = 2,
496 ACPI_HEST_NOTIFY_SCI = 3,
497 ACPI_HEST_NOTIFY_NMI = 4,
498 ACPI_HEST_NOTIFY_CMCI = 5,
499 ACPI_HEST_NOTIFY_MCE = 6,
500 ACPI_HEST_NOTIFY_RESERVED = 7
501};
502
503
504
505#define ACPI_HEST_TYPE (1)
506#define ACPI_HEST_POLL_INTERVAL (1<<1)
507#define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
508#define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
509#define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
510#define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
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516
517
518struct acpi_hest_ia_machine_check {
519 struct acpi_hest_header header;
520 u16 reserved1;
521 u8 flags;
522 u8 enabled;
523 u32 records_to_preallocate;
524 u32 max_sections_per_record;
525 u64 global_capability_data;
526 u64 global_control_data;
527 u8 num_hardware_banks;
528 u8 reserved3[7];
529};
530
531
532
533struct acpi_hest_ia_corrected {
534 struct acpi_hest_header header;
535 u16 reserved1;
536 u8 flags;
537 u8 enabled;
538 u32 records_to_preallocate;
539 u32 max_sections_per_record;
540 struct acpi_hest_notify notify;
541 u8 num_hardware_banks;
542 u8 reserved2[3];
543};
544
545
546
547struct acpi_hest_ia_nmi {
548 struct acpi_hest_header header;
549 u32 reserved;
550 u32 records_to_preallocate;
551 u32 max_sections_per_record;
552 u32 max_raw_data_length;
553};
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556
557
558
559struct acpi_hest_aer_root {
560 struct acpi_hest_header header;
561 struct acpi_hest_aer_common aer;
562 u32 root_error_command;
563};
564
565
566
567struct acpi_hest_aer {
568 struct acpi_hest_header header;
569 struct acpi_hest_aer_common aer;
570};
571
572
573
574struct acpi_hest_aer_bridge {
575 struct acpi_hest_header header;
576 struct acpi_hest_aer_common aer;
577 u32 uncorrectable_mask2;
578 u32 uncorrectable_severity2;
579 u32 advanced_capabilities2;
580};
581
582
583
584struct acpi_hest_generic {
585 struct acpi_hest_header header;
586 u16 related_source_id;
587 u8 reserved;
588 u8 enabled;
589 u32 records_to_preallocate;
590 u32 max_sections_per_record;
591 u32 max_raw_data_length;
592 struct acpi_generic_address error_status_address;
593 struct acpi_hest_notify notify;
594 u32 error_block_length;
595};
596
597
598
599struct acpi_hest_generic_status {
600 u32 block_status;
601 u32 raw_data_offset;
602 u32 raw_data_length;
603 u32 data_length;
604 u32 error_severity;
605};
606
607
608
609#define ACPI_HEST_UNCORRECTABLE (1)
610#define ACPI_HEST_CORRECTABLE (1<<1)
611#define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
612#define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
613#define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4)
614
615
616
617struct acpi_hest_generic_data {
618 u8 section_type[16];
619 u32 error_severity;
620 u16 revision;
621 u8 validation_bits;
622 u8 flags;
623 u32 error_data_length;
624 u8 fru_id[16];
625 u8 fru_text[20];
626};
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632
633
634
635struct acpi_table_madt {
636 struct acpi_table_header header;
637 u32 address;
638 u32 flags;
639};
640
641
642
643#define ACPI_MADT_PCAT_COMPAT (1)
644
645
646
647#define ACPI_MADT_DUAL_PIC 0
648#define ACPI_MADT_MULTIPLE_APIC 1
649
650
651
652enum acpi_madt_type {
653 ACPI_MADT_TYPE_LOCAL_APIC = 0,
654 ACPI_MADT_TYPE_IO_APIC = 1,
655 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
656 ACPI_MADT_TYPE_NMI_SOURCE = 3,
657 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
658 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
659 ACPI_MADT_TYPE_IO_SAPIC = 6,
660 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
661 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
662 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
663 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
664 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
665 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
666 ACPI_MADT_TYPE_RESERVED = 13
667};
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673
674
675struct acpi_madt_local_apic {
676 struct acpi_subtable_header header;
677 u8 processor_id;
678 u8 id;
679 u32 lapic_flags;
680};
681
682
683
684struct acpi_madt_io_apic {
685 struct acpi_subtable_header header;
686 u8 id;
687 u8 reserved;
688 u32 address;
689 u32 global_irq_base;
690};
691
692
693
694struct acpi_madt_interrupt_override {
695 struct acpi_subtable_header header;
696 u8 bus;
697 u8 source_irq;
698 u32 global_irq;
699 u16 inti_flags;
700};
701
702
703
704struct acpi_madt_nmi_source {
705 struct acpi_subtable_header header;
706 u16 inti_flags;
707 u32 global_irq;
708};
709
710
711
712struct acpi_madt_local_apic_nmi {
713 struct acpi_subtable_header header;
714 u8 processor_id;
715 u16 inti_flags;
716 u8 lint;
717};
718
719
720
721struct acpi_madt_local_apic_override {
722 struct acpi_subtable_header header;
723 u16 reserved;
724 u64 address;
725};
726
727
728
729struct acpi_madt_io_sapic {
730 struct acpi_subtable_header header;
731 u8 id;
732 u8 reserved;
733 u32 global_irq_base;
734 u64 address;
735};
736
737
738
739struct acpi_madt_local_sapic {
740 struct acpi_subtable_header header;
741 u8 processor_id;
742 u8 id;
743 u8 eid;
744 u8 reserved[3];
745 u32 lapic_flags;
746 u32 uid;
747 char uid_string[1];
748};
749
750
751
752struct acpi_madt_interrupt_source {
753 struct acpi_subtable_header header;
754 u16 inti_flags;
755 u8 type;
756 u8 id;
757 u8 eid;
758 u8 io_sapic_vector;
759 u32 global_irq;
760 u32 flags;
761};
762
763
764
765#define ACPI_MADT_CPEI_OVERRIDE (1)
766
767
768
769struct acpi_madt_local_x2apic {
770 struct acpi_subtable_header header;
771 u16 reserved;
772 u32 local_apic_id;
773 u32 lapic_flags;
774 u32 uid;
775};
776
777
778
779struct acpi_madt_local_x2apic_nmi {
780 struct acpi_subtable_header header;
781 u16 inti_flags;
782 u32 uid;
783 u8 lint;
784 u8 reserved[3];
785};
786
787
788
789struct acpi_madt_generic_interrupt {
790 struct acpi_subtable_header header;
791 u16 reserved;
792 u32 gic_id;
793 u32 uid;
794 u32 flags;
795 u32 parking_version;
796 u32 performance_interrupt;
797 u64 parked_address;
798 u64 base_address;
799};
800
801
802
803struct acpi_madt_generic_distributor {
804 struct acpi_subtable_header header;
805 u16 reserved;
806 u32 gic_id;
807 u64 base_address;
808 u32 global_irq_base;
809 u32 reserved2;
810};
811
812
813
814
815
816
817
818#define ACPI_MADT_ENABLED (1)
819
820
821
822#define ACPI_MADT_POLARITY_MASK (3)
823#define ACPI_MADT_TRIGGER_MASK (3<<2)
824
825
826
827#define ACPI_MADT_POLARITY_CONFORMS 0
828#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
829#define ACPI_MADT_POLARITY_RESERVED 2
830#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
831
832#define ACPI_MADT_TRIGGER_CONFORMS (0)
833#define ACPI_MADT_TRIGGER_EDGE (1<<2)
834#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
835#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
836
837
838
839
840
841
842
843
844struct acpi_table_msct {
845 struct acpi_table_header header;
846 u32 proximity_offset;
847 u32 max_proximity_domains;
848 u32 max_clock_domains;
849 u64 max_address;
850};
851
852
853
854struct acpi_msct_proximity {
855 u8 revision;
856 u8 length;
857 u32 range_start;
858 u32 range_end;
859 u32 processor_capacity;
860 u64 memory_capacity;
861};
862
863
864
865
866
867
868
869
870struct acpi_table_sbst {
871 struct acpi_table_header header;
872 u32 warning_level;
873 u32 low_level;
874 u32 critical_level;
875};
876
877
878
879
880
881
882
883
884struct acpi_table_slit {
885 struct acpi_table_header header;
886 u64 locality_count;
887 u8 entry[1];
888};
889
890
891
892
893
894
895
896
897struct acpi_table_srat {
898 struct acpi_table_header header;
899 u32 table_revision;
900 u64 reserved;
901};
902
903
904
905enum acpi_srat_type {
906 ACPI_SRAT_TYPE_CPU_AFFINITY = 0,
907 ACPI_SRAT_TYPE_MEMORY_AFFINITY = 1,
908 ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY = 2,
909 ACPI_SRAT_TYPE_RESERVED = 3
910};
911
912
913
914
915
916
917
918struct acpi_srat_cpu_affinity {
919 struct acpi_subtable_header header;
920 u8 proximity_domain_lo;
921 u8 apic_id;
922 u32 flags;
923 u8 local_sapic_eid;
924 u8 proximity_domain_hi[3];
925 u32 reserved;
926};
927
928
929
930#define ACPI_SRAT_CPU_USE_AFFINITY (1)
931
932
933
934struct acpi_srat_mem_affinity {
935 struct acpi_subtable_header header;
936 u32 proximity_domain;
937 u16 reserved;
938 u64 base_address;
939 u64 length;
940 u32 reserved1;
941 u32 flags;
942 u64 reserved2;
943};
944
945
946
947#define ACPI_SRAT_MEM_ENABLED (1)
948#define ACPI_SRAT_MEM_HOT_PLUGGABLE (1<<1)
949#define ACPI_SRAT_MEM_NON_VOLATILE (1<<2)
950
951
952
953struct acpi_srat_x2apic_cpu_affinity {
954 struct acpi_subtable_header header;
955 u16 reserved;
956 u32 proximity_domain;
957 u32 apic_id;
958 u32 flags;
959 u32 clock_domain;
960 u32 reserved2;
961};
962
963
964
965#define ACPI_SRAT_CPU_ENABLED (1)
966
967
968
969#pragma pack()
970
971#endif
972