LXR linux/include/linux/ssb/ssb.h

   1#ifndef LINUX_SSB_H_
   2#define LINUX_SSB_H_
   3
   4#include <linux/device.h>
   5#include <linux/list.h>
   6#include <linux/types.h>
   7#include <linux/spinlock.h>
   8#include <linux/pci.h>
   9#include <linux/gpio.h>
  10#include <linux/mod_devicetable.h>
  11#include <linux/dma-mapping.h>
  12#include <linux/platform_device.h>
  13
  14#include <linux/ssb/ssb_regs.h>
  15
  16
  17struct pcmcia_device;
  18struct ssb_bus;
  19struct ssb_driver;
  20
  21struct ssb_sprom_core_pwr_info {
  22        u8 itssi_2g, itssi_5g;
  23        u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
  24        u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4];
  25};
  26
  27struct ssb_sprom {
  28        u8 revision;
  29        u8 il0mac[6] __aligned(sizeof(u16));    /* MAC address for 802.11b/g */
  30        u8 et0mac[6] __aligned(sizeof(u16));    /* MAC address for Ethernet */
  31        u8 et1mac[6] __aligned(sizeof(u16));    /* MAC address for 802.11a */
  32        u8 et0phyaddr;          /* MII address for enet0 */
  33        u8 et1phyaddr;          /* MII address for enet1 */
  34        u8 et0mdcport;          /* MDIO for enet0 */
  35        u8 et1mdcport;          /* MDIO for enet1 */
  36        u16 board_rev;          /* Board revision number from SPROM. */
  37        u16 board_num;          /* Board number from SPROM. */
  38        u16 board_type;         /* Board type from SPROM. */
  39        u8 country_code;        /* Country Code */
  40        char alpha2[2];         /* Country Code as two chars like EU or US */
  41        u8 leddc_on_time;       /* LED Powersave Duty Cycle On Count */
  42        u8 leddc_off_time;      /* LED Powersave Duty Cycle Off Count */
  43        u8 ant_available_a;     /* 2GHz antenna available bits (up to 4) */
  44        u8 ant_available_bg;    /* 5GHz antenna available bits (up to 4) */
  45        u16 pa0b0;
  46        u16 pa0b1;
  47        u16 pa0b2;
  48        u16 pa1b0;
  49        u16 pa1b1;
  50        u16 pa1b2;
  51        u16 pa1lob0;
  52        u16 pa1lob1;
  53        u16 pa1lob2;
  54        u16 pa1hib0;
  55        u16 pa1hib1;
  56        u16 pa1hib2;
  57        u8 gpio0;               /* GPIO pin 0 */
  58        u8 gpio1;               /* GPIO pin 1 */
  59        u8 gpio2;               /* GPIO pin 2 */
  60        u8 gpio3;               /* GPIO pin 3 */
  61        u8 maxpwr_bg;           /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  62        u8 maxpwr_al;           /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  63        u8 maxpwr_a;            /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  64        u8 maxpwr_ah;           /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  65        u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  66        u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  67        u8 tri2g;               /* 2.4GHz TX isolation */
  68        u8 tri5gl;              /* 5.2GHz TX isolation */
  69        u8 tri5g;               /* 5.3GHz TX isolation */
  70        u8 tri5gh;              /* 5.8GHz TX isolation */
  71        u8 txpid2g[4];          /* 2GHz TX power index */
  72        u8 txpid5gl[4];         /* 4.9 - 5.1GHz TX power index */
  73        u8 txpid5g[4];          /* 5.1 - 5.5GHz TX power index */
  74        u8 txpid5gh[4];         /* 5.5 - ...GHz TX power index */
  75        s8 rxpo2g;              /* 2GHz RX power offset */
  76        s8 rxpo5g;              /* 5GHz RX power offset */
  77        u8 rssisav2g;           /* 2GHz RSSI params */
  78        u8 rssismc2g;
  79        u8 rssismf2g;
  80        u8 bxa2g;               /* 2GHz BX arch */
  81        u8 rssisav5g;           /* 5GHz RSSI params */
  82        u8 rssismc5g;
  83        u8 rssismf5g;
  84        u8 bxa5g;               /* 5GHz BX arch */
  85        u16 cck2gpo;            /* CCK power offset */
  86        u32 ofdm2gpo;           /* 2.4GHz OFDM power offset */
  87        u32 ofdm5glpo;          /* 5.2GHz OFDM power offset */
  88        u32 ofdm5gpo;           /* 5.3GHz OFDM power offset */
  89        u32 ofdm5ghpo;          /* 5.8GHz OFDM power offset */
  90        u16 boardflags_lo;      /* Board flags (bits 0-15) */
  91        u16 boardflags_hi;      /* Board flags (bits 16-31) */
  92        u16 boardflags2_lo;     /* Board flags (bits 32-47) */
  93        u16 boardflags2_hi;     /* Board flags (bits 48-63) */
  94        /* TODO store board flags in a single u64 */
  95
  96        struct ssb_sprom_core_pwr_info core_pwr_info[4];
  97
  98        /* Antenna gain values for up to 4 antennas
  99         * on each band. Values in dBm/4 (Q5.2). Negative gain means the
 100         * loss in the connectors is bigger than the gain. */
 101        struct {
 102                s8 a0, a1, a2, a3;
 103        } antenna_gain;
 104
 105        struct {
 106                struct {
 107                        u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
 108                } ghz2;
 109                struct {
 110                        u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
 111                } ghz5;
 112        } fem;
 113
 114        u16 mcs2gpo[8];
 115        u16 mcs5gpo[8];
 116        u16 mcs5glpo[8];
 117        u16 mcs5ghpo[8];
 118        u8 opo;
 119
 120        u8 rxgainerr2ga[3];
 121        u8 rxgainerr5gla[3];
 122        u8 rxgainerr5gma[3];
 123        u8 rxgainerr5gha[3];
 124        u8 rxgainerr5gua[3];
 125
 126        u8 noiselvl2ga[3];
 127        u8 noiselvl5gla[3];
 128        u8 noiselvl5gma[3];
 129        u8 noiselvl5gha[3];
 130        u8 noiselvl5gua[3];
 131
 132        u8 regrev;
 133        u8 txchain;
 134        u8 rxchain;
 135        u8 antswitch;
 136        u16 cddpo;
 137        u16 stbcpo;
 138        u16 bw40po;
 139        u16 bwduppo;
 140
 141        u8 tempthresh;
 142        u8 tempoffset;
 143        u16 rawtempsense;
 144        u8 measpower;
 145        u8 tempsense_slope;
 146        u8 tempcorrx;
 147        u8 tempsense_option;
 148        u8 freqoffset_corr;
 149        u8 iqcal_swp_dis;
 150        u8 hw_iqcal_en;
 151        u8 elna2g;
 152        u8 elna5g;
 153        u8 phycal_tempdelta;
 154        u8 temps_period;
 155        u8 temps_hysteresis;
 156        u8 measpower1;
 157        u8 measpower2;
 158        u8 pcieingress_war;
 159
 160        /* power per rate from sromrev 9 */
 161        u16 cckbw202gpo;
 162        u16 cckbw20ul2gpo;
 163        u32 legofdmbw202gpo;
 164        u32 legofdmbw20ul2gpo;
 165        u32 legofdmbw205glpo;
 166        u32 legofdmbw20ul5glpo;
 167        u32 legofdmbw205gmpo;
 168        u32 legofdmbw20ul5gmpo;
 169        u32 legofdmbw205ghpo;
 170        u32 legofdmbw20ul5ghpo;
 171        u32 mcsbw202gpo;
 172        u32 mcsbw20ul2gpo;
 173        u32 mcsbw402gpo;
 174        u32 mcsbw205glpo;
 175        u32 mcsbw20ul5glpo;
 176        u32 mcsbw405glpo;
 177        u32 mcsbw205gmpo;
 178        u32 mcsbw20ul5gmpo;
 179        u32 mcsbw405gmpo;
 180        u32 mcsbw205ghpo;
 181        u32 mcsbw20ul5ghpo;
 182        u32 mcsbw405ghpo;
 183        u16 mcs32po;
 184        u16 legofdm40duppo;
 185        u8 sar2g;
 186        u8 sar5g;
 187};
 188
 189/* Information about the PCB the circuitry is soldered on. */
 190struct ssb_boardinfo {
 191        u16 vendor;
 192        u16 type;
 193};
 194
 195
 196struct ssb_device;
 197/* Lowlevel read/write operations on the device MMIO.
 198 * Internal, don't use that outside of ssb. */
 199struct ssb_bus_ops {
 200        u8 (*read8)(struct ssb_device *dev, u16 offset);
 201        u16 (*read16)(struct ssb_device *dev, u16 offset);
 202        u32 (*read32)(struct ssb_device *dev, u16 offset);
 203        void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
 204        void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
 205        void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
 206#ifdef CONFIG_SSB_BLOCKIO
 207        void (*block_read)(struct ssb_device *dev, void *buffer,
 208                           size_t count, u16 offset, u8 reg_width);
 209        void (*block_write)(struct ssb_device *dev, const void *buffer,
 210                            size_t count, u16 offset, u8 reg_width);
 211#endif
 212};
 213
 214
 215/* Core-ID values. */
 216#define SSB_DEV_CHIPCOMMON      0x800
 217#define SSB_DEV_ILINE20         0x801
 218#define SSB_DEV_SDRAM           0x803
 219#define SSB_DEV_PCI             0x804
 220#define SSB_DEV_MIPS            0x805
 221#define SSB_DEV_ETHERNET        0x806
 222#define SSB_DEV_V90             0x807
 223#define SSB_DEV_USB11_HOSTDEV   0x808
 224#define SSB_DEV_ADSL            0x809
 225#define SSB_DEV_ILINE100        0x80A
 226#define SSB_DEV_IPSEC           0x80B
 227#define SSB_DEV_PCMCIA          0x80D
 228#define SSB_DEV_INTERNAL_MEM    0x80E
 229#define SSB_DEV_MEMC_SDRAM      0x80F
 230#define SSB_DEV_EXTIF           0x811
 231#define SSB_DEV_80211           0x812
 232#define SSB_DEV_MIPS_3302       0x816
 233#define SSB_DEV_USB11_HOST      0x817
 234#define SSB_DEV_USB11_DEV       0x818
 235#define SSB_DEV_USB20_HOST      0x819
 236#define SSB_DEV_USB20_DEV       0x81A
 237#define SSB_DEV_SDIO_HOST       0x81B
 238#define SSB_DEV_ROBOSWITCH      0x81C
 239#define SSB_DEV_PARA_ATA        0x81D
 240#define SSB_DEV_SATA_XORDMA     0x81E
 241#define SSB_DEV_ETHERNET_GBIT   0x81F
 242#define SSB_DEV_PCIE            0x820
 243#define SSB_DEV_MIMO_PHY        0x821
 244#define SSB_DEV_SRAM_CTRLR      0x822
 245#define SSB_DEV_MINI_MACPHY     0x823
 246#define SSB_DEV_ARM_1176        0x824
 247#define SSB_DEV_ARM_7TDMI       0x825
 248#define SSB_DEV_ARM_CM3         0x82A
 249
 250/* Vendor-ID values */
 251#define SSB_VENDOR_BROADCOM     0x4243
 252
 253/* Some kernel subsystems poke with dev->drvdata, so we must use the
 254 * following ugly workaround to get from struct device to struct ssb_device */
 255struct __ssb_dev_wrapper {
 256        struct device dev;
 257        struct ssb_device *sdev;
 258};
 259
 260struct ssb_device {
 261        /* Having a copy of the ops pointer in each dev struct
 262         * is an optimization. */
 263        const struct ssb_bus_ops *ops;
 264
 265        struct device *dev, *dma_dev;
 266
 267        struct ssb_bus *bus;
 268        struct ssb_device_id id;
 269
 270        u8 core_index;
 271        unsigned int irq;
 272
 273        /* Internal-only stuff follows. */
 274        void *drvdata;          /* Per-device data */
 275        void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 276};
 277
 278/* Go from struct device to struct ssb_device. */
 279static inline
 280struct ssb_device * dev_to_ssb_dev(struct device *dev)
 281{
 282        struct __ssb_dev_wrapper *wrap;
 283        wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 284        return wrap->sdev;
 285}
 286
 287/* Device specific user data */
 288static inline
 289void ssb_set_drvdata(struct ssb_device *dev, void *data)
 290{
 291        dev->drvdata = data;
 292}
 293static inline
 294void * ssb_get_drvdata(struct ssb_device *dev)
 295{
 296        return dev->drvdata;
 297}
 298
 299/* Devicetype specific user data. This is per device-type (not per device) */
 300void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 301static inline
 302void * ssb_get_devtypedata(struct ssb_device *dev)
 303{
 304        return dev->devtypedata;
 305}
 306
 307
 308struct ssb_driver {
 309        const char *name;
 310        const struct ssb_device_id *id_table;
 311
 312        int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 313        void (*remove)(struct ssb_device *dev);
 314        int (*suspend)(struct ssb_device *dev, pm_message_t state);
 315        int (*resume)(struct ssb_device *dev);
 316        void (*shutdown)(struct ssb_device *dev);
 317
 318        struct device_driver drv;
 319};
 320#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 321
 322extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 323#define ssb_driver_register(drv) \
 324        __ssb_driver_register(drv, THIS_MODULE)
 325
 326extern void ssb_driver_unregister(struct ssb_driver *drv);
 327
 328
 329
 330
 331enum ssb_bustype {
 332        SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 333        SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 334        SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 335        SSB_BUSTYPE_SDIO,       /* SSB is connected to SDIO bus */
 336};
 337
 338/* board_vendor */
 339#define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 340#define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 341#define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 342/* board_type */
 343#define SSB_BOARD_BCM94301CB    0x0406
 344#define SSB_BOARD_BCM94301MP    0x0407
 345#define SSB_BOARD_BU4309        0x040A
 346#define SSB_BOARD_BCM94309CB    0x040B
 347#define SSB_BOARD_BCM4309MP     0x040C
 348#define SSB_BOARD_BU4306        0x0416
 349#define SSB_BOARD_BCM94306MP    0x0418
 350#define SSB_BOARD_BCM4309G      0x0421
 351#define SSB_BOARD_BCM4306CB     0x0417
 352#define SSB_BOARD_BCM94306PC    0x0425  /* pcmcia 3.3v 4306 card */
 353#define SSB_BOARD_BCM94306CBSG  0x042B  /* with SiGe PA */
 354#define SSB_BOARD_PCSG94306     0x042D  /* with SiGe PA */
 355#define SSB_BOARD_BU4704SD      0x042E  /* with sdram */
 356#define SSB_BOARD_BCM94704AGR   0x042F  /* dual 11a/11g Router */
 357#define SSB_BOARD_BCM94308MP    0x0430  /* 11a-only minipci */
 358#define SSB_BOARD_BU4318        0x0447
 359#define SSB_BOARD_CB4318        0x0448
 360#define SSB_BOARD_MPG4318       0x0449
 361#define SSB_BOARD_MP4318        0x044A
 362#define SSB_BOARD_SD4318        0x044B
 363#define SSB_BOARD_BCM94306P     0x044C  /* with SiGe */
 364#define SSB_BOARD_BCM94303MP    0x044E
 365#define SSB_BOARD_BCM94306MPM   0x0450
 366#define SSB_BOARD_BCM94306MPL   0x0453
 367#define SSB_BOARD_PC4303        0x0454  /* pcmcia */
 368#define SSB_BOARD_BCM94306MPLNA 0x0457
 369#define SSB_BOARD_BCM94306MPH   0x045B
 370#define SSB_BOARD_BCM94306PCIV  0x045C
 371#define SSB_BOARD_BCM94318MPGH  0x0463
 372#define SSB_BOARD_BU4311        0x0464
 373#define SSB_BOARD_BCM94311MC    0x0465
 374#define SSB_BOARD_BCM94311MCAG  0x0466
 375/* 4321 boards */
 376#define SSB_BOARD_BU4321        0x046B
 377#define SSB_BOARD_BU4321E       0x047C
 378#define SSB_BOARD_MP4321        0x046C
 379#define SSB_BOARD_CB2_4321      0x046D
 380#define SSB_BOARD_CB2_4321_AG   0x0066
 381#define SSB_BOARD_MC4321        0x046E
 382/* 4325 boards */
 383#define SSB_BOARD_BCM94325DEVBU 0x0490
 384#define SSB_BOARD_BCM94325BGABU 0x0491
 385#define SSB_BOARD_BCM94325SDGWB 0x0492
 386#define SSB_BOARD_BCM94325SDGMDL        0x04AA
 387#define SSB_BOARD_BCM94325SDGMDL2       0x04C6
 388#define SSB_BOARD_BCM94325SDGMDL3       0x04C9
 389#define SSB_BOARD_BCM94325SDABGWBA      0x04E1
 390/* 4322 boards */
 391#define SSB_BOARD_BCM94322MC    0x04A4
 392#define SSB_BOARD_BCM94322USB   0x04A8  /* dualband */
 393#define SSB_BOARD_BCM94322HM    0x04B0
 394#define SSB_BOARD_BCM94322USB2D 0x04Bf  /* single band discrete front end */
 395/* 4312 boards */
 396#define SSB_BOARD_BU4312        0x048A
 397#define SSB_BOARD_BCM4312MCGSG  0x04B5
 398/* chip_package */
 399#define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 400#define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 401#define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 402
 403#include <linux/ssb/ssb_driver_chipcommon.h>
 404#include <linux/ssb/ssb_driver_mips.h>
 405#include <linux/ssb/ssb_driver_extif.h>
 406#include <linux/ssb/ssb_driver_pci.h>
 407
 408struct ssb_bus {
 409        /* The MMIO area. */
 410        void __iomem *mmio;
 411
 412        const struct ssb_bus_ops *ops;
 413
 414        /* The core currently mapped into the MMIO window.
 415         * Not valid on all host-buses. So don't use outside of SSB. */
 416        struct ssb_device *mapped_device;
 417        union {
 418                /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 419                u8 mapped_pcmcia_seg;
 420                /* Current SSB base address window for SDIO. */
 421                u32 sdio_sbaddr;
 422        };
 423        /* Lock for core and segment switching.
 424         * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 425        spinlock_t bar_lock;
 426
 427        /* The host-bus this backplane is running on. */
 428        enum ssb_bustype bustype;
 429        /* Pointers to the host-bus. Check bustype before using any of these pointers. */
 430        union {
 431                /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 432                struct pci_dev *host_pci;
 433                /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 434                struct pcmcia_device *host_pcmcia;
 435                /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
 436                struct sdio_func *host_sdio;
 437        };
 438
 439        /* See enum ssb_quirks */
 440        unsigned int quirks;
 441
 442#ifdef CONFIG_SSB_SPROM
 443        /* Mutex to protect the SPROM writing. */
 444        struct mutex sprom_mutex;
 445#endif
 446
 447        /* ID information about the Chip. */
 448        u16 chip_id;
 449        u8 chip_rev;
 450        u16 sprom_offset;
 451        u16 sprom_size;         /* number of words in sprom */
 452        u8 chip_package;
 453
 454        /* List of devices (cores) on the backplane. */
 455        struct ssb_device devices[SSB_MAX_NR_CORES];
 456        u8 nr_devices;
 457
 458        /* Software ID number for this bus. */
 459        unsigned int busnumber;
 460
 461        /* The ChipCommon device (if available). */
 462        struct ssb_chipcommon chipco;
 463        /* The PCI-core device (if available). */
 464        struct ssb_pcicore pcicore;
 465        /* The MIPS-core device (if available). */
 466        struct ssb_mipscore mipscore;
 467        /* The EXTif-core device (if available). */
 468        struct ssb_extif extif;
 469
 470        /* The following structure elements are not available in early
 471         * SSB initialization. Though, they are available for regular
 472         * registered drivers at any stage. So be careful when
 473         * using them in the ssb core code. */
 474
 475        /* ID information about the PCB. */
 476        struct ssb_boardinfo boardinfo;
 477        /* Contents of the SPROM. */
 478        struct ssb_sprom sprom;
 479        /* If the board has a cardbus slot, this is set to true. */
 480        bool has_cardbus_slot;
 481
 482#ifdef CONFIG_SSB_EMBEDDED
 483        /* Lock for GPIO register access. */
 484        spinlock_t gpio_lock;
 485        struct platform_device *watchdog;
 486#endif /* EMBEDDED */
 487#ifdef CONFIG_SSB_DRIVER_GPIO
 488        struct gpio_chip gpio;
 489#endif /* DRIVER_GPIO */
 490
 491        /* Internal-only stuff follows. Do not touch. */
 492        struct list_head list;
 493#ifdef CONFIG_SSB_DEBUG
 494        /* Is the bus already powered up? */
 495        bool powered_up;
 496        int power_warn_count;
 497#endif /* DEBUG */
 498};
 499
 500enum ssb_quirks {
 501        /* SDIO connected card requires performing a read after writing a 32-bit value */
 502        SSB_QUIRK_SDIO_READ_AFTER_WRITE32       = (1 << 0),
 503};
 504
 505/* The initialization-invariants. */
 506struct ssb_init_invariants {
 507        /* Versioning information about the PCB. */
 508        struct ssb_boardinfo boardinfo;
 509        /* The SPROM information. That's either stored in an
 510         * EEPROM or NVRAM on the board. */
 511        struct ssb_sprom sprom;
 512        /* If the board has a cardbus slot, this is set to true. */
 513        bool has_cardbus_slot;
 514};
 515/* Type of function to fetch the invariants. */
 516typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 517                                     struct ssb_init_invariants *iv);
 518
 519/* Register a SSB system bus. get_invariants() is called after the
 520 * basic system devices are initialized.
 521 * The invariants are usually fetched from some NVRAM.
 522 * Put the invariants into the struct pointed to by iv. */
 523extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 524                                   unsigned long baseaddr,
 525                                   ssb_invariants_func_t get_invariants);
 526#ifdef CONFIG_SSB_PCIHOST
 527extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 528                                   struct pci_dev *host_pci);
 529#endif /* CONFIG_SSB_PCIHOST */
 530#ifdef CONFIG_SSB_PCMCIAHOST
 531extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 532                                      struct pcmcia_device *pcmcia_dev,
 533                                      unsigned long baseaddr);
 534#endif /* CONFIG_SSB_PCMCIAHOST */
 535#ifdef CONFIG_SSB_SDIOHOST
 536extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
 537                                    struct sdio_func *sdio_func,
 538                                    unsigned int quirks);
 539#endif /* CONFIG_SSB_SDIOHOST */
 540
 541
 542extern void ssb_bus_unregister(struct ssb_bus *bus);
 543
 544/* Does the device have an SPROM? */
 545extern bool ssb_is_sprom_available(struct ssb_bus *bus);
 546
 547/* Set a fallback SPROM.
 548 * See kdoc at the function definition for complete documentation. */
 549extern int ssb_arch_register_fallback_sprom(
 550                int (*sprom_callback)(struct ssb_bus *bus,
 551                struct ssb_sprom *out));
 552
 553/* Suspend a SSB bus.
 554 * Call this from the parent bus suspend routine. */
 555extern int ssb_bus_suspend(struct ssb_bus *bus);
 556/* Resume a SSB bus.
 557 * Call this from the parent bus resume routine. */
 558extern int ssb_bus_resume(struct ssb_bus *bus);
 559
 560extern u32 ssb_clockspeed(struct ssb_bus *bus);
 561
 562/* Is the device enabled in hardware? */
 563int ssb_device_is_enabled(struct ssb_device *dev);
 564/* Enable a device and pass device-specific SSB_TMSLOW flags.
 565 * If no device-specific flags are available, use 0. */
 566void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 567/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 568void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 569
 570
 571/* Device MMIO register read/write functions. */
 572static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 573{
 574        return dev->ops->read8(dev, offset);
 575}
 576static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 577{
 578        return dev->ops->read16(dev, offset);
 579}
 580static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 581{
 582        return dev->ops->read32(dev, offset);
 583}
 584static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 585{
 586        dev->ops->write8(dev, offset, value);
 587}
 588static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 589{
 590        dev->ops->write16(dev, offset, value);
 591}
 592static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 593{
 594        dev->ops->write32(dev, offset, value);
 595}
 596#ifdef CONFIG_SSB_BLOCKIO
 597static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 598                                  size_t count, u16 offset, u8 reg_width)
 599{
 600        dev->ops->block_read(dev, buffer, count, offset, reg_width);
 601}
 602
 603static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 604                                   size_t count, u16 offset, u8 reg_width)
 605{
 606        dev->ops->block_write(dev, buffer, count, offset, reg_width);
 607}
 608#endif /* CONFIG_SSB_BLOCKIO */
 609
 610
 611/* The SSB DMA API. Use this API for any DMA operation on the device.
 612 * This API basically is a wrapper that calls the correct DMA API for
 613 * the host device type the SSB device is attached to. */
 614
 615/* Translation (routing) bits that need to be ORed to DMA
 616 * addresses before they are given to a device. */
 617extern u32 ssb_dma_translation(struct ssb_device *dev);
 618#define SSB_DMA_TRANSLATION_MASK        0xC0000000
 619#define SSB_DMA_TRANSLATION_SHIFT       30
 620
 621static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
 622{
 623#ifdef CONFIG_SSB_DEBUG
 624        printk(KERN_ERR "SSB: BUG! Calling DMA API for "
 625               "unsupported bustype %d\n", dev->bus->bustype);
 626#endif /* DEBUG */
 627}
 628
 629#ifdef CONFIG_SSB_PCIHOST
 630/* PCI-host wrapper driver */
 631extern int ssb_pcihost_register(struct pci_driver *driver);
 632static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 633{
 634        pci_unregister_driver(driver);
 635}
 636
 637static inline
 638void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 639{
 640        if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 641                pci_set_power_state(sdev->bus->host_pci, state);
 642}
 643#else
 644static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 645{
 646}
 647
 648static inline
 649void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 650{
 651}
 652#endif /* CONFIG_SSB_PCIHOST */
 653
 654
 655/* If a driver is shutdown or suspended, call this to signal
 656 * that the bus may be completely powered down. SSB will decide,
 657 * if it's really time to power down the bus, based on if there
 658 * are other devices that want to run. */
 659extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 660/* Before initializing and enabling a device, call this to power-up the bus.
 661 * If you want to allow use of dynamic-power-control, pass the flag.
 662 * Otherwise static always-on powercontrol will be used. */
 663extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 664
 665extern void ssb_commit_settings(struct ssb_bus *bus);
 666
 667/* Various helper functions */
 668extern u32 ssb_admatch_base(u32 adm);
 669extern u32 ssb_admatch_size(u32 adm);
 670
 671/* PCI device mapping and fixup routines.
 672 * Called from the architecture pcibios init code.
 673 * These are only available on SSB_EMBEDDED configurations. */
 674#ifdef CONFIG_SSB_EMBEDDED
 675int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 676int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 677#endif /* CONFIG_SSB_EMBEDDED */
 678
 679#endif /* LINUX_SSB_H_ */
 680