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31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/slab.h>
34#include <linux/module.h>
35#include <sound/core.h>
36#include <sound/jack.h>
37#include <sound/asoundef.h>
38#include <sound/tlv.h>
39#include "hda_codec.h"
40#include "hda_local.h"
41#include "hda_jack.h"
42
43static bool static_hdmi_pcm;
44module_param(static_hdmi_pcm, bool, 0644);
45MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47struct hdmi_spec_per_cvt {
48 hda_nid_t cvt_nid;
49 int assigned;
50 unsigned int channels_min;
51 unsigned int channels_max;
52 u32 rates;
53 u64 formats;
54 unsigned int maxbps;
55};
56
57
58#define HDA_MAX_CONNECTIONS 32
59
60struct hdmi_spec_per_pin {
61 hda_nid_t pin_nid;
62 int num_mux_nids;
63 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
64
65 struct hda_codec *codec;
66 struct hdmi_eld sink_eld;
67 struct delayed_work work;
68 struct snd_kcontrol *eld_ctl;
69 int repoll_count;
70 bool non_pcm;
71 bool chmap_set;
72 unsigned char chmap[8];
73 char pcm_name[8];
74};
75
76struct hdmi_spec {
77 int num_cvts;
78 struct snd_array cvts;
79 hda_nid_t cvt_nids[4];
80
81 int num_pins;
82 struct snd_array pins;
83 struct snd_array pcm_rec;
84 unsigned int channels_max;
85
86 struct hdmi_eld temp_eld;
87
88
89
90 struct hda_multi_out multiout;
91 struct hda_pcm_stream pcm_playback;
92};
93
94
95struct hdmi_audio_infoframe {
96 u8 type;
97 u8 ver;
98 u8 len;
99
100 u8 checksum;
101
102 u8 CC02_CT47;
103 u8 SS01_SF24;
104 u8 CXT04;
105 u8 CA;
106 u8 LFEPBL01_LSV36_DM_INH7;
107};
108
109struct dp_audio_infoframe {
110 u8 type;
111 u8 len;
112 u8 ver;
113
114 u8 CC02_CT47;
115 u8 SS01_SF24;
116 u8 CXT04;
117 u8 CA;
118 u8 LFEPBL01_LSV36_DM_INH7;
119};
120
121union audio_infoframe {
122 struct hdmi_audio_infoframe hdmi;
123 struct dp_audio_infoframe dp;
124 u8 bytes[0];
125};
126
127
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139
140
141enum cea_speaker_placement {
142 FL = (1 << 0),
143 FC = (1 << 1),
144 FR = (1 << 2),
145 FLC = (1 << 3),
146 FRC = (1 << 4),
147 RL = (1 << 5),
148 RC = (1 << 6),
149 RR = (1 << 7),
150 RLC = (1 << 8),
151 RRC = (1 << 9),
152 LFE = (1 << 10),
153 FLW = (1 << 11),
154 FRW = (1 << 12),
155 FLH = (1 << 13),
156 FCH = (1 << 14),
157 FRH = (1 << 15),
158 TC = (1 << 16),
159};
160
161
162
163
164static int eld_speaker_allocation_bits[] = {
165 [0] = FL | FR,
166 [1] = LFE,
167 [2] = FC,
168 [3] = RL | RR,
169 [4] = RC,
170 [5] = FLC | FRC,
171 [6] = RLC | RRC,
172
173 [7] = FLW | FRW,
174 [8] = FLH | FRH,
175 [9] = TC,
176 [10] = FCH,
177};
178
179struct cea_channel_speaker_allocation {
180 int ca_index;
181 int speakers[8];
182
183
184 int channels;
185 int spk_mask;
186};
187
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201
202
203static int hdmi_channel_mapping[0x32][8] = {
204
205 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
206
207 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
208
209 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
210
211 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
212
213 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
214
215 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
216
217 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
218
219 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
220
221 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
222};
223
224
225
226
227
228
229
230static struct cea_channel_speaker_allocation channel_allocations[] = {
231
232{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
233
234{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
235
236{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
237
238{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
239
240{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
241
242{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
243
244{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
245
246{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
247
248{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
249
250{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
251{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
252{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
253{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
254{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
255{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
256{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
257{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
258{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
259{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
260{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
261{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
262{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
263{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
264{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
265{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
266{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
267{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
268{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
269{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
270{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
271{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
272{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
273{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
274{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
275{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
276{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
277{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
278{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
279{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
280{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
281{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
282{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
283{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
284{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
285{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
286{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
287{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
288{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
289{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
290{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
291};
292
293
294
295
296
297
298#define get_pin(spec, idx) \
299 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
300#define get_cvt(spec, idx) \
301 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
302#define get_pcm_rec(spec, idx) \
303 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
304
305static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
306{
307 int pin_idx;
308
309 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
310 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
311 return pin_idx;
312
313 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
314 return -EINVAL;
315}
316
317static int hinfo_to_pin_index(struct hdmi_spec *spec,
318 struct hda_pcm_stream *hinfo)
319{
320 int pin_idx;
321
322 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
323 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
324 return pin_idx;
325
326 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
327 return -EINVAL;
328}
329
330static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
331{
332 int cvt_idx;
333
334 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
335 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
336 return cvt_idx;
337
338 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
339 return -EINVAL;
340}
341
342static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
343 struct snd_ctl_elem_info *uinfo)
344{
345 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
346 struct hdmi_spec *spec = codec->spec;
347 struct hdmi_eld *eld;
348 int pin_idx;
349
350 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
351
352 pin_idx = kcontrol->private_value;
353 eld = &get_pin(spec, pin_idx)->sink_eld;
354
355 mutex_lock(&eld->lock);
356 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
357 mutex_unlock(&eld->lock);
358
359 return 0;
360}
361
362static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
363 struct snd_ctl_elem_value *ucontrol)
364{
365 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
366 struct hdmi_spec *spec = codec->spec;
367 struct hdmi_eld *eld;
368 int pin_idx;
369
370 pin_idx = kcontrol->private_value;
371 eld = &get_pin(spec, pin_idx)->sink_eld;
372
373 mutex_lock(&eld->lock);
374 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
375 mutex_unlock(&eld->lock);
376 snd_BUG();
377 return -EINVAL;
378 }
379
380 memset(ucontrol->value.bytes.data, 0,
381 ARRAY_SIZE(ucontrol->value.bytes.data));
382 if (eld->eld_valid)
383 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
384 eld->eld_size);
385 mutex_unlock(&eld->lock);
386
387 return 0;
388}
389
390static struct snd_kcontrol_new eld_bytes_ctl = {
391 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
392 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
393 .name = "ELD",
394 .info = hdmi_eld_ctl_info,
395 .get = hdmi_eld_ctl_get,
396};
397
398static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
399 int device)
400{
401 struct snd_kcontrol *kctl;
402 struct hdmi_spec *spec = codec->spec;
403 int err;
404
405 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
406 if (!kctl)
407 return -ENOMEM;
408 kctl->private_value = pin_idx;
409 kctl->id.device = device;
410
411 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
412 if (err < 0)
413 return err;
414
415 get_pin(spec, pin_idx)->eld_ctl = kctl;
416 return 0;
417}
418
419#ifdef BE_PARANOID
420static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
421 int *packet_index, int *byte_index)
422{
423 int val;
424
425 val = snd_hda_codec_read(codec, pin_nid, 0,
426 AC_VERB_GET_HDMI_DIP_INDEX, 0);
427
428 *packet_index = val >> 5;
429 *byte_index = val & 0x1f;
430}
431#endif
432
433static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
434 int packet_index, int byte_index)
435{
436 int val;
437
438 val = (packet_index << 5) | (byte_index & 0x1f);
439
440 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
441}
442
443static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
444 unsigned char val)
445{
446 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
447}
448
449static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
450{
451
452 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
453 snd_hda_codec_write(codec, pin_nid, 0,
454 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
455
456
457
458 snd_hda_codec_write(codec, pin_nid, 0,
459 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
460}
461
462static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
463{
464 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
465 AC_VERB_GET_CVT_CHAN_COUNT, 0);
466}
467
468static void hdmi_set_channel_count(struct hda_codec *codec,
469 hda_nid_t cvt_nid, int chs)
470{
471 if (chs != hdmi_get_channel_count(codec, cvt_nid))
472 snd_hda_codec_write(codec, cvt_nid, 0,
473 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
474}
475
476
477
478
479
480
481
482
483
484static void init_channel_allocations(void)
485{
486 int i, j;
487 struct cea_channel_speaker_allocation *p;
488
489 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
490 p = channel_allocations + i;
491 p->channels = 0;
492 p->spk_mask = 0;
493 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
494 if (p->speakers[j]) {
495 p->channels++;
496 p->spk_mask |= p->speakers[j];
497 }
498 }
499}
500
501static int get_channel_allocation_order(int ca)
502{
503 int i;
504
505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
506 if (channel_allocations[i].ca_index == ca)
507 break;
508 }
509 return i;
510}
511
512
513
514
515
516
517
518
519
520static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
521{
522 int i;
523 int ca = 0;
524 int spk_mask = 0;
525 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
526
527
528
529
530 if (channels <= 2)
531 return 0;
532
533
534
535
536
537
538
539 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
540 if (eld->info.spk_alloc & (1 << i))
541 spk_mask |= eld_speaker_allocation_bits[i];
542 }
543
544
545 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
546 if (channels == channel_allocations[i].channels &&
547 (spk_mask & channel_allocations[i].spk_mask) ==
548 channel_allocations[i].spk_mask) {
549 ca = channel_allocations[i].ca_index;
550 break;
551 }
552 }
553
554 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
555 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
556 ca, channels, buf);
557
558 return ca;
559}
560
561static void hdmi_debug_channel_mapping(struct hda_codec *codec,
562 hda_nid_t pin_nid)
563{
564#ifdef CONFIG_SND_DEBUG_VERBOSE
565 int i;
566 int slot;
567
568 for (i = 0; i < 8; i++) {
569 slot = snd_hda_codec_read(codec, pin_nid, 0,
570 AC_VERB_GET_HDMI_CHAN_SLOT, i);
571 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
572 slot >> 4, slot & 0xf);
573 }
574#endif
575}
576
577
578static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
579 hda_nid_t pin_nid,
580 bool non_pcm,
581 int ca)
582{
583 int i;
584 int err;
585 int order;
586 int non_pcm_mapping[8];
587
588 order = get_channel_allocation_order(ca);
589
590 if (hdmi_channel_mapping[ca][1] == 0) {
591 for (i = 0; i < channel_allocations[order].channels; i++)
592 hdmi_channel_mapping[ca][i] = i | (i << 4);
593 for (; i < 8; i++)
594 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
595 }
596
597 if (non_pcm) {
598 for (i = 0; i < channel_allocations[order].channels; i++)
599 non_pcm_mapping[i] = i | (i << 4);
600 for (; i < 8; i++)
601 non_pcm_mapping[i] = 0xf | (i << 4);
602 }
603
604 for (i = 0; i < 8; i++) {
605 err = snd_hda_codec_write(codec, pin_nid, 0,
606 AC_VERB_SET_HDMI_CHAN_SLOT,
607 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
608 if (err) {
609 snd_printdd(KERN_NOTICE
610 "HDMI: channel mapping failed\n");
611 break;
612 }
613 }
614
615 hdmi_debug_channel_mapping(codec, pin_nid);
616}
617
618struct channel_map_table {
619 unsigned char map;
620 unsigned char cea_slot;
621 int spk_mask;
622};
623
624static struct channel_map_table map_tables[] = {
625 { SNDRV_CHMAP_FL, 0x00, FL },
626 { SNDRV_CHMAP_FR, 0x01, FR },
627 { SNDRV_CHMAP_RL, 0x04, RL },
628 { SNDRV_CHMAP_RR, 0x05, RR },
629 { SNDRV_CHMAP_LFE, 0x02, LFE },
630 { SNDRV_CHMAP_FC, 0x03, FC },
631 { SNDRV_CHMAP_RLC, 0x06, RLC },
632 { SNDRV_CHMAP_RRC, 0x07, RRC },
633 {}
634};
635
636
637static int to_spk_mask(unsigned char c)
638{
639 struct channel_map_table *t = map_tables;
640 for (; t->map; t++) {
641 if (t->map == c)
642 return t->spk_mask;
643 }
644 return 0;
645}
646
647
648static int to_cea_slot(unsigned char c)
649{
650 struct channel_map_table *t = map_tables;
651 for (; t->map; t++) {
652 if (t->map == c)
653 return t->cea_slot;
654 }
655 return 0x0f;
656}
657
658
659static int from_cea_slot(unsigned char c)
660{
661 struct channel_map_table *t = map_tables;
662 for (; t->map; t++) {
663 if (t->cea_slot == c)
664 return t->map;
665 }
666 return 0;
667}
668
669
670static int spk_to_chmap(int spk)
671{
672 struct channel_map_table *t = map_tables;
673 for (; t->map; t++) {
674 if (t->spk_mask == spk)
675 return t->map;
676 }
677 return 0;
678}
679
680
681static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
682{
683 int i, spks = 0, spk_mask = 0;
684
685 for (i = 0; i < chs; i++) {
686 int mask = to_spk_mask(map[i]);
687 if (mask) {
688 spk_mask |= mask;
689 spks++;
690 }
691 }
692
693 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
694 if ((chs == channel_allocations[i].channels ||
695 spks == channel_allocations[i].channels) &&
696 (spk_mask & channel_allocations[i].spk_mask) ==
697 channel_allocations[i].spk_mask)
698 return channel_allocations[i].ca_index;
699 }
700 return -1;
701}
702
703
704static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
705 hda_nid_t pin_nid,
706 int chs, unsigned char *map)
707{
708 int i;
709 for (i = 0; i < 8; i++) {
710 int val, err;
711 if (i < chs)
712 val = to_cea_slot(map[i]);
713 else
714 val = 0xf;
715 val |= (i << 4);
716 err = snd_hda_codec_write(codec, pin_nid, 0,
717 AC_VERB_SET_HDMI_CHAN_SLOT, val);
718 if (err)
719 return -EINVAL;
720 }
721 return 0;
722}
723
724
725static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
726{
727 int i;
728 for (i = 0; i < 8; i++) {
729 if (i < channel_allocations[ca].channels)
730 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
731 else
732 map[i] = 0;
733 }
734}
735
736static void hdmi_setup_channel_mapping(struct hda_codec *codec,
737 hda_nid_t pin_nid, bool non_pcm, int ca,
738 int channels, unsigned char *map,
739 bool chmap_set)
740{
741 if (!non_pcm && chmap_set) {
742 hdmi_manual_setup_channel_mapping(codec, pin_nid,
743 channels, map);
744 } else {
745 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
746 hdmi_setup_fake_chmap(map, ca);
747 }
748}
749
750
751
752
753
754
755
756
757static void hdmi_start_infoframe_trans(struct hda_codec *codec,
758 hda_nid_t pin_nid)
759{
760 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
761 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
762 AC_DIPXMIT_BEST);
763}
764
765
766
767
768static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
769 hda_nid_t pin_nid)
770{
771 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
772 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
773 AC_DIPXMIT_DISABLE);
774}
775
776static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
777{
778#ifdef CONFIG_SND_DEBUG_VERBOSE
779 int i;
780 int size;
781
782 size = snd_hdmi_get_eld_size(codec, pin_nid);
783 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
784
785 for (i = 0; i < 8; i++) {
786 size = snd_hda_codec_read(codec, pin_nid, 0,
787 AC_VERB_GET_HDMI_DIP_SIZE, i);
788 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
789 }
790#endif
791}
792
793static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
794{
795#ifdef BE_PARANOID
796 int i, j;
797 int size;
798 int pi, bi;
799 for (i = 0; i < 8; i++) {
800 size = snd_hda_codec_read(codec, pin_nid, 0,
801 AC_VERB_GET_HDMI_DIP_SIZE, i);
802 if (size == 0)
803 continue;
804
805 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
806 for (j = 1; j < 1000; j++) {
807 hdmi_write_dip_byte(codec, pin_nid, 0x0);
808 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
809 if (pi != i)
810 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
811 bi, pi, i);
812 if (bi == 0)
813 break;
814 }
815 snd_printd(KERN_INFO
816 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
817 i, size, j);
818 }
819#endif
820}
821
822static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
823{
824 u8 *bytes = (u8 *)hdmi_ai;
825 u8 sum = 0;
826 int i;
827
828 hdmi_ai->checksum = 0;
829
830 for (i = 0; i < sizeof(*hdmi_ai); i++)
831 sum += bytes[i];
832
833 hdmi_ai->checksum = -sum;
834}
835
836static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
837 hda_nid_t pin_nid,
838 u8 *dip, int size)
839{
840 int i;
841
842 hdmi_debug_dip_size(codec, pin_nid);
843 hdmi_clear_dip_buffers(codec, pin_nid);
844
845 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
846 for (i = 0; i < size; i++)
847 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
848}
849
850static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
851 u8 *dip, int size)
852{
853 u8 val;
854 int i;
855
856 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
857 != AC_DIPXMIT_BEST)
858 return false;
859
860 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
861 for (i = 0; i < size; i++) {
862 val = snd_hda_codec_read(codec, pin_nid, 0,
863 AC_VERB_GET_HDMI_DIP_DATA, 0);
864 if (val != dip[i])
865 return false;
866 }
867
868 return true;
869}
870
871static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
872 bool non_pcm,
873 struct snd_pcm_substream *substream)
874{
875 struct hdmi_spec *spec = codec->spec;
876 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
877 hda_nid_t pin_nid = per_pin->pin_nid;
878 int channels = substream->runtime->channels;
879 struct hdmi_eld *eld;
880 int ca;
881 union audio_infoframe ai;
882
883 eld = &per_pin->sink_eld;
884 if (!eld->monitor_present)
885 return;
886
887 if (!non_pcm && per_pin->chmap_set)
888 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
889 else
890 ca = hdmi_channel_allocation(eld, channels);
891 if (ca < 0)
892 ca = 0;
893
894 memset(&ai, 0, sizeof(ai));
895 if (eld->info.conn_type == 0) {
896 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
897
898 hdmi_ai->type = 0x84;
899 hdmi_ai->ver = 0x01;
900 hdmi_ai->len = 0x0a;
901 hdmi_ai->CC02_CT47 = channels - 1;
902 hdmi_ai->CA = ca;
903 hdmi_checksum_audio_infoframe(hdmi_ai);
904 } else if (eld->info.conn_type == 1) {
905 struct dp_audio_infoframe *dp_ai = &ai.dp;
906
907 dp_ai->type = 0x84;
908 dp_ai->len = 0x1b;
909 dp_ai->ver = 0x11 << 2;
910 dp_ai->CC02_CT47 = channels - 1;
911 dp_ai->CA = ca;
912 } else {
913 snd_printd("HDMI: unknown connection type at pin %d\n",
914 pin_nid);
915 return;
916 }
917
918
919
920
921
922
923 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
924 sizeof(ai))) {
925 snd_printdd("hdmi_setup_audio_infoframe: "
926 "pin=%d channels=%d\n",
927 pin_nid,
928 channels);
929 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
930 channels, per_pin->chmap,
931 per_pin->chmap_set);
932 hdmi_stop_infoframe_trans(codec, pin_nid);
933 hdmi_fill_audio_infoframe(codec, pin_nid,
934 ai.bytes, sizeof(ai));
935 hdmi_start_infoframe_trans(codec, pin_nid);
936 } else {
937
938
939 if (per_pin->non_pcm != non_pcm)
940 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
941 channels, per_pin->chmap,
942 per_pin->chmap_set);
943 }
944
945 per_pin->non_pcm = non_pcm;
946}
947
948
949
950
951
952
953static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
954
955static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
956{
957 struct hdmi_spec *spec = codec->spec;
958 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
959 int pin_nid;
960 int pin_idx;
961 struct hda_jack_tbl *jack;
962
963 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
964 if (!jack)
965 return;
966 pin_nid = jack->nid;
967 jack->jack_dirty = 1;
968
969 _snd_printd(SND_PR_VERBOSE,
970 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
971 codec->addr, pin_nid,
972 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
973
974 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
975 if (pin_idx < 0)
976 return;
977
978 hdmi_present_sense(get_pin(spec, pin_idx), 1);
979 snd_hda_jack_report_sync(codec);
980}
981
982static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
983{
984 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
985 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
986 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
987 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
988
989 printk(KERN_INFO
990 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
991 codec->addr,
992 tag,
993 subtag,
994 cp_state,
995 cp_ready);
996
997
998 if (cp_state)
999 ;
1000 if (cp_ready)
1001 ;
1002}
1003
1004
1005static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1006{
1007 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1008 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1009
1010 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1011 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1012 return;
1013 }
1014
1015 if (subtag == 0)
1016 hdmi_intrinsic_event(codec, res);
1017 else
1018 hdmi_non_intrinsic_event(codec, res);
1019}
1020
1021static void haswell_verify_pin_D0(struct hda_codec *codec, hda_nid_t nid)
1022{
1023 int pwr, lamp, ramp;
1024
1025 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1026 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1027 if (pwr != AC_PWRST_D0) {
1028 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1029 AC_PWRST_D0);
1030 msleep(40);
1031 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1032 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1033 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1034 }
1035
1036 lamp = snd_hda_codec_read(codec, nid, 0,
1037 AC_VERB_GET_AMP_GAIN_MUTE,
1038 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1039 ramp = snd_hda_codec_read(codec, nid, 0,
1040 AC_VERB_GET_AMP_GAIN_MUTE,
1041 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1042 if (lamp != ramp) {
1043 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1044 AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
1045
1046 lamp = snd_hda_codec_read(codec, nid, 0,
1047 AC_VERB_GET_AMP_GAIN_MUTE,
1048 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1049 ramp = snd_hda_codec_read(codec, nid, 0,
1050 AC_VERB_GET_AMP_GAIN_MUTE,
1051 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1052 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
1053 }
1054}
1055
1056
1057
1058
1059
1060
1061#define is_hbr_format(format) \
1062 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1063
1064static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1065 hda_nid_t pin_nid, u32 stream_tag, int format)
1066{
1067 int pinctl;
1068 int new_pinctl = 0;
1069
1070 if (codec->vendor_id == 0x80862807)
1071 haswell_verify_pin_D0(codec, pin_nid);
1072
1073 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1074 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1075 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1076
1077 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1078 if (is_hbr_format(format))
1079 new_pinctl |= AC_PINCTL_EPT_HBR;
1080 else
1081 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1082
1083 snd_printdd("hdmi_setup_stream: "
1084 "NID=0x%x, %spinctl=0x%x\n",
1085 pin_nid,
1086 pinctl == new_pinctl ? "" : "new-",
1087 new_pinctl);
1088
1089 if (pinctl != new_pinctl)
1090 snd_hda_codec_write(codec, pin_nid, 0,
1091 AC_VERB_SET_PIN_WIDGET_CONTROL,
1092 new_pinctl);
1093
1094 }
1095 if (is_hbr_format(format) && !new_pinctl) {
1096 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1097 return -EINVAL;
1098 }
1099
1100 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1101 return 0;
1102}
1103
1104
1105
1106
1107static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1108 struct hda_codec *codec,
1109 struct snd_pcm_substream *substream)
1110{
1111 struct hdmi_spec *spec = codec->spec;
1112 struct snd_pcm_runtime *runtime = substream->runtime;
1113 int pin_idx, cvt_idx, mux_idx = 0;
1114 struct hdmi_spec_per_pin *per_pin;
1115 struct hdmi_eld *eld;
1116 struct hdmi_spec_per_cvt *per_cvt = NULL;
1117
1118
1119 pin_idx = hinfo_to_pin_index(spec, hinfo);
1120 if (snd_BUG_ON(pin_idx < 0))
1121 return -EINVAL;
1122 per_pin = get_pin(spec, pin_idx);
1123 eld = &per_pin->sink_eld;
1124
1125
1126 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1127 per_cvt = get_cvt(spec, cvt_idx);
1128
1129
1130 if (per_cvt->assigned)
1131 continue;
1132
1133 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1134 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1135 break;
1136
1137 if (mux_idx == per_pin->num_mux_nids)
1138 continue;
1139 break;
1140 }
1141
1142 if (cvt_idx == spec->num_cvts)
1143 return -ENODEV;
1144
1145
1146 per_cvt->assigned = 1;
1147 hinfo->nid = per_cvt->cvt_nid;
1148
1149 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1150 AC_VERB_SET_CONNECT_SEL,
1151 mux_idx);
1152 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1153
1154
1155 hinfo->channels_min = per_cvt->channels_min;
1156 hinfo->channels_max = per_cvt->channels_max;
1157 hinfo->rates = per_cvt->rates;
1158 hinfo->formats = per_cvt->formats;
1159 hinfo->maxbps = per_cvt->maxbps;
1160
1161
1162 if (!static_hdmi_pcm && eld->eld_valid) {
1163 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1164 if (hinfo->channels_min > hinfo->channels_max ||
1165 !hinfo->rates || !hinfo->formats) {
1166 per_cvt->assigned = 0;
1167 hinfo->nid = 0;
1168 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1169 return -ENODEV;
1170 }
1171 }
1172
1173
1174 runtime->hw.channels_min = hinfo->channels_min;
1175 runtime->hw.channels_max = hinfo->channels_max;
1176 runtime->hw.formats = hinfo->formats;
1177 runtime->hw.rates = hinfo->rates;
1178
1179 snd_pcm_hw_constraint_step(substream->runtime, 0,
1180 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1181 return 0;
1182}
1183
1184
1185
1186
1187static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1188{
1189 struct hdmi_spec *spec = codec->spec;
1190 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1191 hda_nid_t pin_nid = per_pin->pin_nid;
1192
1193 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1194 snd_printk(KERN_WARNING
1195 "HDMI: pin %d wcaps %#x "
1196 "does not support connection list\n",
1197 pin_nid, get_wcaps(codec, pin_nid));
1198 return -EINVAL;
1199 }
1200
1201 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1202 per_pin->mux_nids,
1203 HDA_MAX_CONNECTIONS);
1204
1205 return 0;
1206}
1207
1208static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1209{
1210 struct hda_codec *codec = per_pin->codec;
1211 struct hdmi_spec *spec = codec->spec;
1212 struct hdmi_eld *eld = &spec->temp_eld;
1213 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1214 hda_nid_t pin_nid = per_pin->pin_nid;
1215
1216
1217
1218
1219
1220
1221
1222
1223 int present = snd_hda_pin_sense(codec, pin_nid);
1224 bool update_eld = false;
1225 bool eld_changed = false;
1226
1227 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1228 if (pin_eld->monitor_present)
1229 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1230 else
1231 eld->eld_valid = false;
1232
1233 _snd_printd(SND_PR_VERBOSE,
1234 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1235 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1236
1237 if (eld->eld_valid) {
1238 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1239 &eld->eld_size) < 0)
1240 eld->eld_valid = false;
1241 else {
1242 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1243 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1244 eld->eld_size) < 0)
1245 eld->eld_valid = false;
1246 }
1247
1248 if (eld->eld_valid) {
1249 snd_hdmi_show_eld(&eld->info);
1250 update_eld = true;
1251 }
1252 else if (repoll) {
1253 queue_delayed_work(codec->bus->workq,
1254 &per_pin->work,
1255 msecs_to_jiffies(300));
1256 return;
1257 }
1258 }
1259
1260 mutex_lock(&pin_eld->lock);
1261 if (pin_eld->eld_valid && !eld->eld_valid) {
1262 update_eld = true;
1263 eld_changed = true;
1264 }
1265 if (update_eld) {
1266 pin_eld->eld_valid = eld->eld_valid;
1267 eld_changed = pin_eld->eld_size != eld->eld_size ||
1268 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1269 eld->eld_size) != 0;
1270 if (eld_changed)
1271 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1272 eld->eld_size);
1273 pin_eld->eld_size = eld->eld_size;
1274 pin_eld->info = eld->info;
1275 }
1276 mutex_unlock(&pin_eld->lock);
1277
1278 if (eld_changed)
1279 snd_ctl_notify(codec->bus->card,
1280 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1281 &per_pin->eld_ctl->id);
1282}
1283
1284static void hdmi_repoll_eld(struct work_struct *work)
1285{
1286 struct hdmi_spec_per_pin *per_pin =
1287 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1288
1289 if (per_pin->repoll_count++ > 6)
1290 per_pin->repoll_count = 0;
1291
1292 hdmi_present_sense(per_pin, per_pin->repoll_count);
1293}
1294
1295static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1296 hda_nid_t nid);
1297
1298static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1299{
1300 struct hdmi_spec *spec = codec->spec;
1301 unsigned int caps, config;
1302 int pin_idx;
1303 struct hdmi_spec_per_pin *per_pin;
1304 int err;
1305
1306 caps = snd_hda_query_pin_caps(codec, pin_nid);
1307 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1308 return 0;
1309
1310 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1311 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1312 return 0;
1313
1314 if (codec->vendor_id == 0x80862807)
1315 intel_haswell_fixup_connect_list(codec, pin_nid);
1316
1317 pin_idx = spec->num_pins;
1318 per_pin = snd_array_new(&spec->pins);
1319 if (!per_pin)
1320 return -ENOMEM;
1321
1322 per_pin->pin_nid = pin_nid;
1323 per_pin->non_pcm = false;
1324
1325 err = hdmi_read_pin_conn(codec, pin_idx);
1326 if (err < 0)
1327 return err;
1328
1329 spec->num_pins++;
1330
1331 return 0;
1332}
1333
1334static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1335{
1336 struct hdmi_spec *spec = codec->spec;
1337 struct hdmi_spec_per_cvt *per_cvt;
1338 unsigned int chans;
1339 int err;
1340
1341 chans = get_wcaps(codec, cvt_nid);
1342 chans = get_wcaps_channels(chans);
1343
1344 per_cvt = snd_array_new(&spec->cvts);
1345 if (!per_cvt)
1346 return -ENOMEM;
1347
1348 per_cvt->cvt_nid = cvt_nid;
1349 per_cvt->channels_min = 2;
1350 if (chans <= 16) {
1351 per_cvt->channels_max = chans;
1352 if (chans > spec->channels_max)
1353 spec->channels_max = chans;
1354 }
1355
1356 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1357 &per_cvt->rates,
1358 &per_cvt->formats,
1359 &per_cvt->maxbps);
1360 if (err < 0)
1361 return err;
1362
1363 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1364 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1365 spec->num_cvts++;
1366
1367 return 0;
1368}
1369
1370static int hdmi_parse_codec(struct hda_codec *codec)
1371{
1372 hda_nid_t nid;
1373 int i, nodes;
1374
1375 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1376 if (!nid || nodes < 0) {
1377 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1378 return -EINVAL;
1379 }
1380
1381 for (i = 0; i < nodes; i++, nid++) {
1382 unsigned int caps;
1383 unsigned int type;
1384
1385 caps = get_wcaps(codec, nid);
1386 type = get_wcaps_type(caps);
1387
1388 if (!(caps & AC_WCAP_DIGITAL))
1389 continue;
1390
1391 switch (type) {
1392 case AC_WID_AUD_OUT:
1393 hdmi_add_cvt(codec, nid);
1394 break;
1395 case AC_WID_PIN:
1396 hdmi_add_pin(codec, nid);
1397 break;
1398 }
1399 }
1400
1401#ifdef CONFIG_PM
1402
1403
1404 if (codec->vendor_id == 0x80862806)
1405 codec->bus->power_keep_link_on = 1;
1406
1407
1408
1409
1410
1411 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1412 AC_PWRST_EPSS))
1413 codec->bus->power_keep_link_on = 1;
1414#endif
1415
1416 return 0;
1417}
1418
1419
1420
1421static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1422{
1423 struct hda_spdif_out *spdif;
1424 bool non_pcm;
1425
1426 mutex_lock(&codec->spdif_mutex);
1427 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1428 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1429 mutex_unlock(&codec->spdif_mutex);
1430 return non_pcm;
1431}
1432
1433
1434
1435
1436
1437
1438static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1439 struct hda_codec *codec,
1440 unsigned int stream_tag,
1441 unsigned int format,
1442 struct snd_pcm_substream *substream)
1443{
1444 hda_nid_t cvt_nid = hinfo->nid;
1445 struct hdmi_spec *spec = codec->spec;
1446 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1447 hda_nid_t pin_nid = get_pin(spec, pin_idx)->pin_nid;
1448 bool non_pcm;
1449
1450 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1451
1452 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1453
1454 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1455
1456 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1457}
1458
1459static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1460 struct hda_codec *codec,
1461 struct snd_pcm_substream *substream)
1462{
1463 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1464 return 0;
1465}
1466
1467static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1468 struct hda_codec *codec,
1469 struct snd_pcm_substream *substream)
1470{
1471 struct hdmi_spec *spec = codec->spec;
1472 int cvt_idx, pin_idx;
1473 struct hdmi_spec_per_cvt *per_cvt;
1474 struct hdmi_spec_per_pin *per_pin;
1475
1476 if (hinfo->nid) {
1477 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1478 if (snd_BUG_ON(cvt_idx < 0))
1479 return -EINVAL;
1480 per_cvt = get_cvt(spec, cvt_idx);
1481
1482 snd_BUG_ON(!per_cvt->assigned);
1483 per_cvt->assigned = 0;
1484 hinfo->nid = 0;
1485
1486 pin_idx = hinfo_to_pin_index(spec, hinfo);
1487 if (snd_BUG_ON(pin_idx < 0))
1488 return -EINVAL;
1489 per_pin = get_pin(spec, pin_idx);
1490
1491 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1492 per_pin->chmap_set = false;
1493 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1494 }
1495
1496 return 0;
1497}
1498
1499static const struct hda_pcm_ops generic_ops = {
1500 .open = hdmi_pcm_open,
1501 .close = hdmi_pcm_close,
1502 .prepare = generic_hdmi_playback_pcm_prepare,
1503 .cleanup = generic_hdmi_playback_pcm_cleanup,
1504};
1505
1506
1507
1508
1509static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1510 struct snd_ctl_elem_info *uinfo)
1511{
1512 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1513 struct hda_codec *codec = info->private_data;
1514 struct hdmi_spec *spec = codec->spec;
1515 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1516 uinfo->count = spec->channels_max;
1517 uinfo->value.integer.min = 0;
1518 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1519 return 0;
1520}
1521
1522static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1523 unsigned int size, unsigned int __user *tlv)
1524{
1525 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1526 struct hda_codec *codec = info->private_data;
1527 struct hdmi_spec *spec = codec->spec;
1528 const unsigned int valid_mask =
1529 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1530 unsigned int __user *dst;
1531 int chs, count = 0;
1532
1533 if (size < 8)
1534 return -ENOMEM;
1535 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1536 return -EFAULT;
1537 size -= 8;
1538 dst = tlv + 2;
1539 for (chs = 2; chs <= spec->channels_max; chs++) {
1540 int i, c;
1541 struct cea_channel_speaker_allocation *cap;
1542 cap = channel_allocations;
1543 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1544 int chs_bytes = chs * 4;
1545 if (cap->channels != chs)
1546 continue;
1547 if (cap->spk_mask & ~valid_mask)
1548 continue;
1549 if (size < 8)
1550 return -ENOMEM;
1551 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1552 put_user(chs_bytes, dst + 1))
1553 return -EFAULT;
1554 dst += 2;
1555 size -= 8;
1556 count += 8;
1557 if (size < chs_bytes)
1558 return -ENOMEM;
1559 size -= chs_bytes;
1560 count += chs_bytes;
1561 for (c = 7; c >= 0; c--) {
1562 int spk = cap->speakers[c];
1563 if (!spk)
1564 continue;
1565 if (put_user(spk_to_chmap(spk), dst))
1566 return -EFAULT;
1567 dst++;
1568 }
1569 }
1570 }
1571 if (put_user(count, tlv + 1))
1572 return -EFAULT;
1573 return 0;
1574}
1575
1576static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1577 struct snd_ctl_elem_value *ucontrol)
1578{
1579 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1580 struct hda_codec *codec = info->private_data;
1581 struct hdmi_spec *spec = codec->spec;
1582 int pin_idx = kcontrol->private_value;
1583 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1584 int i;
1585
1586 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1587 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1588 return 0;
1589}
1590
1591static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1592 struct snd_ctl_elem_value *ucontrol)
1593{
1594 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1595 struct hda_codec *codec = info->private_data;
1596 struct hdmi_spec *spec = codec->spec;
1597 int pin_idx = kcontrol->private_value;
1598 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1599 unsigned int ctl_idx;
1600 struct snd_pcm_substream *substream;
1601 unsigned char chmap[8];
1602 int i, ca, prepared = 0;
1603
1604 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1605 substream = snd_pcm_chmap_substream(info, ctl_idx);
1606 if (!substream || !substream->runtime)
1607 return 0;
1608 switch (substream->runtime->status->state) {
1609 case SNDRV_PCM_STATE_OPEN:
1610 case SNDRV_PCM_STATE_SETUP:
1611 break;
1612 case SNDRV_PCM_STATE_PREPARED:
1613 prepared = 1;
1614 break;
1615 default:
1616 return -EBUSY;
1617 }
1618 memset(chmap, 0, sizeof(chmap));
1619 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1620 chmap[i] = ucontrol->value.integer.value[i];
1621 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1622 return 0;
1623 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1624 if (ca < 0)
1625 return -EINVAL;
1626 per_pin->chmap_set = true;
1627 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1628 if (prepared)
1629 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1630 substream);
1631
1632 return 0;
1633}
1634
1635static int generic_hdmi_build_pcms(struct hda_codec *codec)
1636{
1637 struct hdmi_spec *spec = codec->spec;
1638 int pin_idx;
1639
1640 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1641 struct hda_pcm *info;
1642 struct hda_pcm_stream *pstr;
1643 struct hdmi_spec_per_pin *per_pin;
1644
1645 per_pin = get_pin(spec, pin_idx);
1646 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1647 info = snd_array_new(&spec->pcm_rec);
1648 if (!info)
1649 return -ENOMEM;
1650 info->name = per_pin->pcm_name;
1651 info->pcm_type = HDA_PCM_TYPE_HDMI;
1652 info->own_chmap = true;
1653
1654 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1655 pstr->substreams = 1;
1656 pstr->ops = generic_ops;
1657
1658 }
1659
1660 codec->num_pcms = spec->num_pins;
1661 codec->pcm_info = spec->pcm_rec.list;
1662
1663 return 0;
1664}
1665
1666static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1667{
1668 char hdmi_str[32] = "HDMI/DP";
1669 struct hdmi_spec *spec = codec->spec;
1670 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1671 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1672
1673 if (pcmdev > 0)
1674 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1675 if (!is_jack_detectable(codec, per_pin->pin_nid))
1676 strncat(hdmi_str, " Phantom",
1677 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1678
1679 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1680}
1681
1682static int generic_hdmi_build_controls(struct hda_codec *codec)
1683{
1684 struct hdmi_spec *spec = codec->spec;
1685 int err;
1686 int pin_idx;
1687
1688 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1689 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1690
1691 err = generic_hdmi_build_jack(codec, pin_idx);
1692 if (err < 0)
1693 return err;
1694
1695 err = snd_hda_create_dig_out_ctls(codec,
1696 per_pin->pin_nid,
1697 per_pin->mux_nids[0],
1698 HDA_PCM_TYPE_HDMI);
1699 if (err < 0)
1700 return err;
1701 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1702
1703
1704 err = hdmi_create_eld_ctl(codec, pin_idx,
1705 get_pcm_rec(spec, pin_idx)->device);
1706
1707 if (err < 0)
1708 return err;
1709
1710 hdmi_present_sense(per_pin, 0);
1711 }
1712
1713
1714 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1715 struct snd_pcm_chmap *chmap;
1716 struct snd_kcontrol *kctl;
1717 int i;
1718 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1719 SNDRV_PCM_STREAM_PLAYBACK,
1720 NULL, 0, pin_idx, &chmap);
1721 if (err < 0)
1722 return err;
1723
1724 chmap->private_data = codec;
1725 kctl = chmap->kctl;
1726 for (i = 0; i < kctl->count; i++)
1727 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1728 kctl->info = hdmi_chmap_ctl_info;
1729 kctl->get = hdmi_chmap_ctl_get;
1730 kctl->put = hdmi_chmap_ctl_put;
1731 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1732 }
1733
1734 return 0;
1735}
1736
1737static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1738{
1739 struct hdmi_spec *spec = codec->spec;
1740 int pin_idx;
1741
1742 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1743 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1744 struct hdmi_eld *eld = &per_pin->sink_eld;
1745
1746 per_pin->codec = codec;
1747 mutex_init(&eld->lock);
1748 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1749 snd_hda_eld_proc_new(codec, eld, pin_idx);
1750 }
1751 return 0;
1752}
1753
1754static int generic_hdmi_init(struct hda_codec *codec)
1755{
1756 struct hdmi_spec *spec = codec->spec;
1757 int pin_idx;
1758
1759 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1760 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1761 hda_nid_t pin_nid = per_pin->pin_nid;
1762
1763 hdmi_init_pin(codec, pin_nid);
1764 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1765 }
1766 return 0;
1767}
1768
1769static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1770{
1771 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1772 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1773 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1774}
1775
1776static void hdmi_array_free(struct hdmi_spec *spec)
1777{
1778 snd_array_free(&spec->pins);
1779 snd_array_free(&spec->cvts);
1780 snd_array_free(&spec->pcm_rec);
1781}
1782
1783static void generic_hdmi_free(struct hda_codec *codec)
1784{
1785 struct hdmi_spec *spec = codec->spec;
1786 int pin_idx;
1787
1788 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1789 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1790 struct hdmi_eld *eld = &per_pin->sink_eld;
1791
1792 cancel_delayed_work(&per_pin->work);
1793 snd_hda_eld_proc_free(codec, eld);
1794 }
1795
1796 flush_workqueue(codec->bus->workq);
1797 hdmi_array_free(spec);
1798 kfree(spec);
1799}
1800
1801static const struct hda_codec_ops generic_hdmi_patch_ops = {
1802 .init = generic_hdmi_init,
1803 .free = generic_hdmi_free,
1804 .build_pcms = generic_hdmi_build_pcms,
1805 .build_controls = generic_hdmi_build_controls,
1806 .unsol_event = hdmi_unsol_event,
1807};
1808
1809
1810static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1811 hda_nid_t nid)
1812{
1813 struct hdmi_spec *spec = codec->spec;
1814 hda_nid_t conns[4];
1815 int nconns;
1816
1817 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1818 if (nconns == spec->num_cvts &&
1819 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1820 return;
1821
1822
1823 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1824 nconns = max(spec->num_cvts, 4);
1825 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1826}
1827
1828#define INTEL_VENDOR_NID 0x08
1829#define INTEL_GET_VENDOR_VERB 0xf81
1830#define INTEL_SET_VENDOR_VERB 0x781
1831#define INTEL_EN_DP12 0x02
1832#define INTEL_EN_ALL_PIN_CVTS 0x01
1833
1834static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1835 bool update_tree)
1836{
1837 unsigned int vendor_param;
1838
1839 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1840 INTEL_GET_VENDOR_VERB, 0);
1841 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1842 return;
1843
1844 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1845 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1846 INTEL_SET_VENDOR_VERB, vendor_param);
1847 if (vendor_param == -1)
1848 return;
1849
1850 if (update_tree)
1851 snd_hda_codec_update_widgets(codec);
1852}
1853
1854static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1855{
1856 unsigned int vendor_param;
1857
1858 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1859 INTEL_GET_VENDOR_VERB, 0);
1860 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1861 return;
1862
1863
1864 vendor_param |= INTEL_EN_DP12;
1865 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1866 INTEL_SET_VENDOR_VERB, vendor_param);
1867}
1868
1869
1870
1871
1872static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1873 unsigned int power_state)
1874{
1875 if (power_state == AC_PWRST_D0) {
1876 intel_haswell_enable_all_pins(codec, false);
1877 intel_haswell_fixup_enable_dp12(codec);
1878 }
1879
1880 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
1881 snd_hda_codec_set_power_to_all(codec, fg, power_state);
1882}
1883
1884static int patch_generic_hdmi(struct hda_codec *codec)
1885{
1886 struct hdmi_spec *spec;
1887
1888 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1889 if (spec == NULL)
1890 return -ENOMEM;
1891
1892 codec->spec = spec;
1893 hdmi_array_init(spec, 4);
1894
1895 if (codec->vendor_id == 0x80862807) {
1896 intel_haswell_enable_all_pins(codec, true);
1897 intel_haswell_fixup_enable_dp12(codec);
1898 }
1899
1900 if (hdmi_parse_codec(codec) < 0) {
1901 codec->spec = NULL;
1902 kfree(spec);
1903 return -EINVAL;
1904 }
1905 codec->patch_ops = generic_hdmi_patch_ops;
1906 if (codec->vendor_id == 0x80862807)
1907 codec->patch_ops.set_power_state = haswell_set_power_state;
1908
1909 generic_hdmi_init_per_pins(codec);
1910
1911 init_channel_allocations();
1912
1913 return 0;
1914}
1915
1916
1917
1918
1919
1920static int simple_playback_build_pcms(struct hda_codec *codec)
1921{
1922 struct hdmi_spec *spec = codec->spec;
1923 struct hda_pcm *info;
1924 unsigned int chans;
1925 struct hda_pcm_stream *pstr;
1926 struct hdmi_spec_per_cvt *per_cvt;
1927
1928 per_cvt = get_cvt(spec, 0);
1929 chans = get_wcaps(codec, per_cvt->cvt_nid);
1930 chans = get_wcaps_channels(chans);
1931
1932 info = snd_array_new(&spec->pcm_rec);
1933 if (!info)
1934 return -ENOMEM;
1935 info->name = get_pin(spec, 0)->pcm_name;
1936 sprintf(info->name, "HDMI 0");
1937 info->pcm_type = HDA_PCM_TYPE_HDMI;
1938 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1939 *pstr = spec->pcm_playback;
1940 pstr->nid = per_cvt->cvt_nid;
1941 if (pstr->channels_max <= 2 && chans && chans <= 16)
1942 pstr->channels_max = chans;
1943
1944 codec->num_pcms = 1;
1945 codec->pcm_info = info;
1946
1947 return 0;
1948}
1949
1950
1951static void simple_hdmi_unsol_event(struct hda_codec *codec,
1952 unsigned int res)
1953{
1954 snd_hda_jack_set_dirty_all(codec);
1955 snd_hda_jack_report_sync(codec);
1956}
1957
1958
1959
1960
1961#define simple_hdmi_build_jack generic_hdmi_build_jack
1962
1963static int simple_playback_build_controls(struct hda_codec *codec)
1964{
1965 struct hdmi_spec *spec = codec->spec;
1966 struct hdmi_spec_per_cvt *per_cvt;
1967 int err;
1968
1969 per_cvt = get_cvt(spec, 0);
1970 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
1971 per_cvt->cvt_nid);
1972 if (err < 0)
1973 return err;
1974 return simple_hdmi_build_jack(codec, 0);
1975}
1976
1977static int simple_playback_init(struct hda_codec *codec)
1978{
1979 struct hdmi_spec *spec = codec->spec;
1980 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
1981 hda_nid_t pin = per_pin->pin_nid;
1982
1983 snd_hda_codec_write(codec, pin, 0,
1984 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1985
1986 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1987 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1988 AMP_OUT_UNMUTE);
1989 snd_hda_jack_detect_enable(codec, pin, pin);
1990 return 0;
1991}
1992
1993static void simple_playback_free(struct hda_codec *codec)
1994{
1995 struct hdmi_spec *spec = codec->spec;
1996
1997 hdmi_array_free(spec);
1998 kfree(spec);
1999}
2000
2001
2002
2003
2004
2005#define Nv_VERB_SET_Channel_Allocation 0xF79
2006#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2007#define Nv_VERB_SET_Audio_Protection_On 0xF98
2008#define Nv_VERB_SET_Audio_Protection_Off 0xF99
2009
2010#define nvhdmi_master_con_nid_7x 0x04
2011#define nvhdmi_master_pin_nid_7x 0x05
2012
2013static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2014
2015 0x6, 0x8, 0xa, 0xc,
2016};
2017
2018static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2019
2020 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2021
2022 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2023 {}
2024};
2025
2026static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2027
2028 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2029
2030 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2031 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2032 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2033 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2034 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2035 {}
2036};
2037
2038#ifdef LIMITED_RATE_FMT_SUPPORT
2039
2040#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2041#define SUPPORTED_MAXBPS 16
2042#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2043#else
2044
2045#define SUPPORTED_RATES \
2046 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2047 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2048 SNDRV_PCM_RATE_192000)
2049#define SUPPORTED_MAXBPS 24
2050#define SUPPORTED_FORMATS \
2051 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2052#endif
2053
2054static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2055{
2056 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2057 return 0;
2058}
2059
2060static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2061{
2062 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2063 return 0;
2064}
2065
2066static unsigned int channels_2_6_8[] = {
2067 2, 6, 8
2068};
2069
2070static unsigned int channels_2_8[] = {
2071 2, 8
2072};
2073
2074static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2075 .count = ARRAY_SIZE(channels_2_6_8),
2076 .list = channels_2_6_8,
2077 .mask = 0,
2078};
2079
2080static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2081 .count = ARRAY_SIZE(channels_2_8),
2082 .list = channels_2_8,
2083 .mask = 0,
2084};
2085
2086static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2087 struct hda_codec *codec,
2088 struct snd_pcm_substream *substream)
2089{
2090 struct hdmi_spec *spec = codec->spec;
2091 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2092
2093 switch (codec->preset->id) {
2094 case 0x10de0002:
2095 case 0x10de0003:
2096 case 0x10de0005:
2097 case 0x10de0006:
2098 hw_constraints_channels = &hw_constraints_2_8_channels;
2099 break;
2100 case 0x10de0007:
2101 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2102 break;
2103 default:
2104 break;
2105 }
2106
2107 if (hw_constraints_channels != NULL) {
2108 snd_pcm_hw_constraint_list(substream->runtime, 0,
2109 SNDRV_PCM_HW_PARAM_CHANNELS,
2110 hw_constraints_channels);
2111 } else {
2112 snd_pcm_hw_constraint_step(substream->runtime, 0,
2113 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2114 }
2115
2116 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2117}
2118
2119static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2120 struct hda_codec *codec,
2121 struct snd_pcm_substream *substream)
2122{
2123 struct hdmi_spec *spec = codec->spec;
2124 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2125}
2126
2127static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2128 struct hda_codec *codec,
2129 unsigned int stream_tag,
2130 unsigned int format,
2131 struct snd_pcm_substream *substream)
2132{
2133 struct hdmi_spec *spec = codec->spec;
2134 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2135 stream_tag, format, substream);
2136}
2137
2138static const struct hda_pcm_stream simple_pcm_playback = {
2139 .substreams = 1,
2140 .channels_min = 2,
2141 .channels_max = 2,
2142 .ops = {
2143 .open = simple_playback_pcm_open,
2144 .close = simple_playback_pcm_close,
2145 .prepare = simple_playback_pcm_prepare
2146 },
2147};
2148
2149static const struct hda_codec_ops simple_hdmi_patch_ops = {
2150 .build_controls = simple_playback_build_controls,
2151 .build_pcms = simple_playback_build_pcms,
2152 .init = simple_playback_init,
2153 .free = simple_playback_free,
2154 .unsol_event = simple_hdmi_unsol_event,
2155};
2156
2157static int patch_simple_hdmi(struct hda_codec *codec,
2158 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2159{
2160 struct hdmi_spec *spec;
2161 struct hdmi_spec_per_cvt *per_cvt;
2162 struct hdmi_spec_per_pin *per_pin;
2163
2164 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2165 if (!spec)
2166 return -ENOMEM;
2167
2168 codec->spec = spec;
2169 hdmi_array_init(spec, 1);
2170
2171 spec->multiout.num_dacs = 0;
2172 spec->multiout.max_channels = 2;
2173 spec->multiout.dig_out_nid = cvt_nid;
2174 spec->num_cvts = 1;
2175 spec->num_pins = 1;
2176 per_pin = snd_array_new(&spec->pins);
2177 per_cvt = snd_array_new(&spec->cvts);
2178 if (!per_pin || !per_cvt) {
2179 simple_playback_free(codec);
2180 return -ENOMEM;
2181 }
2182 per_cvt->cvt_nid = cvt_nid;
2183 per_pin->pin_nid = pin_nid;
2184 spec->pcm_playback = simple_pcm_playback;
2185
2186 codec->patch_ops = simple_hdmi_patch_ops;
2187
2188 return 0;
2189}
2190
2191static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2192 int channels)
2193{
2194 unsigned int chanmask;
2195 int chan = channels ? (channels - 1) : 1;
2196
2197 switch (channels) {
2198 default:
2199 case 0:
2200 case 2:
2201 chanmask = 0x00;
2202 break;
2203 case 4:
2204 chanmask = 0x08;
2205 break;
2206 case 6:
2207 chanmask = 0x0b;
2208 break;
2209 case 8:
2210 chanmask = 0x13;
2211 break;
2212 }
2213
2214
2215
2216 snd_hda_codec_write(codec, 0x1, 0,
2217 Nv_VERB_SET_Channel_Allocation, chanmask);
2218
2219 snd_hda_codec_write(codec, 0x1, 0,
2220 Nv_VERB_SET_Info_Frame_Checksum,
2221 (0x71 - chan - chanmask));
2222}
2223
2224static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2225 struct hda_codec *codec,
2226 struct snd_pcm_substream *substream)
2227{
2228 struct hdmi_spec *spec = codec->spec;
2229 int i;
2230
2231 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2232 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2233 for (i = 0; i < 4; i++) {
2234
2235 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2236 AC_VERB_SET_CHANNEL_STREAMID, 0);
2237
2238 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2239 AC_VERB_SET_STREAM_FORMAT, 0);
2240 }
2241
2242
2243
2244 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2245
2246 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2247}
2248
2249static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2250 struct hda_codec *codec,
2251 unsigned int stream_tag,
2252 unsigned int format,
2253 struct snd_pcm_substream *substream)
2254{
2255 int chs;
2256 unsigned int dataDCC2, channel_id;
2257 int i;
2258 struct hdmi_spec *spec = codec->spec;
2259 struct hda_spdif_out *spdif;
2260 struct hdmi_spec_per_cvt *per_cvt;
2261
2262 mutex_lock(&codec->spdif_mutex);
2263 per_cvt = get_cvt(spec, 0);
2264 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2265
2266 chs = substream->runtime->channels;
2267
2268 dataDCC2 = 0x2;
2269
2270
2271 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2272 snd_hda_codec_write(codec,
2273 nvhdmi_master_con_nid_7x,
2274 0,
2275 AC_VERB_SET_DIGI_CONVERT_1,
2276 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2277
2278
2279 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2280 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2281
2282
2283 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2284 AC_VERB_SET_STREAM_FORMAT, format);
2285
2286
2287
2288 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2289 snd_hda_codec_write(codec,
2290 nvhdmi_master_con_nid_7x,
2291 0,
2292 AC_VERB_SET_DIGI_CONVERT_1,
2293 spdif->ctls & 0xff);
2294 snd_hda_codec_write(codec,
2295 nvhdmi_master_con_nid_7x,
2296 0,
2297 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2298 }
2299
2300 for (i = 0; i < 4; i++) {
2301 if (chs == 2)
2302 channel_id = 0;
2303 else
2304 channel_id = i * 2;
2305
2306
2307
2308
2309 if (codec->spdif_status_reset &&
2310 (spdif->ctls & AC_DIG1_ENABLE))
2311 snd_hda_codec_write(codec,
2312 nvhdmi_con_nids_7x[i],
2313 0,
2314 AC_VERB_SET_DIGI_CONVERT_1,
2315 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2316
2317 snd_hda_codec_write(codec,
2318 nvhdmi_con_nids_7x[i],
2319 0,
2320 AC_VERB_SET_CHANNEL_STREAMID,
2321 (stream_tag << 4) | channel_id);
2322
2323 snd_hda_codec_write(codec,
2324 nvhdmi_con_nids_7x[i],
2325 0,
2326 AC_VERB_SET_STREAM_FORMAT,
2327 format);
2328
2329
2330 if (codec->spdif_status_reset &&
2331 (spdif->ctls & AC_DIG1_ENABLE)) {
2332 snd_hda_codec_write(codec,
2333 nvhdmi_con_nids_7x[i],
2334 0,
2335 AC_VERB_SET_DIGI_CONVERT_1,
2336 spdif->ctls & 0xff);
2337 snd_hda_codec_write(codec,
2338 nvhdmi_con_nids_7x[i],
2339 0,
2340 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2341 }
2342 }
2343
2344 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2345
2346 mutex_unlock(&codec->spdif_mutex);
2347 return 0;
2348}
2349
2350static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2351 .substreams = 1,
2352 .channels_min = 2,
2353 .channels_max = 8,
2354 .nid = nvhdmi_master_con_nid_7x,
2355 .rates = SUPPORTED_RATES,
2356 .maxbps = SUPPORTED_MAXBPS,
2357 .formats = SUPPORTED_FORMATS,
2358 .ops = {
2359 .open = simple_playback_pcm_open,
2360 .close = nvhdmi_8ch_7x_pcm_close,
2361 .prepare = nvhdmi_8ch_7x_pcm_prepare
2362 },
2363};
2364
2365static int patch_nvhdmi_2ch(struct hda_codec *codec)
2366{
2367 struct hdmi_spec *spec;
2368 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2369 nvhdmi_master_pin_nid_7x);
2370 if (err < 0)
2371 return err;
2372
2373 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2374
2375 spec = codec->spec;
2376 spec->pcm_playback.rates = SUPPORTED_RATES;
2377 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2378 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2379 return 0;
2380}
2381
2382static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2383{
2384 struct hdmi_spec *spec = codec->spec;
2385 int err = simple_playback_build_pcms(codec);
2386 if (!err) {
2387 struct hda_pcm *info = get_pcm_rec(spec, 0);
2388 info->own_chmap = true;
2389 }
2390 return err;
2391}
2392
2393static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2394{
2395 struct hdmi_spec *spec = codec->spec;
2396 struct hda_pcm *info;
2397 struct snd_pcm_chmap *chmap;
2398 int err;
2399
2400 err = simple_playback_build_controls(codec);
2401 if (err < 0)
2402 return err;
2403
2404
2405 info = get_pcm_rec(spec, 0);
2406 err = snd_pcm_add_chmap_ctls(info->pcm,
2407 SNDRV_PCM_STREAM_PLAYBACK,
2408 snd_pcm_alt_chmaps, 8, 0, &chmap);
2409 if (err < 0)
2410 return err;
2411 switch (codec->preset->id) {
2412 case 0x10de0002:
2413 case 0x10de0003:
2414 case 0x10de0005:
2415 case 0x10de0006:
2416 chmap->channel_mask = (1U << 2) | (1U << 8);
2417 break;
2418 case 0x10de0007:
2419 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2420 }
2421 return 0;
2422}
2423
2424static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2425{
2426 struct hdmi_spec *spec;
2427 int err = patch_nvhdmi_2ch(codec);
2428 if (err < 0)
2429 return err;
2430 spec = codec->spec;
2431 spec->multiout.max_channels = 8;
2432 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2433 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2434 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2435 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2436
2437
2438
2439 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2440
2441 return 0;
2442}
2443
2444
2445
2446
2447
2448
2449
2450
2451#define ATIHDMI_CVT_NID 0x02
2452#define ATIHDMI_PIN_NID 0x03
2453
2454static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2455 struct hda_codec *codec,
2456 unsigned int stream_tag,
2457 unsigned int format,
2458 struct snd_pcm_substream *substream)
2459{
2460 struct hdmi_spec *spec = codec->spec;
2461 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2462 int chans = substream->runtime->channels;
2463 int i, err;
2464
2465 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2466 substream);
2467 if (err < 0)
2468 return err;
2469 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2470 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2471
2472 for (i = 0; i < chans; i++) {
2473 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2474 AC_VERB_SET_HDMI_CHAN_SLOT,
2475 (i << 4) | i);
2476 }
2477 return 0;
2478}
2479
2480static int patch_atihdmi(struct hda_codec *codec)
2481{
2482 struct hdmi_spec *spec;
2483 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2484 if (err < 0)
2485 return err;
2486 spec = codec->spec;
2487 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2488 return 0;
2489}
2490
2491
2492#define VIAHDMI_CVT_NID 0x02
2493#define VIAHDMI_PIN_NID 0x03
2494
2495static int patch_via_hdmi(struct hda_codec *codec)
2496{
2497 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2498}
2499
2500
2501
2502
2503static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2504{ .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2505{ .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2506{ .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2507{ .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2508{ .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2509{ .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2510{ .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2511{ .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2512{ .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2513{ .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2514{ .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2515{ .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2516{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2517{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2518{ .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2519{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2520{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2521{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2522{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2523{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2524{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2525{ .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2526{ .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2527
2528{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2529{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2530{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2531{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2532{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2533{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2534{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2535{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2536{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2537{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2538{ .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2539{ .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2540{ .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2541{ .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2542{ .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2543{ .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2544{ .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2545{ .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2546{ .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2547{ .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2548{ .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2549{ .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2550{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2551{ .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2552{ .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2553{ .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2554{ .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2555{}
2556};
2557
2558MODULE_ALIAS("snd-hda-codec-id:1002793c");
2559MODULE_ALIAS("snd-hda-codec-id:10027919");
2560MODULE_ALIAS("snd-hda-codec-id:1002791a");
2561MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2562MODULE_ALIAS("snd-hda-codec-id:10951390");
2563MODULE_ALIAS("snd-hda-codec-id:10951392");
2564MODULE_ALIAS("snd-hda-codec-id:10de0002");
2565MODULE_ALIAS("snd-hda-codec-id:10de0003");
2566MODULE_ALIAS("snd-hda-codec-id:10de0005");
2567MODULE_ALIAS("snd-hda-codec-id:10de0006");
2568MODULE_ALIAS("snd-hda-codec-id:10de0007");
2569MODULE_ALIAS("snd-hda-codec-id:10de000a");
2570MODULE_ALIAS("snd-hda-codec-id:10de000b");
2571MODULE_ALIAS("snd-hda-codec-id:10de000c");
2572MODULE_ALIAS("snd-hda-codec-id:10de000d");
2573MODULE_ALIAS("snd-hda-codec-id:10de0010");
2574MODULE_ALIAS("snd-hda-codec-id:10de0011");
2575MODULE_ALIAS("snd-hda-codec-id:10de0012");
2576MODULE_ALIAS("snd-hda-codec-id:10de0013");
2577MODULE_ALIAS("snd-hda-codec-id:10de0014");
2578MODULE_ALIAS("snd-hda-codec-id:10de0015");
2579MODULE_ALIAS("snd-hda-codec-id:10de0016");
2580MODULE_ALIAS("snd-hda-codec-id:10de0018");
2581MODULE_ALIAS("snd-hda-codec-id:10de0019");
2582MODULE_ALIAS("snd-hda-codec-id:10de001a");
2583MODULE_ALIAS("snd-hda-codec-id:10de001b");
2584MODULE_ALIAS("snd-hda-codec-id:10de001c");
2585MODULE_ALIAS("snd-hda-codec-id:10de0040");
2586MODULE_ALIAS("snd-hda-codec-id:10de0041");
2587MODULE_ALIAS("snd-hda-codec-id:10de0042");
2588MODULE_ALIAS("snd-hda-codec-id:10de0043");
2589MODULE_ALIAS("snd-hda-codec-id:10de0044");
2590MODULE_ALIAS("snd-hda-codec-id:10de0051");
2591MODULE_ALIAS("snd-hda-codec-id:10de0067");
2592MODULE_ALIAS("snd-hda-codec-id:10de8001");
2593MODULE_ALIAS("snd-hda-codec-id:11069f80");
2594MODULE_ALIAS("snd-hda-codec-id:11069f81");
2595MODULE_ALIAS("snd-hda-codec-id:11069f84");
2596MODULE_ALIAS("snd-hda-codec-id:11069f85");
2597MODULE_ALIAS("snd-hda-codec-id:17e80047");
2598MODULE_ALIAS("snd-hda-codec-id:80860054");
2599MODULE_ALIAS("snd-hda-codec-id:80862801");
2600MODULE_ALIAS("snd-hda-codec-id:80862802");
2601MODULE_ALIAS("snd-hda-codec-id:80862803");
2602MODULE_ALIAS("snd-hda-codec-id:80862804");
2603MODULE_ALIAS("snd-hda-codec-id:80862805");
2604MODULE_ALIAS("snd-hda-codec-id:80862806");
2605MODULE_ALIAS("snd-hda-codec-id:80862807");
2606MODULE_ALIAS("snd-hda-codec-id:80862880");
2607MODULE_ALIAS("snd-hda-codec-id:808629fb");
2608
2609MODULE_LICENSE("GPL");
2610MODULE_DESCRIPTION("HDMI HD-audio codec");
2611MODULE_ALIAS("snd-hda-codec-intelhdmi");
2612MODULE_ALIAS("snd-hda-codec-nvhdmi");
2613MODULE_ALIAS("snd-hda-codec-atihdmi");
2614
2615static struct hda_codec_preset_list intel_list = {
2616 .preset = snd_hda_preset_hdmi,
2617 .owner = THIS_MODULE,
2618};
2619
2620static int __init patch_hdmi_init(void)
2621{
2622 return snd_hda_add_codec_preset(&intel_list);
2623}
2624
2625static void __exit patch_hdmi_exit(void)
2626{
2627 snd_hda_delete_codec_preset(&intel_list);
2628}
2629
2630module_init(patch_hdmi_init)
2631module_exit(patch_hdmi_exit)
2632