LXR linux/arch/arc/include/asm/cache.h

   1/*
   2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 */
   8
   9#ifndef __ARC_ASM_CACHE_H
  10#define __ARC_ASM_CACHE_H
  11
  12/* In case $$ not config, setup a dummy number for rest of kernel */
  13#ifndef CONFIG_ARC_CACHE_LINE_SHIFT
  14#define L1_CACHE_SHIFT          6
  15#else
  16#define L1_CACHE_SHIFT          CONFIG_ARC_CACHE_LINE_SHIFT
  17#endif
  18
  19#define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
  20
  21/* For a rare case where customers have differently config I/D */
  22#define ARC_ICACHE_LINE_LEN     L1_CACHE_BYTES
  23#define ARC_DCACHE_LINE_LEN     L1_CACHE_BYTES
  24
  25#define ICACHE_LINE_MASK        (~(ARC_ICACHE_LINE_LEN - 1))
  26#define DCACHE_LINE_MASK        (~(ARC_DCACHE_LINE_LEN - 1))
  27
  28/*
  29 * ARC700 doesn't cache any access in top 256M.
  30 * Ideal for wiring memory mapped peripherals as we don't need to do
  31 * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
  32 */
  33#define ARC_UNCACHED_ADDR_SPACE 0xc0000000
  34
  35#ifndef __ASSEMBLY__
  36
  37/* Uncached access macros */
  38#define arc_read_uncached_32(ptr)       \
  39({                                      \
  40        unsigned int __ret;             \
  41        __asm__ __volatile__(           \
  42        "       ld.di %0, [%1]  \n"     \
  43        : "=r"(__ret)                   \
  44        : "r"(ptr));                    \
  45        __ret;                          \
  46})
  47
  48#define arc_write_uncached_32(ptr, data)\
  49({                                      \
  50        __asm__ __volatile__(           \
  51        "       st.di %0, [%1]  \n"     \
  52        :                               \
  53        : "r"(data), "r"(ptr));         \
  54})
  55
  56#define ARCH_DMA_MINALIGN      L1_CACHE_BYTES
  57
  58extern void arc_cache_init(void);
  59extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
  60extern void __init read_decode_cache_bcr(void);
  61
  62#endif  /* !__ASSEMBLY__ */
  63
  64#endif /* _ASM_CACHE_H */
  65