LXR linux/arch/arm/include/uapi/asm/ptrace.h

   1/*
   2 *  arch/arm/include/asm/ptrace.h
   3 *
   4 *  Copyright (C) 1996-2003 Russell King
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 */
  10#ifndef _UAPI__ASM_ARM_PTRACE_H
  11#define _UAPI__ASM_ARM_PTRACE_H
  12
  13#include <asm/hwcap.h>
  14
  15#define PTRACE_GETREGS          12
  16#define PTRACE_SETREGS          13
  17#define PTRACE_GETFPREGS        14
  18#define PTRACE_SETFPREGS        15
  19/* PTRACE_ATTACH is 16 */
  20/* PTRACE_DETACH is 17 */
  21#define PTRACE_GETWMMXREGS      18
  22#define PTRACE_SETWMMXREGS      19
  23/* 20 is unused */
  24#define PTRACE_OLDSETOPTIONS    21
  25#define PTRACE_GET_THREAD_AREA  22
  26#define PTRACE_SET_SYSCALL      23
  27/* PTRACE_SYSCALL is 24 */
  28#define PTRACE_GETCRUNCHREGS    25
  29#define PTRACE_SETCRUNCHREGS    26
  30#define PTRACE_GETVFPREGS       27
  31#define PTRACE_SETVFPREGS       28
  32#define PTRACE_GETHBPREGS       29
  33#define PTRACE_SETHBPREGS       30
  34
  35/*
  36 * PSR bits
  37 * Note on V7M there is no mode contained in the PSR
  38 */
  39#define USR26_MODE      0x00000000
  40#define FIQ26_MODE      0x00000001
  41#define IRQ26_MODE      0x00000002
  42#define SVC26_MODE      0x00000003
  43#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
  44/*
  45 * Use 0 here to get code right that creates a userspace
  46 * or kernel space thread.
  47 */
  48#define USR_MODE        0x00000000
  49#define SVC_MODE        0x00000000
  50#else
  51#define USR_MODE        0x00000010
  52#define SVC_MODE        0x00000013
  53#endif
  54#define FIQ_MODE        0x00000011
  55#define IRQ_MODE        0x00000012
  56#define ABT_MODE        0x00000017
  57#define HYP_MODE        0x0000001a
  58#define UND_MODE        0x0000001b
  59#define SYSTEM_MODE     0x0000001f
  60#define MODE32_BIT      0x00000010
  61#define MODE_MASK       0x0000001f
  62
  63#define V4_PSR_T_BIT    0x00000020      /* >= V4T, but not V7M */
  64#define V7M_PSR_T_BIT   0x01000000
  65#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
  66#define PSR_T_BIT       V7M_PSR_T_BIT
  67#else
  68/* for compatibility */
  69#define PSR_T_BIT       V4_PSR_T_BIT
  70#endif
  71
  72#define PSR_F_BIT       0x00000040      /* >= V4, but not V7M */
  73#define PSR_I_BIT       0x00000080      /* >= V4, but not V7M */
  74#define PSR_A_BIT       0x00000100      /* >= V6, but not V7M */
  75#define PSR_E_BIT       0x00000200      /* >= V6, but not V7M */
  76#define PSR_J_BIT       0x01000000      /* >= V5J, but not V7M */
  77#define PSR_Q_BIT       0x08000000      /* >= V5E, including V7M */
  78#define PSR_V_BIT       0x10000000
  79#define PSR_C_BIT       0x20000000
  80#define PSR_Z_BIT       0x40000000
  81#define PSR_N_BIT       0x80000000
  82
  83/*
  84 * Groups of PSR bits
  85 */
  86#define PSR_f           0xff000000      /* Flags                */
  87#define PSR_s           0x00ff0000      /* Status               */
  88#define PSR_x           0x0000ff00      /* Extension            */
  89#define PSR_c           0x000000ff      /* Control              */
  90
  91/*
  92 * ARMv7 groups of PSR bits
  93 */
  94#define APSR_MASK       0xf80f0000      /* N, Z, C, V, Q and GE flags */
  95#define PSR_ISET_MASK   0x01000010      /* ISA state (J, T) mask */
  96#define PSR_IT_MASK     0x0600fc00      /* If-Then execution state mask */
  97#define PSR_ENDIAN_MASK 0x00000200      /* Endianness state mask */
  98
  99/*
 100 * Default endianness state
 101 */
 102#ifdef CONFIG_CPU_ENDIAN_BE8
 103#define PSR_ENDSTATE    PSR_E_BIT
 104#else
 105#define PSR_ENDSTATE    0
 106#endif
 107
 108/* 
 109 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
 110 * process is located in memory.
 111 */
 112#define PT_TEXT_ADDR            0x10000
 113#define PT_DATA_ADDR            0x10004
 114#define PT_TEXT_END_ADDR        0x10008
 115
 116#ifndef __ASSEMBLY__
 117
 118/*
 119 * This struct defines the way the registers are stored on the
 120 * stack during a system call.  Note that sizeof(struct pt_regs)
 121 * has to be a multiple of 8.
 122 */
 123#ifndef __KERNEL__
 124struct pt_regs {
 125        long uregs[18];
 126};
 127#endif /* __KERNEL__ */
 128
 129#define ARM_cpsr        uregs[16]
 130#define ARM_pc          uregs[15]
 131#define ARM_lr          uregs[14]
 132#define ARM_sp          uregs[13]
 133#define ARM_ip          uregs[12]
 134#define ARM_fp          uregs[11]
 135#define ARM_r10         uregs[10]
 136#define ARM_r9          uregs[9]
 137#define ARM_r8          uregs[8]
 138#define ARM_r7          uregs[7]
 139#define ARM_r6          uregs[6]
 140#define ARM_r5          uregs[5]
 141#define ARM_r4          uregs[4]
 142#define ARM_r3          uregs[3]
 143#define ARM_r2          uregs[2]
 144#define ARM_r1          uregs[1]
 145#define ARM_r0          uregs[0]
 146#define ARM_ORIG_r0     uregs[17]
 147
 148/*
 149 * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
 150 * and core dumps.
 151 */
 152#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
 153
 154
 155#endif /* __ASSEMBLY__ */
 156
 157#endif /* _UAPI__ASM_ARM_PTRACE_H */
 158