1/* 2 * arch/arm/mach-clps711x/include/mach/hardware.h 3 * 4 * This file contains the hardware definitions of the Prospector P720T. 5 * 6 * Copyright (C) 2000 Deep Blue Solutions Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22#ifndef __MACH_HARDWARE_H 23#define __MACH_HARDWARE_H 24 25#include <mach/clps711x.h> 26 27#define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \ 28 (((x) >> 2) & 0x3c000000))) 29 30#define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE)) 31 32#ifndef __ASSEMBLY__ 33#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) 34#define clps_readw(off) readw(CLPS711X_VIRT_BASE + (off)) 35#define clps_readl(off) readl(CLPS711X_VIRT_BASE + (off)) 36#define clps_writeb(val,off) writeb(val, CLPS711X_VIRT_BASE + (off)) 37#define clps_writew(val,off) writew(val, CLPS711X_VIRT_BASE + (off)) 38#define clps_writel(val,off) writel(val, CLPS711X_VIRT_BASE + (off)) 39#endif 40 41/* 42 * The physical addresses that the external chip select signals map to is 43 * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212 44 * processors. CONFIG_EP72XX_BOOT_ROM is only available if these 45 * processors are in use. 46 */ 47#ifndef CONFIG_EP72XX_ROM_BOOT 48#define CS0_PHYS_BASE (0x00000000) 49#define CS1_PHYS_BASE (0x10000000) 50#define CS2_PHYS_BASE (0x20000000) 51#define CS3_PHYS_BASE (0x30000000) 52#define CS4_PHYS_BASE (0x40000000) 53#define CS5_PHYS_BASE (0x50000000) 54#define CS6_PHYS_BASE (0x60000000) 55#define CS7_PHYS_BASE (0x70000000) 56#else 57#define CS0_PHYS_BASE (0x70000000) 58#define CS1_PHYS_BASE (0x60000000) 59#define CS2_PHYS_BASE (0x50000000) 60#define CS3_PHYS_BASE (0x40000000) 61#define CS4_PHYS_BASE (0x30000000) 62#define CS5_PHYS_BASE (0x20000000) 63#define CS6_PHYS_BASE (0x10000000) 64#define CS7_PHYS_BASE (0x00000000) 65#endif 66 67#define CLPS711X_SRAM_BASE CS6_PHYS_BASE 68#define CLPS711X_SRAM_SIZE (48 * 1024) 69 70#define CLPS711X_SDRAM0_BASE (0xc0000000) 71#define CLPS711X_SDRAM1_BASE (0xd0000000) 72 73#endif 74