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24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/platform_device.h>
27#include <linux/mtd/physmap.h>
28#include <linux/i2c.h>
29#include <linux/i2c/pca953x.h>
30#include <linux/input.h>
31#include <linux/gpio.h>
32#include <linux/delay.h>
33#include <linux/dma-mapping.h>
34#include <linux/leds.h>
35#include <linux/platform_data/asoc-mx27vis.h>
36#include <media/soc_camera.h>
37#include <sound/tlv320aic32x4.h>
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/time.h>
41#include <asm/system_info.h>
42#include <asm/memblock.h>
43
44#include "common.h"
45#include "devices-imx27.h"
46#include "hardware.h"
47#include "iomux-mx27.h"
48
49#define TVP5150_RSTN (GPIO_PORTC + 18)
50#define TVP5150_PWDN (GPIO_PORTC + 19)
51#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
52#define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
53
54#define VERSION_MASK 0x7
55#define MOTHERBOARD_SHIFT 4
56#define EXPBOARD_SHIFT 0
57
58#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
59#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
60#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
61
62#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
63#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
64#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
65
66#define AMP_GAIN_0 (GPIO_PORTF + 9)
67#define AMP_GAIN_1 (GPIO_PORTF + 8)
68#define AMP_MUTE_SDL (GPIO_PORTE + 5)
69#define AMP_MUTE_SDR (GPIO_PORTF + 7)
70
71static const int visstrim_m10_pins[] __initconst = {
72
73 PE12_PF_UART1_TXD,
74 PE13_PF_UART1_RXD,
75 PE14_PF_UART1_CTS,
76 PE15_PF_UART1_RTS,
77
78 PD0_AIN_FEC_TXD0,
79 PD1_AIN_FEC_TXD1,
80 PD2_AIN_FEC_TXD2,
81 PD3_AIN_FEC_TXD3,
82 PD4_AOUT_FEC_RX_ER,
83 PD5_AOUT_FEC_RXD1,
84 PD6_AOUT_FEC_RXD2,
85 PD7_AOUT_FEC_RXD3,
86 PD8_AF_FEC_MDIO,
87 PD9_AIN_FEC_MDC,
88 PD10_AOUT_FEC_CRS,
89 PD11_AOUT_FEC_TX_CLK,
90 PD12_AOUT_FEC_RXD0,
91 PD13_AOUT_FEC_RX_DV,
92 PD14_AOUT_FEC_RX_CLK,
93 PD15_AOUT_FEC_COL,
94 PD16_AIN_FEC_TX_ER,
95 PF23_AIN_FEC_TX_EN,
96
97 PC20_PF_SSI1_FS,
98 PC21_PF_SSI1_RXD,
99 PC22_PF_SSI1_TXD,
100 PC23_PF_SSI1_CLK,
101
102 PE18_PF_SD1_D0,
103 PE19_PF_SD1_D1,
104 PE20_PF_SD1_D2,
105 PE21_PF_SD1_D3,
106 PE22_PF_SD1_CMD,
107 PE23_PF_SD1_CLK,
108
109 PD17_PF_I2C_DATA,
110 PD18_PF_I2C_CLK,
111 PC5_PF_I2C2_SDA,
112 PC6_PF_I2C2_SCL,
113
114 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
115 PC9_PF_USBOTG_DATA0,
116 PC11_PF_USBOTG_DATA1,
117 PC10_PF_USBOTG_DATA2,
118 PC13_PF_USBOTG_DATA3,
119 PC12_PF_USBOTG_DATA4,
120 PC7_PF_USBOTG_DATA5,
121 PC8_PF_USBOTG_DATA6,
122 PE25_PF_USBOTG_DATA7,
123 PE24_PF_USBOTG_CLK,
124 PE2_PF_USBOTG_DIR,
125 PE0_PF_USBOTG_NXT,
126 PE1_PF_USBOTG_STP,
127 PB23_PF_USB_PWR,
128 PB24_PF_USB_OC,
129
130 TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
131 TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
132 PB10_PF_CSI_D0,
133 PB11_PF_CSI_D1,
134 PB12_PF_CSI_D2,
135 PB13_PF_CSI_D3,
136 PB14_PF_CSI_D4,
137 PB15_PF_CSI_MCLK,
138 PB16_PF_CSI_PIXCLK,
139 PB17_PF_CSI_D5,
140 PB18_PF_CSI_D6,
141 PB19_PF_CSI_D7,
142 PB20_PF_CSI_VSYNC,
143 PB21_PF_CSI_HSYNC,
144
145 MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
146 MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
147 MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
148
149 EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
150 EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
151 EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
152
153 AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT,
154 AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT,
155 AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT,
156 AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT,
157};
158
159static struct gpio visstrim_m10_version_gpios[] = {
160 { EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
161 { EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
162 { EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
163 { MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
164 { MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
165 { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
166};
167
168static const struct gpio visstrim_m10_gpios[] __initconst = {
169 {
170 .gpio = TVP5150_RSTN,
171 .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
172 .label = "tvp5150_rstn",
173 },
174 {
175 .gpio = TVP5150_PWDN,
176 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
177 .label = "tvp5150_pwdn",
178 },
179 {
180 .gpio = OTG_PHY_CS_GPIO,
181 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
182 .label = "usbotg_cs",
183 },
184 {
185 .gpio = AMP_GAIN_0,
186 .flags = GPIOF_DIR_OUT,
187 .label = "amp-gain-0",
188 },
189 {
190 .gpio = AMP_GAIN_1,
191 .flags = GPIOF_DIR_OUT,
192 .label = "amp-gain-1",
193 },
194 {
195 .gpio = AMP_MUTE_SDL,
196 .flags = GPIOF_DIR_OUT,
197 .label = "amp-mute-sdl",
198 },
199 {
200 .gpio = AMP_MUTE_SDR,
201 .flags = GPIOF_DIR_OUT,
202 .label = "amp-mute-sdr",
203 },
204};
205
206
207static int visstrim_camera_power(struct device *dev, int on)
208{
209 gpio_set_value(TVP5150_PWDN, on);
210
211 return 0;
212};
213
214static int visstrim_camera_reset(struct device *dev)
215{
216 gpio_set_value(TVP5150_RSTN, 0);
217 ndelay(500);
218 gpio_set_value(TVP5150_RSTN, 1);
219
220 return 0;
221};
222
223static struct i2c_board_info visstrim_i2c_camera = {
224 I2C_BOARD_INFO("tvp5150", 0x5d),
225};
226
227static struct soc_camera_link iclink_tvp5150 = {
228 .bus_id = 0,
229 .board_info = &visstrim_i2c_camera,
230 .i2c_adapter_id = 0,
231 .power = visstrim_camera_power,
232 .reset = visstrim_camera_reset,
233};
234
235static struct mx2_camera_platform_data visstrim_camera = {
236 .flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
237 MX2_CAMERA_PCLK_SAMPLE_RISING,
238 .clk = 100000,
239};
240
241static phys_addr_t mx2_camera_base __initdata;
242#define MX2_CAMERA_BUF_SIZE SZ_8M
243
244static void __init visstrim_analog_camera_init(void)
245{
246 struct platform_device *pdev;
247 int dma;
248
249 gpio_set_value(TVP5150_PWDN, 1);
250 ndelay(1);
251 gpio_set_value(TVP5150_RSTN, 0);
252 ndelay(500);
253 gpio_set_value(TVP5150_RSTN, 1);
254 ndelay(200000);
255
256 pdev = imx27_add_mx2_camera(&visstrim_camera);
257 if (IS_ERR(pdev))
258 return;
259
260 dma = dma_declare_coherent_memory(&pdev->dev,
261 mx2_camera_base, mx2_camera_base,
262 MX2_CAMERA_BUF_SIZE,
263 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
264 if (!(dma & DMA_MEMORY_MAP))
265 return;
266}
267
268static void __init visstrim_reserve(void)
269{
270
271 mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE,
272 MX2_CAMERA_BUF_SIZE);
273}
274
275
276static struct gpio_keys_button visstrim_gpio_keys[] = {
277 {
278 .type = EV_KEY,
279 .code = KEY_RESTART,
280 .gpio = (GPIO_PORTC + 15),
281 .desc = "Default config",
282 .active_low = 0,
283 .wakeup = 1,
284 },
285 {
286 .type = EV_KEY,
287 .code = KEY_RECORD,
288 .gpio = (GPIO_PORTF + 14),
289 .desc = "Record",
290 .active_low = 0,
291 .wakeup = 1,
292 },
293 {
294 .type = EV_KEY,
295 .code = KEY_STOP,
296 .gpio = (GPIO_PORTF + 13),
297 .desc = "Stop",
298 .active_low = 0,
299 .wakeup = 1,
300 }
301};
302
303static const struct gpio_keys_platform_data
304 visstrim_gpio_keys_platform_data __initconst = {
305 .buttons = visstrim_gpio_keys,
306 .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
307};
308
309
310static const struct gpio_led visstrim_m10_leds[] __initconst = {
311 {
312 .name = "visstrim:ld0",
313 .default_trigger = "nand-disk",
314 .gpio = (GPIO_PORTC + 29),
315 },
316 {
317 .name = "visstrim:ld1",
318 .default_trigger = "nand-disk",
319 .gpio = (GPIO_PORTC + 24),
320 },
321 {
322 .name = "visstrim:ld2",
323 .default_trigger = "nand-disk",
324 .gpio = (GPIO_PORTC + 28),
325 },
326 {
327 .name = "visstrim:ld3",
328 .default_trigger = "nand-disk",
329 .gpio = (GPIO_PORTC + 25),
330 },
331};
332
333static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
334 .leds = visstrim_m10_leds,
335 .num_leds = ARRAY_SIZE(visstrim_m10_leds),
336};
337
338
339static int visstrim_m10_sdhc1_init(struct device *dev,
340 irq_handler_t detect_irq, void *data)
341{
342 int ret;
343
344 ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
345 IRQF_TRIGGER_FALLING, "mmc-detect", data);
346 return ret;
347}
348
349static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
350{
351 free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
352}
353
354static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
355 .init = visstrim_m10_sdhc1_init,
356 .exit = visstrim_m10_sdhc1_exit,
357};
358
359
360static struct physmap_flash_data visstrim_m10_flash_data = {
361 .width = 2,
362};
363
364static struct resource visstrim_m10_flash_resource = {
365 .start = 0xc0000000,
366 .end = 0xc0000000 + SZ_64M - 1,
367 .flags = IORESOURCE_MEM,
368};
369
370static struct platform_device visstrim_m10_nor_mtd_device = {
371 .name = "physmap-flash",
372 .id = 0,
373 .dev = {
374 .platform_data = &visstrim_m10_flash_data,
375 },
376 .num_resources = 1,
377 .resource = &visstrim_m10_flash_resource,
378};
379
380static struct platform_device *platform_devices[] __initdata = {
381 &visstrim_m10_nor_mtd_device,
382};
383
384
385static const struct imxuart_platform_data uart_pdata __initconst = {
386 .flags = IMXUART_HAVE_RTSCTS,
387};
388
389
390static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
391 .bitrate = 100000,
392};
393
394static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
395 .gpio_base = 240,
396 .invert = 0,
397};
398
399static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
400 .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
401 AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
402 AIC32X4_PWR_AIC32X4_LDO_ENABLE |
403 AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
404 AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
405 .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
406 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
407 .swapdacs = false,
408};
409
410static struct i2c_board_info visstrim_m10_i2c_devices[] = {
411 {
412 I2C_BOARD_INFO("pca9555", 0x20),
413 .platform_data = &visstrim_m10_pca9555_pdata,
414 },
415 {
416 I2C_BOARD_INFO("tlv320aic32x4", 0x18),
417 .platform_data = &visstrim_m10_aic32x4_pdata,
418 },
419 {
420 I2C_BOARD_INFO("m41t00", 0x68),
421 }
422};
423
424
425static int otg_phy_init(struct platform_device *pdev)
426{
427 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
428}
429
430static const struct mxc_usbh_platform_data
431visstrim_m10_usbotg_pdata __initconst = {
432 .init = otg_phy_init,
433 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
434};
435
436
437static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
438 .flags = IMX_SSI_DMA | IMX_SSI_SYN,
439};
440
441
442
443static void __init visstrim_coda_init(void)
444{
445 struct platform_device *pdev;
446 int dma;
447
448 pdev = imx27_add_coda();
449 dma = dma_declare_coherent_memory(&pdev->dev,
450 mx2_camera_base + MX2_CAMERA_BUF_SIZE,
451 mx2_camera_base + MX2_CAMERA_BUF_SIZE,
452 MX2_CAMERA_BUF_SIZE,
453 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
454 if (!(dma & DMA_MEMORY_MAP))
455 return;
456}
457
458
459static struct platform_device visstrim_deinterlace = {
460 .name = "m2m-deinterlace",
461 .id = 0,
462};
463
464static void __init visstrim_deinterlace_init(void)
465{
466 int ret = -ENOMEM;
467 struct platform_device *pdev = &visstrim_deinterlace;
468 int dma;
469
470 ret = platform_device_register(pdev);
471
472 dma = dma_declare_coherent_memory(&pdev->dev,
473 mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
474 mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
475 MX2_CAMERA_BUF_SIZE,
476 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
477 if (!(dma & DMA_MEMORY_MAP))
478 return;
479}
480
481
482static void __init visstrim_emmaprp_init(void)
483{
484 struct platform_device *pdev;
485 int dma;
486
487 pdev = imx27_add_mx2_emmaprp();
488 if (IS_ERR(pdev))
489 return;
490
491
492
493
494
495 dma = dma_declare_coherent_memory(&pdev->dev,
496 mx2_camera_base, mx2_camera_base,
497 MX2_CAMERA_BUF_SIZE,
498 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
499 if (!(dma & DMA_MEMORY_MAP))
500 pr_err("Failed to declare memory for emmaprp\n");
501}
502
503
504static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = {
505 .amp_gain0_gpio = AMP_GAIN_0,
506 .amp_gain1_gpio = AMP_GAIN_1,
507 .amp_mutel_gpio = AMP_MUTE_SDL,
508 .amp_muter_gpio = AMP_MUTE_SDR,
509};
510
511static void __init visstrim_m10_revision(void)
512{
513 int exp_version = 0;
514 int mo_version = 0;
515 int ret;
516
517 ret = gpio_request_array(visstrim_m10_version_gpios,
518 ARRAY_SIZE(visstrim_m10_version_gpios));
519 if (ret) {
520 pr_err("Failed to request version gpios");
521 return;
522 }
523
524
525 exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
526 exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
527 exp_version |= !gpio_get_value(EXPBOARD_BIT0);
528
529
530 mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
531 mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
532 mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
533
534 system_rev = 0x27000;
535 system_rev |= (mo_version << MOTHERBOARD_SHIFT);
536 system_rev |= (exp_version << EXPBOARD_SHIFT);
537}
538
539static void __init visstrim_m10_board_init(void)
540{
541 int ret;
542 int mo_version;
543
544 imx27_soc_init();
545 visstrim_m10_revision();
546
547 ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
548 ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
549 if (ret)
550 pr_err("Failed to setup pins (%d)\n", ret);
551
552 ret = gpio_request_array(visstrim_m10_gpios,
553 ARRAY_SIZE(visstrim_m10_gpios));
554 if (ret)
555 pr_err("Failed to request gpios (%d)\n", ret);
556
557 imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
558 imx27_add_imx_uart0(&uart_pdata);
559
560 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
561 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
562 i2c_register_board_info(0, visstrim_m10_i2c_devices,
563 ARRAY_SIZE(visstrim_m10_i2c_devices));
564
565 imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
566 imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
567 imx27_add_fec(NULL);
568 imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
569 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
570 imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata,
571 sizeof(snd_mx27vis_pdata));
572 platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
573 &iclink_tvp5150, sizeof(iclink_tvp5150));
574 gpio_led_register_device(0, &visstrim_m10_led_data);
575
576
577 mo_version = (system_rev >> MOTHERBOARD_SHIFT) & VERSION_MASK;
578 if (mo_version & 0x1) {
579 visstrim_emmaprp_init();
580
581
582
583
584
585
586 gpio_set_value(TVP5150_PWDN, 1);
587 ndelay(1);
588 gpio_set_value(TVP5150_RSTN, 0);
589 } else {
590 visstrim_deinterlace_init();
591 visstrim_analog_camera_init();
592 }
593 visstrim_coda_init();
594}
595
596static void __init visstrim_m10_timer_init(void)
597{
598 mx27_clocks_init((unsigned long)25000000);
599}
600
601MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
602 .atag_offset = 0x100,
603 .reserve = visstrim_reserve,
604 .map_io = mx27_map_io,
605 .init_early = imx27_init_early,
606 .init_irq = mx27_init_irq,
607 .handle_irq = imx27_handle_irq,
608 .init_time = visstrim_m10_timer_init,
609 .init_machine = visstrim_m10_board_init,
610 .restart = mxc_restart,
611MACHINE_END
612
