linux/arch/arm/mach-sa1100/assabet.c
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   1/*
   2 * linux/arch/arm/mach-sa1100/assabet.c
   3 *
   4 * Author: Nicolas Pitre
   5 *
   6 * This file contains all Assabet-specific tweaks.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12#include <linux/init.h>
  13#include <linux/kernel.h>
  14#include <linux/module.h>
  15#include <linux/errno.h>
  16#include <linux/ioport.h>
  17#include <linux/platform_data/sa11x0-serial.h>
  18#include <linux/serial_core.h>
  19#include <linux/platform_device.h>
  20#include <linux/mfd/ucb1x00.h>
  21#include <linux/mtd/mtd.h>
  22#include <linux/mtd/partitions.h>
  23#include <linux/delay.h>
  24#include <linux/mm.h>
  25#include <linux/leds.h>
  26#include <linux/slab.h>
  27
  28#include <video/sa1100fb.h>
  29
  30#include <mach/hardware.h>
  31#include <asm/mach-types.h>
  32#include <asm/setup.h>
  33#include <asm/page.h>
  34#include <asm/pgtable-hwdef.h>
  35#include <asm/pgtable.h>
  36#include <asm/tlbflush.h>
  37
  38#include <asm/mach/arch.h>
  39#include <asm/mach/flash.h>
  40#include <asm/mach/irda.h>
  41#include <asm/mach/map.h>
  42#include <mach/assabet.h>
  43#include <linux/platform_data/mfd-mcp-sa11x0.h>
  44#include <mach/irqs.h>
  45
  46#include "generic.h"
  47
  48#define ASSABET_BCR_DB1110 \
  49        (ASSABET_BCR_SPK_OFF    | \
  50         ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  51         ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  52         ASSABET_BCR_IRDA_MD0)
  53
  54#define ASSABET_BCR_DB1111 \
  55        (ASSABET_BCR_SPK_OFF    | \
  56         ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  57         ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  58         ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  59         ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
  60
  61unsigned long SCR_value = ASSABET_SCR_INIT;
  62EXPORT_SYMBOL(SCR_value);
  63
  64static unsigned long BCR_value = ASSABET_BCR_DB1110;
  65
  66void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  67{
  68        unsigned long flags;
  69
  70        local_irq_save(flags);
  71        BCR_value = (BCR_value & ~mask) | val;
  72        ASSABET_BCR = BCR_value;
  73        local_irq_restore(flags);
  74}
  75
  76EXPORT_SYMBOL(ASSABET_BCR_frob);
  77
  78static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
  79{
  80        if (state == UCB_RST_PROBE)
  81                ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
  82}
  83
  84
  85/*
  86 * Assabet flash support code.
  87 */
  88
  89#ifdef ASSABET_REV_4
  90/*
  91 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
  92 */
  93static struct mtd_partition assabet_partitions[] = {
  94        {
  95                .name           = "bootloader",
  96                .size           = 0x00020000,
  97                .offset         = 0,
  98                .mask_flags     = MTD_WRITEABLE,
  99        }, {
 100                .name           = "bootloader params",
 101                .size           = 0x00020000,
 102                .offset         = MTDPART_OFS_APPEND,
 103                .mask_flags     = MTD_WRITEABLE,
 104        }, {
 105                .name           = "jffs",
 106                .size           = MTDPART_SIZ_FULL,
 107                .offset         = MTDPART_OFS_APPEND,
 108        }
 109};
 110#else
 111/*
 112 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
 113 */
 114static struct mtd_partition assabet_partitions[] = {
 115        {
 116                .name           = "bootloader",
 117                .size           = 0x00040000,
 118                .offset         = 0,
 119                .mask_flags     = MTD_WRITEABLE,
 120        }, {
 121                .name           = "bootloader params",
 122                .size           = 0x00040000,
 123                .offset         = MTDPART_OFS_APPEND,
 124                .mask_flags     = MTD_WRITEABLE,
 125        }, {
 126                .name           = "jffs",
 127                .size           = MTDPART_SIZ_FULL,
 128                .offset         = MTDPART_OFS_APPEND,
 129        }
 130};
 131#endif
 132
 133static struct flash_platform_data assabet_flash_data = {
 134        .map_name       = "cfi_probe",
 135        .parts          = assabet_partitions,
 136        .nr_parts       = ARRAY_SIZE(assabet_partitions),
 137};
 138
 139static struct resource assabet_flash_resources[] = {
 140        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
 141        DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
 142};
 143
 144
 145/*
 146 * Assabet IrDA support code.
 147 */
 148
 149static int assabet_irda_set_power(struct device *dev, unsigned int state)
 150{
 151        static unsigned int bcr_state[4] = {
 152                ASSABET_BCR_IRDA_MD0,
 153                ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
 154                ASSABET_BCR_IRDA_MD1,
 155                0
 156        };
 157
 158        if (state < 4) {
 159                state = bcr_state[state];
 160                ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
 161                                           ASSABET_BCR_IRDA_MD0));
 162                ASSABET_BCR_set(state);
 163        }
 164        return 0;
 165}
 166
 167static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
 168{
 169        if (speed < 4000000)
 170                ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
 171        else
 172                ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
 173}
 174
 175static struct irda_platform_data assabet_irda_data = {
 176        .set_power      = assabet_irda_set_power,
 177        .set_speed      = assabet_irda_set_speed,
 178};
 179
 180static struct ucb1x00_plat_data assabet_ucb1x00_data = {
 181        .reset          = assabet_ucb1x00_reset,
 182        .gpio_base      = -1,
 183};
 184
 185static struct mcp_plat_data assabet_mcp_data = {
 186        .mccr0          = MCCR0_ADM,
 187        .sclk_rate      = 11981000,
 188        .codec_pdata    = &assabet_ucb1x00_data,
 189};
 190
 191static void assabet_lcd_set_visual(u32 visual)
 192{
 193        u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
 194
 195        if (machine_is_assabet()) {
 196#if 1           // phase 4 or newer Assabet's
 197                if (is_true_color)
 198                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
 199                else
 200                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
 201#else
 202                // older Assabet's
 203                if (is_true_color)
 204                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
 205                else
 206                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
 207#endif
 208        }
 209}
 210
 211#ifndef ASSABET_PAL_VIDEO
 212static void assabet_lcd_backlight_power(int on)
 213{
 214        if (on)
 215                ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
 216        else
 217                ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
 218}
 219
 220/*
 221 * Turn on/off the backlight.  When turning the backlight on, we wait
 222 * 500us after turning it on so we don't cause the supplies to droop
 223 * when we enable the LCD controller (and cause a hard reset.)
 224 */
 225static void assabet_lcd_power(int on)
 226{
 227        if (on) {
 228                ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
 229                udelay(500);
 230        } else
 231                ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 232}
 233
 234/*
 235 * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
 236 * takes an RGB666 signal, but we provide it with an RGB565 signal
 237 * instead (def_rgb_16).
 238 */
 239static struct sa1100fb_mach_info lq039q2ds54_info = {
 240        .pixclock       = 171521,       .bpp            = 16,
 241        .xres           = 320,          .yres           = 240,
 242
 243        .hsync_len      = 5,            .vsync_len      = 1,
 244        .left_margin    = 61,           .upper_margin   = 3,
 245        .right_margin   = 9,            .lower_margin   = 0,
 246
 247        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 248
 249        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
 250        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
 251
 252        .backlight_power = assabet_lcd_backlight_power,
 253        .lcd_power = assabet_lcd_power,
 254        .set_visual = assabet_lcd_set_visual,
 255};
 256#else
 257static void assabet_pal_backlight_power(int on)
 258{
 259        ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
 260}
 261
 262static void assabet_pal_power(int on)
 263{
 264        ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 265}
 266
 267static struct sa1100fb_mach_info pal_info = {
 268        .pixclock       = 67797,        .bpp            = 16,
 269        .xres           = 640,          .yres           = 512,
 270
 271        .hsync_len      = 64,           .vsync_len      = 6,
 272        .left_margin    = 125,          .upper_margin   = 70,
 273        .right_margin   = 115,          .lower_margin   = 36,
 274
 275        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
 276        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
 277
 278        .backlight_power = assabet_pal_backlight_power,
 279        .lcd_power = assabet_pal_power,
 280        .set_visual = assabet_lcd_set_visual,
 281};
 282#endif
 283
 284#ifdef CONFIG_ASSABET_NEPONSET
 285static struct resource neponset_resources[] = {
 286        DEFINE_RES_MEM(0x10000000, 0x08000000),
 287        DEFINE_RES_MEM(0x18000000, 0x04000000),
 288        DEFINE_RES_MEM(0x40000000, SZ_8K),
 289        DEFINE_RES_IRQ(IRQ_GPIO25),
 290};
 291#endif
 292
 293static void __init assabet_init(void)
 294{
 295        /*
 296         * Ensure that the power supply is in "high power" mode.
 297         */
 298        GPSR = GPIO_GPIO16;
 299        GPDR |= GPIO_GPIO16;
 300
 301        /*
 302         * Ensure that these pins are set as outputs and are driving
 303         * logic 0.  This ensures that we won't inadvertently toggle
 304         * the WS latch in the CPLD, and we don't float causing
 305         * excessive power drain.  --rmk
 306         */
 307        GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 308        GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 309
 310        /*
 311         * Also set GPIO27 as an output; this is used to clock UART3
 312         * via the FPGA and as otherwise has no pullups or pulldowns,
 313         * so stop it floating.
 314         */
 315        GPCR = GPIO_GPIO27;
 316        GPDR |= GPIO_GPIO27;
 317
 318        /*
 319         * Set up registers for sleep mode.
 320         */
 321        PWER = PWER_GPIO0;
 322        PGSR = 0;
 323        PCFR = 0;
 324        PSDR = 0;
 325        PPDR |= PPC_TXD3 | PPC_TXD1;
 326        PPSR |= PPC_TXD3 | PPC_TXD1;
 327
 328        sa11x0_ppc_configure_mcp();
 329
 330        if (machine_has_neponset()) {
 331                /*
 332                 * Angel sets this, but other bootloaders may not.
 333                 *
 334                 * This must precede any driver calls to BCR_set()
 335                 * or BCR_clear().
 336                 */
 337                ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
 338
 339#ifndef CONFIG_ASSABET_NEPONSET
 340                printk( "Warning: Neponset detected but full support "
 341                        "hasn't been configured in the kernel\n" );
 342#else
 343                platform_device_register_simple("neponset", 0,
 344                        neponset_resources, ARRAY_SIZE(neponset_resources));
 345#endif
 346        }
 347
 348#ifndef ASSABET_PAL_VIDEO
 349        sa11x0_register_lcd(&lq039q2ds54_info);
 350#else
 351        sa11x0_register_lcd(&pal_video);
 352#endif
 353        sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
 354                            ARRAY_SIZE(assabet_flash_resources));
 355        sa11x0_register_irda(&assabet_irda_data);
 356        sa11x0_register_mcp(&assabet_mcp_data);
 357}
 358
 359/*
 360 * On Assabet, we must probe for the Neponset board _before_
 361 * paging_init() has occurred to actually determine the amount
 362 * of RAM available.  To do so, we map the appropriate IO section
 363 * in the page table here in order to access GPIO registers.
 364 */
 365static void __init map_sa1100_gpio_regs( void )
 366{
 367        unsigned long phys = __PREG(GPLR) & PMD_MASK;
 368        unsigned long virt = (unsigned long)io_p2v(phys);
 369        int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
 370        pmd_t *pmd;
 371
 372        pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
 373        *pmd = __pmd(phys | prot);
 374        flush_pmd_entry(pmd);
 375}
 376
 377/*
 378 * Read System Configuration "Register"
 379 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
 380 * User's Guide", section 4.4.1)
 381 *
 382 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
 383 * to set up the serial port for decompression status messages. We
 384 * repeat it here because the kernel may not be loaded as a zImage, and
 385 * also because it's a hassle to communicate the SCR value to the kernel
 386 * from the decompressor.
 387 *
 388 * Note that IRQs are guaranteed to be disabled.
 389 */
 390static void __init get_assabet_scr(void)
 391{
 392        unsigned long uninitialized_var(scr), i;
 393
 394        GPDR |= 0x3fc;                  /* Configure GPIO 9:2 as outputs */
 395        GPSR = 0x3fc;                   /* Write 0xFF to GPIO 9:2 */
 396        GPDR &= ~(0x3fc);               /* Configure GPIO 9:2 as inputs */
 397        for(i = 100; i--; )             /* Read GPIO 9:2 */
 398                scr = GPLR;
 399        GPDR |= 0x3fc;                  /*  restore correct pin direction */
 400        scr &= 0x3fc;                   /* save as system configuration byte. */
 401        SCR_value = scr;
 402}
 403
 404static void __init
 405fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
 406{
 407        /* This must be done before any call to machine_has_neponset() */
 408        map_sa1100_gpio_regs();
 409        get_assabet_scr();
 410
 411        if (machine_has_neponset())
 412                printk("Neponset expansion board detected\n");
 413}
 414
 415
 416static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
 417{
 418        if (port->mapbase == _Ser1UTCR0) {
 419                if (state)
 420                        ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
 421                                          ASSABET_BCR_COM_RTS |
 422                                          ASSABET_BCR_COM_DTR);
 423                else
 424                        ASSABET_BCR_set(ASSABET_BCR_RS232EN |
 425                                        ASSABET_BCR_COM_RTS |
 426                                        ASSABET_BCR_COM_DTR);
 427        }
 428}
 429
 430/*
 431 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
 432 * and UART3 (radio module).  We only handle them for UART1 here.
 433 */
 434static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
 435{
 436        if (port->mapbase == _Ser1UTCR0) {
 437                u_int set = 0, clear = 0;
 438
 439                if (mctrl & TIOCM_RTS)
 440                        clear |= ASSABET_BCR_COM_RTS;
 441                else
 442                        set |= ASSABET_BCR_COM_RTS;
 443
 444                if (mctrl & TIOCM_DTR)
 445                        clear |= ASSABET_BCR_COM_DTR;
 446                else
 447                        set |= ASSABET_BCR_COM_DTR;
 448
 449                ASSABET_BCR_clear(clear);
 450                ASSABET_BCR_set(set);
 451        }
 452}
 453
 454static u_int assabet_get_mctrl(struct uart_port *port)
 455{
 456        u_int ret = 0;
 457        u_int bsr = ASSABET_BSR;
 458
 459        /* need 2 reads to read current value */
 460        bsr = ASSABET_BSR;
 461
 462        if (port->mapbase == _Ser1UTCR0) {
 463                if (bsr & ASSABET_BSR_COM_DCD)
 464                        ret |= TIOCM_CD;
 465                if (bsr & ASSABET_BSR_COM_CTS)
 466                        ret |= TIOCM_CTS;
 467                if (bsr & ASSABET_BSR_COM_DSR)
 468                        ret |= TIOCM_DSR;
 469        } else if (port->mapbase == _Ser3UTCR0) {
 470                if (bsr & ASSABET_BSR_RAD_DCD)
 471                        ret |= TIOCM_CD;
 472                if (bsr & ASSABET_BSR_RAD_CTS)
 473                        ret |= TIOCM_CTS;
 474                if (bsr & ASSABET_BSR_RAD_DSR)
 475                        ret |= TIOCM_DSR;
 476                if (bsr & ASSABET_BSR_RAD_RI)
 477                        ret |= TIOCM_RI;
 478        } else {
 479                ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
 480        }
 481
 482        return ret;
 483}
 484
 485static struct sa1100_port_fns assabet_port_fns __initdata = {
 486        .set_mctrl      = assabet_set_mctrl,
 487        .get_mctrl      = assabet_get_mctrl,
 488        .pm             = assabet_uart_pm,
 489};
 490
 491static struct map_desc assabet_io_desc[] __initdata = {
 492        {       /* Board Control Register */
 493                .virtual        =  0xf1000000,
 494                .pfn            = __phys_to_pfn(0x12000000),
 495                .length         = 0x00100000,
 496                .type           = MT_DEVICE
 497        }, {    /* MQ200 */
 498                .virtual        =  0xf2800000,
 499                .pfn            = __phys_to_pfn(0x4b800000),
 500                .length         = 0x00800000,
 501                .type           = MT_DEVICE
 502        }
 503};
 504
 505static void __init assabet_map_io(void)
 506{
 507        sa1100_map_io();
 508        iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
 509
 510        /*
 511         * Set SUS bit in SDCR0 so serial port 1 functions.
 512         * Its called GPCLKR0 in my SA1110 manual.
 513         */
 514        Ser1SDCR0 |= SDCR0_SUS;
 515
 516        if (!machine_has_neponset())
 517                sa1100_register_uart_fns(&assabet_port_fns);
 518
 519        /*
 520         * When Neponset is attached, the first UART should be
 521         * UART3.  That's what Angel is doing and many documents
 522         * are stating this.
 523         *
 524         * We do the Neponset mapping even if Neponset support
 525         * isn't compiled in so the user will still get something on
 526         * the expected physical serial port.
 527         *
 528         * We no longer do this; not all boot loaders support it,
 529         * and UART3 appears to be somewhat unreliable with blob.
 530         */
 531        sa1100_register_uart(0, 1);
 532        sa1100_register_uart(2, 3);
 533}
 534
 535/* LEDs */
 536#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
 537struct assabet_led {
 538        struct led_classdev cdev;
 539        u32 mask;
 540};
 541
 542/*
 543 * The triggers lines up below will only be used if the
 544 * LED triggers are compiled in.
 545 */
 546static const struct {
 547        const char *name;
 548        const char *trigger;
 549} assabet_leds[] = {
 550        { "assabet:red", "cpu0",},
 551        { "assabet:green", "heartbeat", },
 552};
 553
 554/*
 555 * The LED control in Assabet is reversed:
 556 *  - setting bit means turn off LED
 557 *  - clearing bit means turn on LED
 558 */
 559static void assabet_led_set(struct led_classdev *cdev,
 560                enum led_brightness b)
 561{
 562        struct assabet_led *led = container_of(cdev,
 563                        struct assabet_led, cdev);
 564
 565        if (b != LED_OFF)
 566                ASSABET_BCR_clear(led->mask);
 567        else
 568                ASSABET_BCR_set(led->mask);
 569}
 570
 571static enum led_brightness assabet_led_get(struct led_classdev *cdev)
 572{
 573        struct assabet_led *led = container_of(cdev,
 574                        struct assabet_led, cdev);
 575
 576        return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
 577}
 578
 579static int __init assabet_leds_init(void)
 580{
 581        int i;
 582
 583        if (!machine_is_assabet())
 584                return -ENODEV;
 585
 586        for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
 587                struct assabet_led *led;
 588
 589                led = kzalloc(sizeof(*led), GFP_KERNEL);
 590                if (!led)
 591                        break;
 592
 593                led->cdev.name = assabet_leds[i].name;
 594                led->cdev.brightness_set = assabet_led_set;
 595                led->cdev.brightness_get = assabet_led_get;
 596                led->cdev.default_trigger = assabet_leds[i].trigger;
 597
 598                if (!i)
 599                        led->mask = ASSABET_BCR_LED_RED;
 600                else
 601                        led->mask = ASSABET_BCR_LED_GREEN;
 602
 603                if (led_classdev_register(NULL, &led->cdev) < 0) {
 604                        kfree(led);
 605                        break;
 606                }
 607        }
 608
 609        return 0;
 610}
 611
 612/*
 613 * Since we may have triggers on any subsystem, defer registration
 614 * until after subsystem_init.
 615 */
 616fs_initcall(assabet_leds_init);
 617#endif
 618
 619MACHINE_START(ASSABET, "Intel-Assabet")
 620        .atag_offset    = 0x100,
 621        .fixup          = fixup_assabet,
 622        .map_io         = assabet_map_io,
 623        .nr_irqs        = SA1100_NR_IRQS,
 624        .init_irq       = sa1100_init_irq,
 625        .init_time      = sa1100_timer_init,
 626        .init_machine   = assabet_init,
 627        .init_late      = sa11x0_init_late,
 628#ifdef CONFIG_SA1111
 629        .dma_zone_size  = SZ_1M,
 630#endif
 631        .restart        = sa11x0_restart,
 632MACHINE_END
 633