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22#include <linux/kernel.h>
23#include <linux/io.h>
24#include <linux/irqchip/arm-gic.h>
25#include <linux/of.h>
26#include <linux/of_platform.h>
27#include <linux/platform_data/gpio-rcar.h>
28#include <linux/platform_data/irq-renesas-intc-irqpin.h>
29#include <linux/platform_device.h>
30#include <linux/irqchip.h>
31#include <linux/serial_sci.h>
32#include <linux/sh_timer.h>
33#include <linux/pm_runtime.h>
34#include <linux/usb/phy.h>
35#include <linux/usb/hcd.h>
36#include <linux/usb/ehci_pdriver.h>
37#include <linux/usb/ohci_pdriver.h>
38#include <linux/dma-mapping.h>
39#include <mach/irqs.h>
40#include <mach/r8a7778.h>
41#include <mach/common.h>
42#include <asm/mach/arch.h>
43#include <asm/hardware/cache-l2x0.h>
44
45
46#define SCIF_INFO(baseaddr, irq) \
47{ \
48 .mapbase = baseaddr, \
49 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
50 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
51 .scbrr_algo_id = SCBRR_ALGO_2, \
52 .type = PORT_SCIF, \
53 .irqs = SCIx_IRQ_MUXED(irq), \
54}
55
56static struct plat_sci_port scif_platform_data[] = {
57 SCIF_INFO(0xffe40000, gic_iid(0x66)),
58 SCIF_INFO(0xffe41000, gic_iid(0x67)),
59 SCIF_INFO(0xffe42000, gic_iid(0x68)),
60 SCIF_INFO(0xffe43000, gic_iid(0x69)),
61 SCIF_INFO(0xffe44000, gic_iid(0x6a)),
62 SCIF_INFO(0xffe45000, gic_iid(0x6b)),
63};
64
65
66static struct resource sh_tmu0_resources[] = {
67 DEFINE_RES_MEM(0xffd80008, 12),
68 DEFINE_RES_IRQ(gic_iid(0x40)),
69};
70
71static struct sh_timer_config sh_tmu0_platform_data = {
72 .name = "TMU00",
73 .channel_offset = 0x4,
74 .timer_bit = 0,
75 .clockevent_rating = 200,
76};
77
78static struct resource sh_tmu1_resources[] = {
79 DEFINE_RES_MEM(0xffd80014, 12),
80 DEFINE_RES_IRQ(gic_iid(0x41)),
81};
82
83static struct sh_timer_config sh_tmu1_platform_data = {
84 .name = "TMU01",
85 .channel_offset = 0x10,
86 .timer_bit = 1,
87 .clocksource_rating = 200,
88};
89
90#define r8a7778_register_tmu(idx) \
91 platform_device_register_resndata( \
92 &platform_bus, "sh_tmu", idx, \
93 sh_tmu##idx##_resources, \
94 ARRAY_SIZE(sh_tmu##idx##_resources), \
95 &sh_tmu##idx##_platform_data, \
96 sizeof(sh_tmu##idx##_platform_data))
97
98
99static struct resource usb_phy_resources[] __initdata = {
100 DEFINE_RES_MEM(0xffe70800, 0x100),
101 DEFINE_RES_MEM(0xffe76000, 0x100),
102};
103
104void __init r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
105{
106 platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
107 usb_phy_resources,
108 ARRAY_SIZE(usb_phy_resources),
109 pdata, sizeof(*pdata));
110}
111
112
113static struct usb_phy *phy;
114
115static int usb_power_on(struct platform_device *pdev)
116{
117 if (IS_ERR(phy))
118 return PTR_ERR(phy);
119
120 pm_runtime_enable(&pdev->dev);
121 pm_runtime_get_sync(&pdev->dev);
122
123 usb_phy_init(phy);
124
125 return 0;
126}
127
128static void usb_power_off(struct platform_device *pdev)
129{
130 if (IS_ERR(phy))
131 return;
132
133 usb_phy_shutdown(phy);
134
135 pm_runtime_put_sync(&pdev->dev);
136 pm_runtime_disable(&pdev->dev);
137}
138
139static int ehci_init_internal_buffer(struct usb_hcd *hcd)
140{
141
142
143
144
145
146 iowrite32(0x00ff0040, hcd->regs + 0x0094);
147
148 iowrite32(0x00000001, hcd->regs + 0x009C);
149
150 return 0;
151}
152
153static struct usb_ehci_pdata ehci_pdata __initdata = {
154 .power_on = usb_power_on,
155 .power_off = usb_power_off,
156 .power_suspend = usb_power_off,
157 .pre_setup = ehci_init_internal_buffer,
158};
159
160static struct resource ehci_resources[] __initdata = {
161 DEFINE_RES_MEM(0xffe70000, 0x400),
162 DEFINE_RES_IRQ(gic_iid(0x4c)),
163};
164
165static struct usb_ohci_pdata ohci_pdata __initdata = {
166 .power_on = usb_power_on,
167 .power_off = usb_power_off,
168 .power_suspend = usb_power_off,
169};
170
171static struct resource ohci_resources[] __initdata = {
172 DEFINE_RES_MEM(0xffe70400, 0x400),
173 DEFINE_RES_IRQ(gic_iid(0x4c)),
174};
175
176#define USB_PLATFORM_INFO(hci) \
177static struct platform_device_info hci##_info __initdata = { \
178 .parent = &platform_bus, \
179 .name = #hci "-platform", \
180 .id = -1, \
181 .res = hci##_resources, \
182 .num_res = ARRAY_SIZE(hci##_resources), \
183 .data = &hci##_pdata, \
184 .size_data = sizeof(hci##_pdata), \
185 .dma_mask = DMA_BIT_MASK(32), \
186}
187
188USB_PLATFORM_INFO(ehci);
189USB_PLATFORM_INFO(ohci);
190
191
192static struct resource ether_resources[] = {
193 DEFINE_RES_MEM(0xfde00000, 0x400),
194 DEFINE_RES_IRQ(gic_iid(0x89)),
195};
196
197void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
198{
199 platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
200 ether_resources,
201 ARRAY_SIZE(ether_resources),
202 pdata, sizeof(*pdata));
203}
204
205
206static struct resource pfc_resources[] = {
207 DEFINE_RES_MEM(0xfffc0000, 0x118),
208};
209
210#define R8A7778_GPIO(idx) \
211static struct resource r8a7778_gpio##idx##_resources[] = { \
212 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
213 DEFINE_RES_IRQ(gic_iid(0x87)), \
214}; \
215 \
216static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \
217 .gpio_base = 32 * (idx), \
218 .irq_base = GPIO_IRQ_BASE(idx), \
219 .number_of_pins = 32, \
220 .pctl_name = "pfc-r8a7778", \
221}
222
223R8A7778_GPIO(0);
224R8A7778_GPIO(1);
225R8A7778_GPIO(2);
226R8A7778_GPIO(3);
227R8A7778_GPIO(4);
228
229#define r8a7778_register_gpio(idx) \
230 platform_device_register_resndata( \
231 &platform_bus, "gpio_rcar", idx, \
232 r8a7778_gpio##idx##_resources, \
233 ARRAY_SIZE(r8a7778_gpio##idx##_resources), \
234 &r8a7778_gpio##idx##_platform_data, \
235 sizeof(r8a7778_gpio##idx##_platform_data))
236
237void __init r8a7778_pinmux_init(void)
238{
239 platform_device_register_simple(
240 "pfc-r8a7778", -1,
241 pfc_resources,
242 ARRAY_SIZE(pfc_resources));
243
244 r8a7778_register_gpio(0);
245 r8a7778_register_gpio(1);
246 r8a7778_register_gpio(2);
247 r8a7778_register_gpio(3);
248 r8a7778_register_gpio(4);
249};
250
251
252static struct resource sdhi_resources[] = {
253
254 DEFINE_RES_MEM(0xFFE4C000, 0x100),
255 DEFINE_RES_IRQ(gic_iid(0x77)),
256
257 DEFINE_RES_MEM(0xFFE4D000, 0x100),
258 DEFINE_RES_IRQ(gic_iid(0x78)),
259
260 DEFINE_RES_MEM(0xFFE4F000, 0x100),
261 DEFINE_RES_IRQ(gic_iid(0x76)),
262};
263
264void __init r8a7778_sdhi_init(int id,
265 struct sh_mobile_sdhi_info *info)
266{
267 BUG_ON(id < 0 || id > 2);
268
269 platform_device_register_resndata(
270 &platform_bus, "sh_mobile_sdhi", id,
271 sdhi_resources + (2 * id), 2,
272 info, sizeof(*info));
273}
274
275
276static struct resource i2c_resources[] __initdata = {
277
278 DEFINE_RES_MEM(0xffc70000, 0x1000),
279 DEFINE_RES_IRQ(gic_iid(0x63)),
280
281 DEFINE_RES_MEM(0xffc71000, 0x1000),
282 DEFINE_RES_IRQ(gic_iid(0x6e)),
283
284 DEFINE_RES_MEM(0xffc72000, 0x1000),
285 DEFINE_RES_IRQ(gic_iid(0x6c)),
286
287 DEFINE_RES_MEM(0xffc73000, 0x1000),
288 DEFINE_RES_IRQ(gic_iid(0x6d)),
289};
290
291void __init r8a7778_add_i2c_device(int id)
292{
293 BUG_ON(id < 0 || id > 3);
294
295 platform_device_register_simple(
296 "i2c-rcar", id,
297 i2c_resources + (2 * id), 2);
298}
299
300
301static struct resource hspi_resources[] __initdata = {
302
303 DEFINE_RES_MEM(0xfffc7000, 0x18),
304 DEFINE_RES_IRQ(gic_iid(0x5f)),
305
306 DEFINE_RES_MEM(0xfffc8000, 0x18),
307 DEFINE_RES_IRQ(gic_iid(0x74)),
308
309 DEFINE_RES_MEM(0xfffc6000, 0x18),
310 DEFINE_RES_IRQ(gic_iid(0x75)),
311};
312
313void __init r8a7778_add_hspi_device(int id)
314{
315 BUG_ON(id < 0 || id > 2);
316
317 platform_device_register_simple(
318 "sh-hspi", id,
319 hspi_resources + (2 * id), 2);
320}
321
322
323static struct resource mmc_resources[] __initdata = {
324 DEFINE_RES_MEM(0xffe4e000, 0x100),
325 DEFINE_RES_IRQ(gic_iid(0x5d)),
326};
327
328void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
329{
330 platform_device_register_resndata(
331 &platform_bus, "sh_mmcif", -1,
332 mmc_resources, ARRAY_SIZE(mmc_resources),
333 info, sizeof(*info));
334}
335
336void __init r8a7778_add_standard_devices(void)
337{
338 int i;
339
340#ifdef CONFIG_CACHE_L2X0
341 void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
342 if (base) {
343
344
345
346
347 l2x0_init(base, 0x40470000, 0x82000fff);
348 }
349#endif
350
351 for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++)
352 platform_device_register_data(&platform_bus, "sh-sci", i,
353 &scif_platform_data[i],
354 sizeof(struct plat_sci_port));
355
356 r8a7778_register_tmu(0);
357 r8a7778_register_tmu(1);
358}
359
360void __init r8a7778_init_late(void)
361{
362 phy = usb_get_phy(USB_PHY_TYPE_USB2);
363
364 platform_device_register_full(&ehci_info);
365 platform_device_register_full(&ohci_info);
366}
367
368static struct renesas_intc_irqpin_config irqpin_platform_data = {
369 .irq_base = irq_pin(0),
370 .sense_bitfield_width = 2,
371};
372
373static struct resource irqpin_resources[] = {
374 DEFINE_RES_MEM(0xfe78001c, 4),
375 DEFINE_RES_MEM(0xfe780010, 4),
376 DEFINE_RES_MEM(0xfe780024, 4),
377 DEFINE_RES_MEM(0xfe780044, 4),
378 DEFINE_RES_MEM(0xfe780064, 4),
379 DEFINE_RES_IRQ(gic_iid(0x3b)),
380 DEFINE_RES_IRQ(gic_iid(0x3c)),
381 DEFINE_RES_IRQ(gic_iid(0x3d)),
382 DEFINE_RES_IRQ(gic_iid(0x3e)),
383};
384
385void __init r8a7778_init_irq_extpin(int irlm)
386{
387 void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
388 unsigned long tmp;
389
390 if (!icr0) {
391 pr_warn("r8a7778: unable to setup external irq pin mode\n");
392 return;
393 }
394
395 tmp = ioread32(icr0);
396 if (irlm)
397 tmp |= 1 << 23;
398 else
399 tmp &= ~(1 << 23);
400 tmp |= (1 << 21);
401 iowrite32(tmp, icr0);
402 iounmap(icr0);
403
404 if (irlm)
405 platform_device_register_resndata(
406 &platform_bus, "renesas_intc_irqpin", -1,
407 irqpin_resources, ARRAY_SIZE(irqpin_resources),
408 &irqpin_platform_data, sizeof(irqpin_platform_data));
409}
410
411#define INT2SMSKCR0 0x82288
412#define INT2SMSKCR1 0x8228c
413
414#define INT2NTSR0 0x00018
415#define INT2NTSR1 0x0002c
416static void __init r8a7778_init_irq_common(void)
417{
418 void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
419
420 BUG_ON(!base);
421
422
423 __raw_writel(0x73ffffff, base + INT2NTSR0);
424 __raw_writel(0xffffffff, base + INT2NTSR1);
425
426
427 __raw_writel(0x08330773, base + INT2SMSKCR0);
428 __raw_writel(0x00311110, base + INT2SMSKCR1);
429
430 iounmap(base);
431}
432
433void __init r8a7778_init_irq(void)
434{
435 void __iomem *gic_dist_base;
436 void __iomem *gic_cpu_base;
437
438 gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
439 gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE);
440 BUG_ON(!gic_dist_base || !gic_cpu_base);
441
442
443 gic_init(0, 29, gic_dist_base, gic_cpu_base);
444
445 r8a7778_init_irq_common();
446}
447
448void __init r8a7778_init_delay(void)
449{
450 shmobile_setup_delay(800, 1, 3);
451}
452
453#ifdef CONFIG_USE_OF
454void __init r8a7778_init_irq_dt(void)
455{
456 irqchip_init();
457 r8a7778_init_irq_common();
458}
459
460static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
461 {},
462};
463
464void __init r8a7778_add_standard_devices_dt(void)
465{
466 of_platform_populate(NULL, of_default_bus_match_table,
467 r8a7778_auxdata_lookup, NULL);
468}
469
470static const char *r8a7778_compat_dt[] __initdata = {
471 "renesas,r8a7778",
472 NULL,
473};
474
475DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
476 .init_early = r8a7778_init_delay,
477 .init_irq = r8a7778_init_irq_dt,
478 .init_machine = r8a7778_add_standard_devices_dt,
479 .init_time = shmobile_timer_init,
480 .dt_compat = r8a7778_compat_dt,
481 .init_late = r8a7778_init_late,
482MACHINE_END
483
484#endif
485
