LXR linux/arch/arm/mach-zynq/common.c

   1/*
   2 * This file contains common code that is intended to be used across
   3 * boards so that it's not replicated.
   4 *
   5 *  Copyright (C) 2011 Xilinx
   6 *
   7 * This software is licensed under the terms of the GNU General Public
   8 * License version 2, as published by the Free Software Foundation, and
   9 * may be copied, distributed, and modified under those terms.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 */
  16
  17#include <linux/init.h>
  18#include <linux/kernel.h>
  19#include <linux/cpumask.h>
  20#include <linux/platform_device.h>
  21#include <linux/clk.h>
  22#include <linux/clk/zynq.h>
  23#include <linux/clocksource.h>
  24#include <linux/of_address.h>
  25#include <linux/of_irq.h>
  26#include <linux/of_platform.h>
  27#include <linux/of.h>
  28
  29#include <asm/mach/arch.h>
  30#include <asm/mach/map.h>
  31#include <asm/mach/time.h>
  32#include <asm/mach-types.h>
  33#include <asm/page.h>
  34#include <asm/pgtable.h>
  35#include <asm/smp_scu.h>
  36#include <asm/hardware/cache-l2x0.h>
  37
  38#include "common.h"
  39
  40void __iomem *zynq_scu_base;
  41
  42static struct of_device_id zynq_of_bus_ids[] __initdata = {
  43        { .compatible = "simple-bus", },
  44        {}
  45};
  46
  47/**
  48 * zynq_init_machine - System specific initialization, intended to be
  49 *                     called from board specific initialization.
  50 */
  51static void __init zynq_init_machine(void)
  52{
  53        /*
  54         * 64KB way size, 8-way associativity, parity disabled
  55         */
  56        l2x0_of_init(0x02060000, 0xF0F0FFFF);
  57
  58        of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
  59}
  60
  61static void __init zynq_timer_init(void)
  62{
  63        zynq_slcr_init();
  64        clocksource_of_init();
  65}
  66
  67static struct map_desc zynq_cortex_a9_scu_map __initdata = {
  68        .length = SZ_256,
  69        .type   = MT_DEVICE,
  70};
  71
  72static void __init zynq_scu_map_io(void)
  73{
  74        unsigned long base;
  75
  76        base = scu_a9_get_base();
  77        zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
  78        /* Expected address is in vmalloc area that's why simple assign here */
  79        zynq_cortex_a9_scu_map.virtual = base;
  80        iotable_init(&zynq_cortex_a9_scu_map, 1);
  81        zynq_scu_base = (void __iomem *)base;
  82        BUG_ON(!zynq_scu_base);
  83}
  84
  85/**
  86 * zynq_map_io - Create memory mappings needed for early I/O.
  87 */
  88static void __init zynq_map_io(void)
  89{
  90        debug_ll_io_init();
  91        zynq_scu_map_io();
  92}
  93
  94static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
  95{
  96        zynq_slcr_system_reset();
  97}
  98
  99static const char * const zynq_dt_match[] = {
 100        "xlnx,zynq-7000",
 101        NULL
 102};
 103
 104DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
 105        .smp            = smp_ops(zynq_smp_ops),
 106        .map_io         = zynq_map_io,
 107        .init_machine   = zynq_init_machine,
 108        .init_time      = zynq_timer_init,
 109        .dt_compat      = zynq_dt_match,
 110        .restart        = zynq_system_reset,
 111MACHINE_END
 112