LXR linux/arch/blackfin/mach-bf561/Kconfig

   1if (BF561)
   2
   3source "arch/blackfin/mach-bf561/boards/Kconfig"
   4
   5menu "BF561 Specific Configuration"
   6
   7if (!SMP)
   8
   9comment "Core B Support"
  10
  11config BF561_COREB
  12        bool "Enable Core B loader"
  13        default y
  14
  15endif
  16
  17comment "Interrupt Priority Assignment"
  18
  19menu "Priority"
  20
  21config IRQ_PLL_WAKEUP
  22        int "PLL Wakeup Interrupt"
  23        default 7
  24config IRQ_DMA1_ERROR
  25        int "DMA1 Error (generic)"
  26        default 7
  27config IRQ_DMA2_ERROR
  28        int "DMA2 Error (generic)"
  29        default 7
  30config IRQ_IMDMA_ERROR
  31        int "IMDMA Error (generic)"
  32        default 7
  33config IRQ_PPI0_ERROR
  34        int "PPI0 Error Interrupt"
  35        default 7
  36config IRQ_PPI1_ERROR
  37        int "PPI1 Error Interrupt"
  38        default 7
  39config IRQ_SPORT0_ERROR
  40        int "SPORT0 Error Interrupt"
  41        default 7
  42config IRQ_SPORT1_ERROR
  43        int "SPORT1 Error Interrupt"
  44        default 7
  45config IRQ_SPI_ERROR
  46        int "SPI Error Interrupt"
  47        default 7
  48config IRQ_UART_ERROR
  49        int "UART Error Interrupt"
  50        default 7
  51config IRQ_RESERVED_ERROR
  52        int "Reserved Interrupt"
  53        default 7
  54config IRQ_DMA1_0
  55        int "DMA1 0  Interrupt(PPI1)"
  56        default 8
  57config IRQ_DMA1_1
  58        int "DMA1 1  Interrupt(PPI2)"
  59        default 8
  60config IRQ_DMA1_2
  61        int "DMA1 2  Interrupt"
  62        default 8
  63config IRQ_DMA1_3
  64        int "DMA1 3  Interrupt"
  65        default 8
  66config IRQ_DMA1_4
  67        int "DMA1 4  Interrupt"
  68        default 8
  69config IRQ_DMA1_5
  70        int "DMA1 5  Interrupt"
  71        default 8
  72config IRQ_DMA1_6
  73        int "DMA1 6  Interrupt"
  74        default 8
  75config IRQ_DMA1_7
  76        int "DMA1 7  Interrupt"
  77        default 8
  78config IRQ_DMA1_8
  79        int "DMA1 8  Interrupt"
  80        default 8
  81config IRQ_DMA1_9
  82        int "DMA1 9  Interrupt"
  83        default 8
  84config IRQ_DMA1_10
  85        int "DMA1 10 Interrupt"
  86        default 8
  87config IRQ_DMA1_11
  88        int "DMA1 11 Interrupt"
  89        default 8
  90config IRQ_DMA2_0
  91        int "DMA2 0  (SPORT0 RX)"
  92        default 9
  93config IRQ_DMA2_1
  94        int "DMA2 1  (SPORT0 TX)"
  95        default 9
  96config IRQ_DMA2_2
  97        int "DMA2 2  (SPORT1 RX)"
  98        default 9
  99config IRQ_DMA2_3
 100        int "DMA2 3  (SPORT2 TX)"
 101        default 9
 102config IRQ_DMA2_4
 103        int "DMA2 4  (SPI)"
 104        default 9
 105config IRQ_DMA2_5
 106        int "DMA2 5  (UART RX)"
 107        default 9
 108config IRQ_DMA2_6
 109        int "DMA2 6  (UART TX)"
 110        default 9
 111config IRQ_DMA2_7
 112        int "DMA2 7  Interrupt"
 113        default 9
 114config IRQ_DMA2_8
 115        int "DMA2 8  Interrupt"
 116        default 9
 117config IRQ_DMA2_9
 118        int "DMA2 9  Interrupt"
 119        default 9
 120config IRQ_DMA2_10
 121        int "DMA2 10 Interrupt"
 122        default 9
 123config IRQ_DMA2_11
 124        int "DMA2 11 Interrupt"
 125        default 9
 126config IRQ_TIMER0
 127        int "TIMER 0  Interrupt"
 128        default 7 if TICKSOURCE_GPTMR0
 129        default 8
 130config IRQ_TIMER1
 131        int "TIMER 1  Interrupt"
 132        default 10
 133config IRQ_TIMER2
 134        int "TIMER 2  Interrupt"
 135        default 10
 136config IRQ_TIMER3
 137        int "TIMER 3  Interrupt"
 138        default 10
 139config IRQ_TIMER4
 140        int "TIMER 4  Interrupt"
 141        default 10
 142config IRQ_TIMER5
 143        int "TIMER 5  Interrupt"
 144        default 10
 145config IRQ_TIMER6
 146        int "TIMER 6  Interrupt"
 147        default 10
 148config IRQ_TIMER7
 149        int "TIMER 7  Interrupt"
 150        default 10
 151config IRQ_TIMER8
 152        int "TIMER 8  Interrupt"
 153        default 10
 154config IRQ_TIMER9
 155        int "TIMER 9  Interrupt"
 156        default 10
 157config IRQ_TIMER10
 158        int "TIMER 10 Interrupt"
 159        default 10
 160config IRQ_TIMER11
 161        int "TIMER 11 Interrupt"
 162        default 10
 163config IRQ_PROG0_INTA
 164        int "Programmable Flags0 A (8)"
 165        default 11
 166config IRQ_PROG0_INTB
 167        int "Programmable Flags0 B (8)"
 168        default 11
 169config IRQ_PROG1_INTA
 170        int "Programmable Flags1 A (8)"
 171        default 11
 172config IRQ_PROG1_INTB
 173        int "Programmable Flags1 B (8)"
 174        default 11
 175config IRQ_PROG2_INTA
 176        int "Programmable Flags2 A (8)"
 177        default 11
 178config IRQ_PROG2_INTB
 179        int "Programmable Flags2 B (8)"
 180        default 11
 181config IRQ_DMA1_WRRD0
 182        int "MDMA1 0 write/read INT"
 183        default 8
 184config IRQ_DMA1_WRRD1
 185        int "MDMA1 1 write/read INT"
 186        default 8
 187config IRQ_DMA2_WRRD0
 188        int "MDMA2 0 write/read INT"
 189        default 9
 190config IRQ_DMA2_WRRD1
 191        int "MDMA2 1 write/read INT"
 192        default 9
 193config IRQ_IMDMA_WRRD0
 194        int "IMDMA 0 write/read INT"
 195        default 12
 196config IRQ_IMDMA_WRRD1
 197        int "IMDMA 1 write/read INT"
 198        default 12
 199config IRQ_WDTIMER
 200        int "Watch Dog Timer"
 201        default 13
 202
 203        help
 204          Enter the priority numbers between 7-13 ONLY.  Others are Reserved.
 205          This applies to all the above.  It is not recommended to assign the
 206          highest priority number 7 to UART or any other device.
 207
 208endmenu
 209
 210endmenu
 211
 212endif
 213