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2
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4
5#ifndef __ASM_METAG_PROCESSOR_H
6#define __ASM_METAG_PROCESSOR_H
7
8#include <linux/atomic.h>
9
10#include <asm/page.h>
11#include <asm/ptrace.h>
12#include <asm/metag_regs.h>
13
14
15
16
17
18#define current_text_addr() ({ __label__ _l; _l: &&_l; })
19
20
21#define TASK_SIZE PAGE_OFFSET
22
23#define STACK_TOP (TASK_SIZE - PAGE_SIZE)
24#define STACK_TOP_MAX STACK_TOP
25
26
27
28
29#define TASK_UNMAPPED_BASE META_MEMORY_BASE
30
31typedef struct {
32 unsigned long seg;
33} mm_segment_t;
34
35#ifdef CONFIG_METAG_FPU
36struct meta_fpu_context {
37 TBICTXEXTFPU fpstate;
38 union {
39 struct {
40 TBICTXEXTBB4 fx8_15;
41 TBICTXEXTFPACC fpacc;
42 } fx8_15;
43 struct {
44 TBICTXEXTFPACC fpacc;
45 TBICTXEXTBB4 unused;
46 } nofx8_15;
47 } extfpstate;
48 bool needs_restore;
49};
50#else
51struct meta_fpu_context {};
52#endif
53
54#ifdef CONFIG_METAG_DSP
55struct meta_ext_context {
56 struct {
57 TBIEXTCTX ctx;
58 TBICTXEXTBB8 bb8;
59 TBIDUAL ax[TBICTXEXTAXX_BYTES / sizeof(TBIDUAL)];
60 TBICTXEXTHL2 hl2;
61 TBICTXEXTTDPR ext;
62 TBICTXEXTRP6 rp;
63 } regs;
64
65
66 void *ram[2];
67
68
69 unsigned int ram_sz[2];
70};
71#else
72struct meta_ext_context {};
73#endif
74
75struct thread_struct {
76 PTBICTX kernel_context;
77
78 unsigned int user_flags;
79 struct meta_fpu_context *fpu_context;
80 void __user *tls_ptr;
81 unsigned short int_depth;
82 unsigned short txdefr_failure;
83 struct meta_ext_context *dsp_context;
84};
85
86#define INIT_THREAD { \
87 NULL, \
88 0, \
89 NULL, \
90 NULL, \
91 1, \
92 0, \
93 NULL, \
94}
95
96
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107
108
109
110#define start_thread(regs, pc, usp) do { \
111 unsigned int *argc = (unsigned int *) bprm->exec; \
112 set_fs(USER_DS); \
113 current->thread.int_depth = 1; \
114 \
115 regs->ctx.SaveMask = TBICTX_PRIV_BIT; \
116 regs->ctx.CurrPC = pc; \
117 regs->ctx.AX[0].U0 = usp; \
118 regs->ctx.DX[3].U1 = *((int *)argc); \
119 regs->ctx.DX[3].U0 = (int)((int *)argc + 1); \
120 regs->ctx.DX[2].U1 = (int)((int *)argc + \
121 regs->ctx.DX[3].U1 + 2); \
122 regs->ctx.DX[2].U0 = 0; \
123} while (0)
124
125
126struct task_struct;
127
128
129static inline void release_thread(struct task_struct *dead_task)
130{
131}
132
133#define copy_segments(tsk, mm) do { } while (0)
134#define release_segments(mm) do { } while (0)
135
136extern void exit_thread(void);
137
138
139
140
141#define thread_saved_pc(tsk) \
142 ((unsigned long)(tsk)->thread.kernel_context->CurrPC)
143#define thread_saved_sp(tsk) \
144 ((unsigned long)(tsk)->thread.kernel_context->AX[0].U0)
145#define thread_saved_fp(tsk) \
146 ((unsigned long)(tsk)->thread.kernel_context->AX[1].U0)
147
148unsigned long get_wchan(struct task_struct *p);
149
150#define KSTK_EIP(tsk) ((tsk)->thread.kernel_context->CurrPC)
151#define KSTK_ESP(tsk) ((tsk)->thread.kernel_context->AX[0].U0)
152
153#define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0)
154
155#define cpu_relax() barrier()
156
157extern void setup_priv(void);
158
159static inline unsigned int hard_processor_id(void)
160{
161 unsigned int id;
162
163 asm volatile ("MOV %0, TXENABLE\n"
164 "AND %0, %0, %1\n"
165 "LSR %0, %0, %2\n"
166 : "=&d" (id)
167 : "I" (TXENABLE_THREAD_BITS),
168 "K" (TXENABLE_THREAD_S)
169 );
170
171 return id;
172}
173
174#define OP3_EXIT 0
175
176#define HALT_OK 0
177#define HALT_PANIC -1
178
179
180
181
182
183
184static inline void hard_processor_halt(int exit_code)
185{
186 asm volatile ("MOV D1Ar1, %0\n"
187 "MOV D0Ar6, %1\n"
188 "MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2\n"
189 "1:\n"
190 "SWITCH #0xC30006\n"
191 "B 1b\n"
192 : : "r" (exit_code), "K" (OP3_EXIT));
193}
194
195
196extern void (*soc_restart)(char *cmd);
197extern void (*soc_halt)(void);
198
199extern void show_trace(struct task_struct *tsk, unsigned long *sp,
200 struct pt_regs *regs);
201
202extern const struct seq_operations cpuinfo_op;
203
204#endif
205