linux/arch/microblaze/kernel/process.c
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   1/*
   2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
   3 * Copyright (C) 2008-2009 PetaLogix
   4 * Copyright (C) 2006 Atmark Techno, Inc.
   5 *
   6 * This file is subject to the terms and conditions of the GNU General Public
   7 * License. See the file "COPYING" in the main directory of this archive
   8 * for more details.
   9 */
  10
  11#include <linux/export.h>
  12#include <linux/sched.h>
  13#include <linux/pm.h>
  14#include <linux/tick.h>
  15#include <linux/bitops.h>
  16#include <linux/ptrace.h>
  17#include <asm/pgalloc.h>
  18#include <linux/uaccess.h> /* for USER_DS macros */
  19#include <asm/cacheflush.h>
  20
  21void show_regs(struct pt_regs *regs)
  22{
  23        show_regs_print_info(KERN_INFO);
  24
  25        pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode);
  26        pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
  27                                regs->r1, regs->r2, regs->r3, regs->r4);
  28        pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
  29                                regs->r5, regs->r6, regs->r7, regs->r8);
  30        pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
  31                                regs->r9, regs->r10, regs->r11, regs->r12);
  32        pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
  33                                regs->r13, regs->r14, regs->r15, regs->r16);
  34        pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
  35                                regs->r17, regs->r18, regs->r19, regs->r20);
  36        pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
  37                                regs->r21, regs->r22, regs->r23, regs->r24);
  38        pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
  39                                regs->r25, regs->r26, regs->r27, regs->r28);
  40        pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
  41                                regs->r29, regs->r30, regs->r31, regs->pc);
  42        pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
  43                                regs->msr, regs->ear, regs->esr, regs->fsr);
  44}
  45
  46void (*pm_power_off)(void) = NULL;
  47EXPORT_SYMBOL(pm_power_off);
  48
  49void flush_thread(void)
  50{
  51}
  52
  53int copy_thread(unsigned long clone_flags, unsigned long usp,
  54                unsigned long arg, struct task_struct *p)
  55{
  56        struct pt_regs *childregs = task_pt_regs(p);
  57        struct thread_info *ti = task_thread_info(p);
  58
  59        if (unlikely(p->flags & PF_KTHREAD)) {
  60                /* if we're creating a new kernel thread then just zeroing all
  61                 * the registers. That's OK for a brand new thread.*/
  62                memset(childregs, 0, sizeof(struct pt_regs));
  63                memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
  64                ti->cpu_context.r1  = (unsigned long)childregs;
  65                ti->cpu_context.r20 = (unsigned long)usp; /* fn */
  66                ti->cpu_context.r19 = (unsigned long)arg;
  67                childregs->pt_mode = 1;
  68                local_save_flags(childregs->msr);
  69#ifdef CONFIG_MMU
  70                ti->cpu_context.msr = childregs->msr & ~MSR_IE;
  71#endif
  72                ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
  73                return 0;
  74        }
  75        *childregs = *current_pt_regs();
  76        if (usp)
  77                childregs->r1 = usp;
  78
  79        memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
  80        ti->cpu_context.r1 = (unsigned long)childregs;
  81#ifndef CONFIG_MMU
  82        ti->cpu_context.msr = (unsigned long)childregs->msr;
  83#else
  84        childregs->msr |= MSR_UMS;
  85
  86        /* we should consider the fact that childregs is a copy of the parent
  87         * regs which were saved immediately after entering the kernel state
  88         * before enabling VM. This MSR will be restored in switch_to and
  89         * RETURN() and we want to have the right machine state there
  90         * specifically this state must have INTs disabled before and enabled
  91         * after performing rtbd
  92         * compose the right MSR for RETURN(). It will work for switch_to also
  93         * excepting for VM and UMS
  94         * don't touch UMS , CARRY and cache bits
  95         * right now MSR is a copy of parent one */
  96        childregs->msr &= ~MSR_EIP;
  97        childregs->msr |= MSR_IE;
  98        childregs->msr &= ~MSR_VM;
  99        childregs->msr |= MSR_VMS;
 100        childregs->msr |= MSR_EE; /* exceptions will be enabled*/
 101
 102        ti->cpu_context.msr = (childregs->msr|MSR_VM);
 103        ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
 104        ti->cpu_context.msr &= ~MSR_IE;
 105#endif
 106        ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
 107
 108        /*
 109         *  r21 is the thread reg, r10 is 6th arg to clone
 110         *  which contains TLS area
 111         */
 112        if (clone_flags & CLONE_SETTLS)
 113                childregs->r21 = childregs->r10;
 114
 115        return 0;
 116}
 117
 118#ifndef CONFIG_MMU
 119/*
 120 * Return saved PC of a blocked thread.
 121 */
 122unsigned long thread_saved_pc(struct task_struct *tsk)
 123{
 124        struct cpu_context *ctx =
 125                &(((struct thread_info *)(tsk->stack))->cpu_context);
 126
 127        /* Check whether the thread is blocked in resume() */
 128        if (in_sched_functions(ctx->r15))
 129                return (unsigned long)ctx->r15;
 130        else
 131                return ctx->r14;
 132}
 133#endif
 134
 135unsigned long get_wchan(struct task_struct *p)
 136{
 137/* TBD (used by procfs) */
 138        return 0;
 139}
 140
 141/* Set up a thread for executing a new program */
 142void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
 143{
 144        regs->pc = pc;
 145        regs->r1 = usp;
 146        regs->pt_mode = 0;
 147#ifdef CONFIG_MMU
 148        regs->msr |= MSR_UMS;
 149        regs->msr &= ~MSR_VM;
 150#endif
 151}
 152
 153#ifdef CONFIG_MMU
 154#include <linux/elfcore.h>
 155/*
 156 * Set up a thread for executing a new program
 157 */
 158int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
 159{
 160        return 0; /* MicroBlaze has no separate FPU registers */
 161}
 162#endif /* CONFIG_MMU */
 163
 164void arch_cpu_idle(void)
 165{
 166       local_irq_enable();
 167}
 168