LXR linux/arch/mips/include/asm/mach-powertv/asic

   1/*
   2 * Copyright (C) 2009  Cisco Systems, Inc.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  17 */
  18
  19#ifndef __ASM_MACH_POWERTV_ASIC_H_
  20#define __ASM_MACH_POWERTV_ASIC_H_
  21#include <linux/io.h>
  22
  23/* ASIC types */
  24enum asic_type {
  25        ASIC_UNKNOWN,
  26        ASIC_ZEUS,
  27        ASIC_CALLIOPE,
  28        ASIC_CRONUS,
  29        ASIC_CRONUSLITE,
  30        ASIC_GAIA,
  31        ASICS                   /* Number of supported ASICs */
  32};
  33
  34/* hardcoded values read from Chip Version registers */
  35#define CRONUS_10       0x0B4C1C20
  36#define CRONUS_11       0x0B4C1C21
  37#define CRONUSLITE_10   0x0B4C1C40
  38
  39#define NAND_FLASH_BASE         0x03000000
  40#define CALLIOPE_IO_BASE        0x08000000
  41#define GAIA_IO_BASE            0x09000000
  42#define CRONUS_IO_BASE          0x09000000
  43#define ZEUS_IO_BASE            0x09000000
  44
  45#define ASIC_IO_SIZE            0x01000000
  46
  47/* Definitions for backward compatibility */
  48#define UART1_INTSTAT   uart1_intstat
  49#define UART1_INTEN     uart1_inten
  50#define UART1_CONFIG1   uart1_config1
  51#define UART1_CONFIG2   uart1_config2
  52#define UART1_DIVISORHI uart1_divisorhi
  53#define UART1_DIVISORLO uart1_divisorlo
  54#define UART1_DATA      uart1_data
  55#define UART1_STATUS    uart1_status
  56
  57/* ASIC register enumeration */
  58union register_map_entry {
  59        unsigned long phys;
  60        u32 *virt;
  61};
  62
  63#define REGISTER_MAP_ELEMENT(x) union register_map_entry x;
  64struct register_map {
  65#include <asm/mach-powertv/asic_reg_map.h>
  66};
  67#undef REGISTER_MAP_ELEMENT
  68
  69/**
  70 * register_map_offset_phys - add an offset to the physical address
  71 * @map:        Pointer to the &struct register_map
  72 * @offset:     Value to add
  73 *
  74 * Only adds the base to non-zero physical addresses
  75 */
  76static inline void register_map_offset_phys(struct register_map *map,
  77        unsigned long offset)
  78{
  79#define REGISTER_MAP_ELEMENT(x)         do {                            \
  80                if (map->x.phys != 0)                                   \
  81                        map->x.phys += offset;                          \
  82        } while (false);
  83
  84#include <asm/mach-powertv/asic_reg_map.h>
  85#undef REGISTER_MAP_ELEMENT
  86}
  87
  88/**
  89 * register_map_virtualize - Convert &register_map to virtual addresses
  90 * @map:        Pointer to &register_map to virtualize
  91 */
  92static inline void register_map_virtualize(struct register_map *map)
  93{
  94#define REGISTER_MAP_ELEMENT(x)         do {                            \
  95                map->x.virt = (!map->x.phys) ? NULL :                   \
  96                        UNCAC_ADDR(phys_to_virt(map->x.phys));          \
  97        } while (false);
  98
  99#include <asm/mach-powertv/asic_reg_map.h>
 100#undef REGISTER_MAP_ELEMENT
 101}
 102
 103extern struct register_map _asic_register_map;
 104extern unsigned long asic_phy_base;
 105
 106/*
 107 * Macros to interface to registers through their ioremapped address
 108 * asic_reg_phys_addr   Returns the physical address of the given register
 109 * asic_reg_addr        Returns the iomapped virtual address of the given
 110 *                      register.
 111 */
 112#define asic_reg_addr(x)        (_asic_register_map.x.virt)
 113#define asic_reg_phys_addr(x)   (virt_to_phys((void *) CAC_ADDR(        \
 114                                        (unsigned long) asic_reg_addr(x))))
 115
 116/*
 117 * The asic_reg macro is gone. It should be replaced by either asic_read or
 118 * asic_write, as appropriate.
 119 */
 120
 121#define asic_read(x)            readl(asic_reg_addr(x))
 122#define asic_write(v, x)        writel(v, asic_reg_addr(x))
 123
 124extern void asic_irq_init(void);
 125#endif
 126