1/***********************license start*************** 2 * Author: Cavium Networks 3 * 4 * Contact: support@caviumnetworks.com 5 * This file is part of the OCTEON SDK 6 * 7 * Copyright (c) 2003-2012 Cavium Networks 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more 17 * details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this file; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 22 * or visit http://www.gnu.org/licenses/. 23 * 24 * This file may also be available under a different license from Cavium. 25 * Contact Cavium Networks for more information 26 ***********************license end**************************************/ 27 28#ifndef __CVMX_STXX_DEFS_H__ 29#define __CVMX_STXX_DEFS_H__ 30 31#define CVMX_STXX_ARB_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull) 32#define CVMX_STXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull) 33#define CVMX_STXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull) 34#define CVMX_STXX_DIP_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull) 35#define CVMX_STXX_IGN_CAL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id) & 1) * 0x8000000ull) 36#define CVMX_STXX_INT_MSK(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A0ull) + ((block_id) & 1) * 0x8000000ull) 37#define CVMX_STXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x0001180090000698ull) + ((block_id) & 1) * 0x8000000ull) 38#define CVMX_STXX_INT_SYNC(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A8ull) + ((block_id) & 1) * 0x8000000ull) 39#define CVMX_STXX_MIN_BST(block_id) (CVMX_ADD_IO_SEG(0x0001180090000618ull) + ((block_id) & 1) * 0x8000000ull) 40#define CVMX_STXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000400ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8) 41#define CVMX_STXX_SPI4_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000628ull) + ((block_id) & 1) * 0x8000000ull) 42#define CVMX_STXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000630ull) + ((block_id) & 1) * 0x8000000ull) 43#define CVMX_STXX_STAT_BYTES_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180090000648ull) + ((block_id) & 1) * 0x8000000ull) 44#define CVMX_STXX_STAT_BYTES_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180090000680ull) + ((block_id) & 1) * 0x8000000ull) 45#define CVMX_STXX_STAT_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000638ull) + ((block_id) & 1) * 0x8000000ull) 46#define CVMX_STXX_STAT_PKT_XMT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000640ull) + ((block_id) & 1) * 0x8000000ull) 47 48union cvmx_stxx_arb_ctl { 49 uint64_t u64; 50 struct cvmx_stxx_arb_ctl_s { 51#ifdef __BIG_ENDIAN_BITFIELD 52 uint64_t reserved_6_63:58; 53 uint64_t mintrn:1; 54 uint64_t reserved_4_4:1; 55 uint64_t igntpa:1; 56 uint64_t reserved_0_2:3; 57#else 58 uint64_t reserved_0_2:3; 59 uint64_t igntpa:1; 60 uint64_t reserved_4_4:1; 61 uint64_t mintrn:1; 62 uint64_t reserved_6_63:58; 63#endif 64 } s; 65 struct cvmx_stxx_arb_ctl_s cn38xx; 66 struct cvmx_stxx_arb_ctl_s cn38xxp2; 67 struct cvmx_stxx_arb_ctl_s cn58xx; 68 struct cvmx_stxx_arb_ctl_s cn58xxp1; 69}; 70 71union cvmx_stxx_bckprs_cnt { 72 uint64_t u64; 73 struct cvmx_stxx_bckprs_cnt_s { 74#ifdef __BIG_ENDIAN_BITFIELD 75 uint64_t reserved_32_63:32; 76 uint64_t cnt:32; 77#else 78 uint64_t cnt:32; 79 uint64_t reserved_32_63:32; 80#endif 81 } s; 82 struct cvmx_stxx_bckprs_cnt_s cn38xx; 83 struct cvmx_stxx_bckprs_cnt_s cn38xxp2; 84 struct cvmx_stxx_bckprs_cnt_s cn58xx; 85 struct cvmx_stxx_bckprs_cnt_s cn58xxp1; 86}; 87 88union cvmx_stxx_com_ctl { 89 uint64_t u64; 90 struct cvmx_stxx_com_ctl_s { 91#ifdef __BIG_ENDIAN_BITFIELD 92 uint64_t reserved_4_63:60; 93 uint64_t st_en:1; 94 uint64_t reserved_1_2:2; 95 uint64_t inf_en:1; 96#else 97 uint64_t inf_en:1; 98 uint64_t reserved_1_2:2; 99 uint64_t st_en:1; 100 uint64_t reserved_4_63:60; 101#endif 102 } s; 103 struct cvmx_stxx_com_ctl_s cn38xx; 104 struct cvmx_stxx_com_ctl_s cn38xxp2; 105 struct cvmx_stxx_com_ctl_s cn58xx; 106 struct cvmx_stxx_com_ctl_s cn58xxp1; 107}; 108 109union cvmx_stxx_dip_cnt { 110 uint64_t u64; 111 struct cvmx_stxx_dip_cnt_s { 112#ifdef __BIG_ENDIAN_BITFIELD 113 uint64_t reserved_8_63:56; 114 uint64_t frmmax:4; 115 uint64_t dipmax:4; 116#else 117 uint64_t dipmax:4; 118 uint64_t frmmax:4; 119 uint64_t reserved_8_63:56; 120#endif 121 } s; 122 struct cvmx_stxx_dip_cnt_s cn38xx; 123 struct cvmx_stxx_dip_cnt_s cn38xxp2; 124 struct cvmx_stxx_dip_cnt_s cn58xx; 125 struct cvmx_stxx_dip_cnt_s cn58xxp1; 126}; 127 128union cvmx_stxx_ign_cal { 129 uint64_t u64; 130 struct cvmx_stxx_ign_cal_s { 131#ifdef __BIG_ENDIAN_BITFIELD 132 uint64_t reserved_16_63:48; 133 uint64_t igntpa:16; 134#else 135 uint64_t igntpa:16; 136 uint64_t reserved_16_63:48; 137#endif 138 } s; 139 struct cvmx_stxx_ign_cal_s cn38xx; 140 struct cvmx_stxx_ign_cal_s cn38xxp2; 141 struct cvmx_stxx_ign_cal_s cn58xx; 142 struct cvmx_stxx_ign_cal_s cn58xxp1; 143}; 144 145union cvmx_stxx_int_msk { 146 uint64_t u64; 147 struct cvmx_stxx_int_msk_s { 148#ifdef __BIG_ENDIAN_BITFIELD 149 uint64_t reserved_8_63:56; 150 uint64_t frmerr:1; 151 uint64_t unxfrm:1; 152 uint64_t nosync:1; 153 uint64_t diperr:1; 154 uint64_t datovr:1; 155 uint64_t ovrbst:1; 156 uint64_t calpar1:1; 157 uint64_t calpar0:1; 158#else 159 uint64_t calpar0:1; 160 uint64_t calpar1:1; 161 uint64_t ovrbst:1; 162 uint64_t datovr:1; 163 uint64_t diperr:1; 164 uint64_t nosync:1; 165 uint64_t unxfrm:1; 166 uint64_t frmerr:1; 167 uint64_t reserved_8_63:56; 168#endif 169 } s; 170 struct cvmx_stxx_int_msk_s cn38xx; 171 struct cvmx_stxx_int_msk_s cn38xxp2; 172 struct cvmx_stxx_int_msk_s cn58xx; 173 struct cvmx_stxx_int_msk_s cn58xxp1; 174}; 175 176union cvmx_stxx_int_reg { 177 uint64_t u64; 178 struct cvmx_stxx_int_reg_s { 179#ifdef __BIG_ENDIAN_BITFIELD 180 uint64_t reserved_9_63:55; 181 uint64_t syncerr:1; 182 uint64_t frmerr:1; 183 uint64_t unxfrm:1; 184 uint64_t nosync:1; 185 uint64_t diperr:1; 186 uint64_t datovr:1; 187 uint64_t ovrbst:1; 188 uint64_t calpar1:1; 189 uint64_t calpar0:1; 190#else 191 uint64_t calpar0:1; 192 uint64_t calpar1:1; 193 uint64_t ovrbst:1; 194 uint64_t datovr:1; 195 uint64_t diperr:1; 196 uint64_t nosync:1; 197 uint64_t unxfrm:1; 198 uint64_t frmerr:1; 199 uint64_t syncerr:1; 200 uint64_t reserved_9_63:55; 201#endif 202 } s; 203 struct cvmx_stxx_int_reg_s cn38xx; 204 struct cvmx_stxx_int_reg_s cn38xxp2; 205 struct cvmx_stxx_int_reg_s cn58xx; 206 struct cvmx_stxx_int_reg_s cn58xxp1; 207}; 208 209union cvmx_stxx_int_sync { 210 uint64_t u64; 211 struct cvmx_stxx_int_sync_s { 212#ifdef __BIG_ENDIAN_BITFIELD 213 uint64_t reserved_8_63:56; 214 uint64_t frmerr:1; 215 uint64_t unxfrm:1; 216 uint64_t nosync:1; 217 uint64_t diperr:1; 218 uint64_t datovr:1; 219 uint64_t ovrbst:1; 220 uint64_t calpar1:1; 221 uint64_t calpar0:1; 222#else 223 uint64_t calpar0:1; 224 uint64_t calpar1:1; 225 uint64_t ovrbst:1; 226 uint64_t datovr:1; 227 uint64_t diperr:1; 228 uint64_t nosync:1; 229 uint64_t unxfrm:1; 230 uint64_t frmerr:1; 231 uint64_t reserved_8_63:56; 232#endif 233 } s; 234 struct cvmx_stxx_int_sync_s cn38xx; 235 struct cvmx_stxx_int_sync_s cn38xxp2; 236 struct cvmx_stxx_int_sync_s cn58xx; 237 struct cvmx_stxx_int_sync_s cn58xxp1; 238}; 239 240union cvmx_stxx_min_bst { 241 uint64_t u64; 242 struct cvmx_stxx_min_bst_s { 243#ifdef __BIG_ENDIAN_BITFIELD 244 uint64_t reserved_9_63:55; 245 uint64_t minb:9; 246#else 247 uint64_t minb:9; 248 uint64_t reserved_9_63:55; 249#endif 250 } s; 251 struct cvmx_stxx_min_bst_s cn38xx; 252 struct cvmx_stxx_min_bst_s cn38xxp2; 253 struct cvmx_stxx_min_bst_s cn58xx; 254 struct cvmx_stxx_min_bst_s cn58xxp1; 255}; 256 257union cvmx_stxx_spi4_calx { 258 uint64_t u64; 259 struct cvmx_stxx_spi4_calx_s { 260#ifdef __BIG_ENDIAN_BITFIELD 261 uint64_t reserved_17_63:47; 262 uint64_t oddpar:1; 263 uint64_t prt3:4; 264 uint64_t prt2:4; 265 uint64_t prt1:4; 266 uint64_t prt0:4; 267#else 268 uint64_t prt0:4; 269 uint64_t prt1:4; 270 uint64_t prt2:4; 271 uint64_t prt3:4; 272 uint64_t oddpar:1; 273 uint64_t reserved_17_63:47; 274#endif 275 } s; 276 struct cvmx_stxx_spi4_calx_s cn38xx; 277 struct cvmx_stxx_spi4_calx_s cn38xxp2; 278 struct cvmx_stxx_spi4_calx_s cn58xx; 279 struct cvmx_stxx_spi4_calx_s cn58xxp1; 280}; 281 282union cvmx_stxx_spi4_dat { 283 uint64_t u64; 284 struct cvmx_stxx_spi4_dat_s { 285#ifdef __BIG_ENDIAN_BITFIELD 286 uint64_t reserved_32_63:32; 287 uint64_t alpha:16; 288 uint64_t max_t:16; 289#else 290 uint64_t max_t:16; 291 uint64_t alpha:16; 292 uint64_t reserved_32_63:32; 293#endif 294 } s; 295 struct cvmx_stxx_spi4_dat_s cn38xx; 296 struct cvmx_stxx_spi4_dat_s cn38xxp2; 297 struct cvmx_stxx_spi4_dat_s cn58xx; 298 struct cvmx_stxx_spi4_dat_s cn58xxp1; 299}; 300 301union cvmx_stxx_spi4_stat { 302 uint64_t u64; 303 struct cvmx_stxx_spi4_stat_s { 304#ifdef __BIG_ENDIAN_BITFIELD 305 uint64_t reserved_16_63:48; 306 uint64_t m:8; 307 uint64_t reserved_7_7:1; 308 uint64_t len:7; 309#else 310 uint64_t len:7; 311 uint64_t reserved_7_7:1; 312 uint64_t m:8; 313 uint64_t reserved_16_63:48; 314#endif 315 } s; 316 struct cvmx_stxx_spi4_stat_s cn38xx; 317 struct cvmx_stxx_spi4_stat_s cn38xxp2; 318 struct cvmx_stxx_spi4_stat_s cn58xx; 319 struct cvmx_stxx_spi4_stat_s cn58xxp1; 320}; 321 322union cvmx_stxx_stat_bytes_hi { 323 uint64_t u64; 324 struct cvmx_stxx_stat_bytes_hi_s { 325#ifdef __BIG_ENDIAN_BITFIELD 326 uint64_t reserved_32_63:32; 327 uint64_t cnt:32; 328#else 329 uint64_t cnt:32; 330 uint64_t reserved_32_63:32; 331#endif 332 } s; 333 struct cvmx_stxx_stat_bytes_hi_s cn38xx; 334 struct cvmx_stxx_stat_bytes_hi_s cn38xxp2; 335 struct cvmx_stxx_stat_bytes_hi_s cn58xx; 336 struct cvmx_stxx_stat_bytes_hi_s cn58xxp1; 337}; 338 339union cvmx_stxx_stat_bytes_lo { 340 uint64_t u64; 341 struct cvmx_stxx_stat_bytes_lo_s { 342#ifdef __BIG_ENDIAN_BITFIELD 343 uint64_t reserved_32_63:32; 344 uint64_t cnt:32; 345#else 346 uint64_t cnt:32; 347 uint64_t reserved_32_63:32; 348#endif 349 } s; 350 struct cvmx_stxx_stat_bytes_lo_s cn38xx; 351 struct cvmx_stxx_stat_bytes_lo_s cn38xxp2; 352 struct cvmx_stxx_stat_bytes_lo_s cn58xx; 353 struct cvmx_stxx_stat_bytes_lo_s cn58xxp1; 354}; 355 356union cvmx_stxx_stat_ctl { 357 uint64_t u64; 358 struct cvmx_stxx_stat_ctl_s { 359#ifdef __BIG_ENDIAN_BITFIELD 360 uint64_t reserved_5_63:59; 361 uint64_t clr:1; 362 uint64_t bckprs:4; 363#else 364 uint64_t bckprs:4; 365 uint64_t clr:1; 366 uint64_t reserved_5_63:59; 367#endif 368 } s; 369 struct cvmx_stxx_stat_ctl_s cn38xx; 370 struct cvmx_stxx_stat_ctl_s cn38xxp2; 371 struct cvmx_stxx_stat_ctl_s cn58xx; 372 struct cvmx_stxx_stat_ctl_s cn58xxp1; 373}; 374 375union cvmx_stxx_stat_pkt_xmt { 376 uint64_t u64; 377 struct cvmx_stxx_stat_pkt_xmt_s { 378#ifdef __BIG_ENDIAN_BITFIELD 379 uint64_t reserved_32_63:32; 380 uint64_t cnt:32; 381#else 382 uint64_t cnt:32; 383 uint64_t reserved_32_63:32; 384#endif 385 } s; 386 struct cvmx_stxx_stat_pkt_xmt_s cn38xx; 387 struct cvmx_stxx_stat_pkt_xmt_s cn38xxp2; 388 struct cvmx_stxx_stat_pkt_xmt_s cn58xx; 389 struct cvmx_stxx_stat_pkt_xmt_s cn58xxp1; 390}; 391 392#endif 393