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11#ifndef _ASM_RTC_REGS_H
12#define _ASM_RTC_REGS_H
13
14#include <asm/intctl-regs.h>
15
16#ifdef __KERNEL__
17
18#define RTSCR __SYSREG(0xd8600000, u8)
19#define RTSAR __SYSREG(0xd8600001, u8)
20#define RTMCR __SYSREG(0xd8600002, u8)
21#define RTMAR __SYSREG(0xd8600003, u8)
22#define RTHCR __SYSREG(0xd8600004, u8)
23#define RTHAR __SYSREG(0xd8600005, u8)
24#define RTDWCR __SYSREG(0xd8600006, u8)
25#define RTDMCR __SYSREG(0xd8600007, u8)
26#define RTMTCR __SYSREG(0xd8600008, u8)
27#define RTYCR __SYSREG(0xd8600009, u8)
28
29#define RTCRA __SYSREG(0xd860000a, u8)
30#define RTCRA_RS 0x0f
31#define RTCRA_RS_NONE 0x00
32#define RTCRA_RS_3_90625ms 0x01
33#define RTCRA_RS_7_8125ms 0x02
34#define RTCRA_RS_122_070us 0x03
35#define RTCRA_RS_244_141us 0x04
36#define RTCRA_RS_488_281us 0x05
37#define RTCRA_RS_976_5625us 0x06
38#define RTCRA_RS_1_953125ms 0x07
39#define RTCRA_RS_3_90624ms 0x08
40#define RTCRA_RS_7_8125ms_b 0x09
41#define RTCRA_RS_15_625ms 0x0a
42#define RTCRA_RS_31_25ms 0x0b
43#define RTCRA_RS_62_5ms 0x0c
44#define RTCRA_RS_125ms 0x0d
45#define RTCRA_RS_250ms 0x0e
46#define RTCRA_RS_500ms 0x0f
47#define RTCRA_DVR 0x40
48#define RTCRA_UIP 0x80
49
50#define RTCRB __SYSREG(0xd860000b, u8)
51#define RTCRB_DSE 0x01
52#define RTCRB_TM 0x02
53#define RTCRB_TM_12HR 0x00
54#define RTCRB_TM_24HR 0x02
55#define RTCRB_DM 0x04
56#define RTCRB_DM_BCD 0x00
57#define RTCRB_DM_BINARY 0x04
58#define RTCRB_UIE 0x10
59#define RTCRB_AIE 0x20
60#define RTCRB_PIE 0x40
61#define RTCRB_SET 0x80
62
63#define RTSRC __SYSREG(0xd860000c, u8)
64#define RTSRC_UF 0x10
65#define RTSRC_AF 0x20
66#define RTSRC_PF 0x40
67#define RTSRC_IRQF 0x80
68
69#define RTIRQ 32
70#define RTICR GxICR(RTIRQ)
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74
75#define RTC_PORT(x) 0xd8600000
76#define RTC_ALWAYS_BCD 1
77
78#define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
79#define CMOS_WRITE(val, addr) \
80 do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
81
82#define RTC_IRQ RTIRQ
83
84#endif
85
86#endif
87